Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsInterface ICsInterface IC - multiplexers SOIC 18 W

_______________General Description

Maxim’s DG528/DG529 are monolithic, 8-channel,

CMOS multiplexers with on-board address and control

latches that simplify design and reduce board space in

microprocessor-based applications. The DG528 is a

single-ended, 1-of-8 multiplexer, while the DG529 is a

differential, 2-of-8 multiplexer. These devices can oper-

ate as multiplexers or demultiplexers.

The DG528/DG529 have break-before-make switching

to prevent momentary shorting of the input signals.

Each device operates with dual supplies (±4.5V to

±20V) or a single supply (+5V to +30V). All logic inputs

are TTL and CMOS compatible. The Maxim

DG528/DG529 are pin and electrically compatible with

the industry-standard DG528/DG529.

________________________Applications

Data-Acquisition Systems

Automatic Test Equipment

Avionics and Military Systems

Communication Systems

Microprocessor-Controlled Systems

Audio-Signal Multiplexing

____________________________Features

♦ Low-Power, Monolithic CMOS Design

♦ On-Board Address Latches

♦ Break-Before-Make Input Switches

♦ TTL and CMOS Logic Compatible

♦ Microprocessor-Bus Compatible

♦ r

DS(ON)

< 400Ω

♦ Pin and Electrically Compatible with the Industry-

Standard DG528/DG529 and ADG528/ADG529

DG528/DG529

8-Channel Latchable Multiplexers

________________________________________________________________

Maxim Integrated Products

_________________Pin Configurations

__________Typical Operating Circuit

Call toll free 1-800-998-8800 for free samples or literature.

19-3519; Rev 0; 3/91

PART

DG528CJ

DG528CWN

DG528CK 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

18 Plastic DIP

18 Wide SO

18 CERDIP

______________Ordering Information

Ordering Information continued at end of data sheet.

* Contact factory for dice specifications.

** Contact factory for availability and processing to MIL-STD-883.

DG528C/D

DG528DJ -40°C to +85°C

0°C to +70°C Dice*

18 Plastic DIP

DG528DN -40°C to +85°C 20 PLCC

DG528EWN -40°C to +85°C 18 Wide SO

DG528DK -40°C to +85°C 18 CERDIP

DG528AZ -55°C to +125°C 20 LCC**

DG528AK -55°C to +125°C 18 CERDIP**

DG529 MAX133

WR RS

+5V -5V

MUX AND A/D CONTROL

A0 A1

IN1A

µP INTERFACE

IN1B

IN2A

IN2B

IN3A

OUTA

OUTB

IN3B

IN4A

IN4B

DIFFERENTIAL INPUT FOR DATA-ACQUISITION SYSTEMS

RS

A1

A2

GND

V+

S5

S6

S7

WR

A0

EN

V-

S1

S2

S3

S4

TOP VIEW

DIP/SO

DG528

Pin Configurations continued at end of data sheet.

Summary of content (12 pages)

PAGE 1
9-3519; Rev 0; 3/91 8-Channel Latchable Multiplexers ________________________Applications Avionics and Military Systems Communication Systems Microprocessor-Controlled Systems Audio-Signal Multiplexing __________Typical Operating Circuit ♦ Break-Before-Make Input Switches ♦ TTL and CMOS Logic Compatible ♦ Microprocessor-Bus Compatible ♦ rDS(ON) < 400Ω ♦ Pin and Electrically Compatible with the IndustryStandard DG528/DG529 and ADG528/ADG529 ______________Ordering Information PART TEMP.
PAGE 2
DG528/DG529 8-Channel Latchable Multiplexers ABSOLUTE MAXIMUM RATINGS Voltage Referenced to VV+ ....................................................................................+44V GND .................................................................................+25V Digital Inputs VS, VD .................................................V- -2V to V+ +2V or 20mA, whichever occurs first. Current (any terminal, except S or D) .................................
PAGE 3
8-Channel Latchable Multiplexers (V+ = 15V, V- = -15V, VEN = 2.4V, WR = 0V, RS = 2.4V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN DG52_A DG52_C/D/E UNITS TYP MAX MIN TYP MAX DYNAMIC Switching Time of Multiplexer tTRANS Figure 1 TA = +25°C 0.4 Break-Before-Make Interval tOPEN Figure 2 TA = +25°C 0.2 1 1.5 0.2 µs µs Enable, Write Turn-On Time tON(EN, WR) Figures 3, 4 TA = +25°C 1.0 1.5 1.
PAGE 4
DG528/DG529 8-Channel Latchable Multiplexers +15V +2.4V V+ EN RS LOGIC INPUT tr < 20ns tf < 20ns +3V A0 A1 A2 GND LOGIC INPUT 50% DG528 IN1 IN2 TO IN7 ±10V IN8 ±10V OUT V- WR VO 35pF 1M 50Ω 0 SWITCH OUTPUT -15V SWITCH OUTPUT VO VIN1 0.8VIN1 +15V +2.4V 0 0.8VIN8 VIN8 tTRANSITION IN1 ON IN1B IN1A TO IN4A OUTA, IN2B TO IN3B IN4B tTRANSITION IN8 ON A0 A1 GND LOGIC INPUT DG529 V+ EN RS ±10V ±10V SWITCH OUTPUT OUTB V- WR VOB 35pF 1M 50Ω -15V Figure 1.
PAGE 5
8-Channel Latchable Multiplexers LOGIC INPUT tr < 20ns tf < 20ns RS V+ EN 50Ω +3V 50% DG528 IN1 SWITCH OUTPUT OUT V- VO 35pF 1k 0 0 0.1 VO -5V IN2 TO IN8 A0 A1 A2 GND WR tON(EN) SWITCH OUTPUT VO +15V tOFF(EN) -15V 0.1 VO +2.4V 0.9 VO VO VIN1 DG528/DG529 LOGIC INPUT +2.4V +15V EN 50Ω DG529 V+ IN1B RS LOGIC INPUT -5V IN1A TO IN4A OUTA A0 IN2B, IN3B, IN4B SWITCH OUTPUT A1 OUTB OUT GND WR V- VOB 35pF 1k -15V Figure 3. Enable tON/tOFF Time Test Circuit +15V +2.
PAGE 6
DG528/DG529 8-Channel Latchable Multiplexers DG528* +15V +2.4V +3V +1.5V RS V+ EN 50% 0 A0, A1 (A2) +5V SWITCH OUTPUT REMAINING SWITCHES tOFF(RS) SWITCH OUTPUT VO IN1 OR IN1B 0 0.8 VO OUTB OUT RS LOGIC INPUT VO GND WR V35pF 1k -15V * AS SHOWN Figure 5. Reset Turn-Off Time tOFF(RS) Test Circuit +15V DG528* V+ A0, A1 (A2) EN RS S_ VO VGEN ∆VO RGEN D +2.4V VO EN GND WR V- ∆VO IS THE MEASURE OF VOLTAGE ERROR DUE TO CHARGE INJECTION.
PAGE 7
8-Channel Latchable Multiplexers A2 A1 A0 EN WR RS Table 2. DG529 Logic States ON SWITCH Latching X X X X 1 Maintains previous switch condition A0 EN WR RS ON SWITCH X X X 1 Maintains previous switch condition X X X 0 None (latches cleared) 0 0 0 0 0 1 1 1 1 1 None 1 2 3 4 Reset X X X X 0 None (latches cleared) Transparent Operation X 0 0 0 0 1 1 1 1 A1 Latching Reset X DG528/DG529 Table 1.
PAGE 8
DG528/DG529 8-Channel Latchable Multiplexers V+ EN PROTECTION D 4-WIDE LATCH A_ LEVEL SHIFT DECODE PROTECTION S1 PROTECTION CLK WR RESET Sn PROTECTION RS V- Figure 8. Simplified Internal Structure _______________________Applications Operation with Supply Voltages Other Than ±15V Maxim guarantees the DG528/DG529 for operation from ±4.5V to ±20V supplies. The switching delays increase by about a factor of two at ±5V, and breakbefore-make action is preserved.
PAGE 9
8-Channel Latchable Multiplexers V+ DG528/DG529 +15V ±15V ANALOG INPUTS IN1 A0 DATA BUS A1 IN2 A2 EN IN3 IN4 RESET MICROPROCESSOR SYSTEM BUS RS IN5 +5V WR IN6 7432 WR IN7 ADDRESS BUS CS IN8 ADDRESS DECODER V- 1-OF-8 ANALOG INPUTS -15V Figure 9. Bus Interface _____________________________________________Pin Configurations (continued) LCC/PLCC S7 13 S4 S8 12 14 S6 N.C. 11 S3 8 9 15 S5 D 10 S2 7 V- 4 15 V+ S1A 5 DG529 S2A 6 14 S1B 19 A1 20 RS 1 N.C.
PAGE 10
DG528/DG529 8-Channel Latchable Multiplexers _Ordering Information (continued) PART DG529CJ DG529CWN DG529CK DG529C/D DG529DJ DG529DN DG529EWN DG529DK DG529AZ DG529AK TEMP.
PAGE 11
8-Channel Latchable Multiplexers D E DIM E1 A A1 A2 A3 B B1 C D1 E E1 e eA eB L A3 A A2 L A1 0° - 15° C e B1 eA B eB D1 Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.) INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 – 0.100 – 0.300 0.400 – 0.150 0.115 PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24 MILLIMETERS MIN MAX – 5.08 0.38 – 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.
PAGE 12
DG528/DG529 8-Channel Latchable Multiplexers ___________________________________________Package Information (continued) DIM E1 E D A 0°-15° Q L L1 e C B1 B S1 S CERDIP CERAMIC DUAL-IN-LINE PACKAGE (0.300 in.) A B B1 C E E1 e L L1 Q S S1 INCHES MIN MAX – 0.200 0.014 0.023 0.038 0.065 0.008 0.015 0.220 0.310 0.290 0.320 0.100 0.125 0.200 0.150 – 0.015 0.070 – 0.098 0.005 – DIM PINS D D D D D D 8 14 16 18 20 24 MILLIMETERS MIN MAX – 5.08 0.36 0.58 0.97 1.65 0.20 0.38 5.59 7.87 7.37 8.13 2.54 3.