Datasheet

DS1077
2 of 21
BLOCK DIAGRAM 1077 Figure1
PROGRAMMABLE
“N” DIVIDER
CONTROL
LOGIC
(TABLE 1)
CONTROL
LOGIC
2-WIRE
INTERFACE
DIV1
0M1
0M0
1M1
1M0
EN0
SEL0
PDN0
PDN1
CONTROL
REGISTERS
SCL SDA
INTERNAL
OSCILLATOR
P0 PRESCALER
(M DIVIDER)
P1 PRESCALER
(
M DIVIDER
)
0M0 0M1
1M0 1M1
MUX
PDN0
EN0
SEL0
Power-Down
OUT0
CTRL0
Enable
Select
OUT1
DIV1
CTRL1
PDN1
(TABLE 2)
MCLK
Power-Down
Enable