Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsClock & Timing ICsTSSOP 14

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General Description

The DS1110L 10-tap delay line is a 3V version of the

DS1110. It has 10 equally spaced taps providing delays

from 10ns to 500ns. The DS1110L series delay lines

provide a nominal accuracy of ±5% or ±2ns, whichever

is greater, at 3.3V and +25°C. The DS1110L is character-

ized to operate from 2.7V to 3.6V. The DS1110L

produces both leading- and trailing-edge delays with

equal precision. The device is offered in a standard

14-pin TSSOP.

Features

♦ All-Silicon Delay Line

♦ 3V Version of the DS1110

♦ 10 Taps Equally Spaced

♦ Delays Are Stable and Precise

♦ Leading- and Trailing-Edge Accuracy

♦ Delay Tolerance ±5% or ±2ns, Whichever Is

Greater, at 3.3V and +25°C

♦ Economical

♦ Low-Profile 14-Pin TSSOP

♦ Low-Power CMOS

♦ TTL/CMOS Compatible

♦ Vapor Phase and IR Solderable

♦ Fast-Turn Prototypes

♦ Delays Specified Over Commercial and Industrial

Temperature Ranges

♦ Custom Delays Available

DS1110L

3V 10-Tap Silicon Delay Line

_____________________________________________ Maxim Integrated Products 1

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CC

TAP1

TAP3

TAP5TAP4

TAP2

N.C.

IN

TOP VIEW

TAP7

TAP9

TAP10GND

TAP8

TAP6

TSSOP (173mil)

DS1110L

Pin Configuration

Ordering Information

XX-XXXX; Rev 1; 11/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART

TEM P RANGE

PIN-

PACKAGE

TOTAL

DELAY

( ns) *

DS1110LE-100

-40°C to +85°C 14 TSSOP (173mil)

100

DS1110LE-125

-40°C to +85°C 14 TSSOP (173mil)

125

DS1110LE-150

-40°C to +85°C 14 TSSOP (173mil)

150

DS1110LE-175

-40°C to +85°C 14 TSSOP (173mil)

175

DS1110LE-200

-40°C to +85°C 14 TSSOP (173mil)

200

DS1110LE-250

-40°C to +85°C 14 TSSOP (173mil)

250

DS1110LE-300

-40°C to +85°C 14 TSSOP (173mil)

300

DS1110LE-350

-40°C to +85°C 14 TSSOP (173mil)

350

DS1110LE-400

-40°C to +85°C 14 TSSOP (173mil)

400

DS1110LE-450

-40°C to +85°C 14 TSSOP (173mil)

450

DS1110LE-500

-40°C to +85°C 14 TSSOP (173mil)

500

*Custom delays are available.

Applications

Communications Equipment

Medical Devices

Automated Test Equipment

PC Peripheral Devices

Summary of content (7 pages)

PAGE 1
XX-XXXX; Rev 1; 11/03 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever is greater, at 3.3V and +25°C. The DS1110L is characterized to operate from 2.7V to 3.6V. The DS1110L produces both leading- and trailing-edge delays with equal precision. The device is offered in a standard 14-pin TSSOP.
PAGE 2
DS1110L 3V 10-Tap Silicon Delay Line ABSOLUTE MAXIMUM RATINGS Voltage on Any Pin Relative to Ground .................-0.5V to +6.0V Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-55°C to +125°C Soldering Temperature...................See IPC/JEDEC J-STD-020A Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
PAGE 3
V 10-Tap Silicon Delay Line DS1110L CAPACITANCE (TA = +25°C.) PARAMETER Input Capacitance Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: CONDITIONS SYMBOL MIN TYP MAX UNITS 5 10 pF CIN All voltages are referenced to ground. Measured with outputs open. Initial tolerances are ± with respect to the nominal value at +25°C and VCC = 3.3V for both leading and trailing edges.
PAGE 4
Typical Operating Characteristics (continued) (VCC = 3.3V, TA = +25°C, unless otherwise noted.) OUTPUT CURRENT HIGH vs. OUTPUT VOLTAGE HIGH OUTPUT CURRENT LOW vs. OUTPUT VOLTAGE LOW -6.00E-03 -8.00E-03 -1.00E-02 -1.20E-02 -1.40E-02 DS1110L toc06 -4.00E-03 1.60E-02 OUTPUT CURRENT LOW (A) VCC = 2.7V -1.60E-02 1.40E-02 1.20E-02 1.00E-02 8.00E-03 6.00E-03 4.00E-03 VCC = 2.7V 2.00E-03 -1.80E-02 0.00E+00 2.0 2.1 2.2 2.3 2.4 2.5 2.7 2.6 0 0.1 0.2 0.3 0.4 0.5 0.
PAGE 5
3V 10-Tap Silicon Delay Line Table 1. Part Number by Delay (tPHL, tPLH) The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The device is offered in a standard 14-pin TSSOP. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever is greater, at 3.3V and +25°C. The DS1110L is characterized to operate from 2.7V to 3.6V.
PAGE 6
DS1110L 3V 10-Tap Silicon Delay Line Terminology Period: The time elapsed between the leading edge of the first pulse and the leading edge of the following pulse. t WI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the 1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading edge. tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the input pulse.
PAGE 7
3V 10-Tap Silicon Delay Line Chip Information TRANSISTOR COUNT: 6813 Output Each output is loaded with the equivalent of one 450Ω resistor in parallel with a 15pF capacitor. Delay is measured at the 1.5V level on the rising and falling edge. Package Information For the latest package outline information, go to www.maxim-ic. com/packages. Table 2. Test Conditions INPUT CONDITION Ambient Temperature +25°C ±3°C Supply Voltage (VCC) 3.3V ±0.1V Input Pulse High = 3.0V ±0.1V Low = 0.0V ±0.