Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsIntegrated Circuits (ICs)Timer IC t- real time clock Clock/calendar SOIC 8 N

BENEFITS AND FEATURES

 Completely Manages All Timekeeping Functions

o Real-Time Clock Counts Seconds,

Minutes, Hours, Date of the Month, Month,

Day of the Week, and Year with Leap-Year

Compensation Valid Up to 2100

o 31 x 8 Battery-Backed General-Purpose

RAM

 Simple Serial Port Interfaces to Most

Microcontrollers

o Simple 3-Wire Interface

o TTL-Compatible (V

= 5V)

o Single-Byte or Multiple-Byte (Burst Mode)

Data Transfer for Read or Write of Clock or

RAM Data

 Low Power Operation Extends Battery Backup

Run Time

o 2.0V to 5.5V Full Operation

o Uses Less Than 300nA at 2.0V

 8-Pin DIP and 8-Pin SO Minimizes Required

Space

 Optional Industrial Temperature Range: -40°C

to +85°C Supports Operation in a Wide Range

of Applications

 Underwriters Laboratories® (UL) Recognized

PIN CONFIGURATIONS

ORDERING INFORMATION

PART

TEMP RANGE

PIN-PACKAGE

TOP MARK*

DS1302+

0°C to +70°C

8 PDIP (300 mils)

DS1302

DS1302N+

-40°C to +85°C

8 PDIP (300 mils)

DS1302

DS1302S+

0°C to +70°C

8 SO (208 mils)

DS1302S

DS1302SN+

-40°C to +85°C

8 SO (208 mils)

DS1302S

DS1302Z+

0°C to +70°C

8 SO (150 mils)

DS1302Z

DS1302ZN+

-40°C to +85°C

8 SO (150 mils)

DS1302ZN

+Denotes a lead-free/RoHS-compliant package.

*An N anywhere on the top mark indicates an industrial temperature grade device. A + anywhere on the top mark indicates a lead-free device.

UL is a registered trademark of Underwriters Laboratories, Inc.

DS1302

Trickle-Charge Timekeeping Chip

CC1

SCLK

I/O

CC2

GND

DIP (300 mils)

DS1302

CC2

GND

CC1

SCLK

I/O

SO (208 mils/150 mils)

DS1302

TOP VIEW

1 of 13

REV: 3/15

Summary of content (13 pages)

PAGE 1
DS1302 Trickle-Charge Timekeeping Chip BENEFITS AND FEATURES   PIN CONFIGURATIONS Completely Manages All Timekeeping Functions o Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year Compensation Valid Up to 2100 o 31 x 8 Battery-Backed General-Purpose RAM Simple Serial Port Interfaces to Most Microcontrollers o Simple 3-Wire Interface o TTL-Compatible (VCC = 5V) o Single-Byte or Multiple-Byte (Burst Mode) Data Transfer for Read or Write of
PAGE 2
DS1302 Trickle-Charge Timekeeping Chip DETAILED DESCRIPTION The DS1302 trickle-charge timekeeping chip contains a real-time clock/calendar and 31 bytes of static RAM. It communicates with a microprocessor via a simple serial interface. The real-time clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year.
PAGE 3
DS1302 Trickle-Charge Timekeeping Chip Figure 1. Block Diagram TYPICAL OPERATING CHARACTERISTICS (VCC = 3.3V, TA = +25°C, unless otherwise noted.
PAGE 4
DS1302 Trickle-Charge Timekeeping Chip PIN DESCRIPTION PIN NAME FUNCTION Primary Power-Supply Pin in Dual Supply Configuration. VCC1 is connected to a backup source to maintain the time and date in the absence of primary power. The DS1302 operates from the larger of VCC1 or VCC2. When VCC2 is greater than VCC1 + 0.2V, VCC2 powers the DS1302. When VCC2 is less than VCC1, VCC1 powers the DS1302. 1 VCC2 2 X1 3 X2 4 GND 5 CE Input. CE signal must be asserted high during a read or a write.
PAGE 5
DS1302 Trickle-Charge Timekeeping Chip OSCILLATOR CIRCUIT The DS1302 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. Figure 1 shows a functional schematic of the oscillator circuit. If using a crystal with the specified characteristics, the startup time is usually less than one second.
PAGE 6
DS1302 Trickle-Charge Timekeeping Chip CE AND CLOCK CONTROL Driving the CE input high initiates all data transfers. The CE input serves two functions. First, CE turns on the control logic that allows access to the shift register for the address/command sequence. Second, the CE signal provides a method of terminating either single-byte or multiple-byte CE data transfer. A clock cycle is a sequence of a rising edge followed by a falling edge.
PAGE 7
DS1302 Trickle-Charge Timekeeping Chip CLOCK HALT FLAG Bit 7 of the seconds register is defined as the clock halt (CH) flag. When this bit is set to logic 1, the clock oscillator is stopped and the DS1302 is placed into a low-power standby mode with a current drain of less than 100nA. When this bit is written to logic 0, the clock will start. The initial power-on state is not defined. WRITE-PROTECT BIT Bit 7 of the control register is the write-protect bit.
PAGE 8
DS1302 Trickle-Charge Timekeeping Chip CLOCK/CALENDAR BURST MODE The clock/calendar command byte specifies burst mode operation. In this mode, the first eight clock/calendar registers can be consecutively read or written (see Table 3) starting with bit 0 of address 0. If the write-protect bit is set high when a write clock/calendar burst mode is specified, no data transfer will occur to any of the eight clock/calendar registers (this includes the control register).
PAGE 9
DS1302 Trickle-Charge Timekeeping Chip Table 3.
PAGE 10
DS1302 Trickle-Charge Timekeeping Chip ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………………………….-0.5Vto +7.0V Operating Temperature Range, Commercial………………………………………………………………….0°C to +70°C Operating Temperature Range, Industrial (IND)……………………………………………………………-40°C to +85°C Storage Temperature Range……………………………………………………………………………..….-55°C to +125°C Soldering Temperature (leads, 10 seconds)………………………………………………………………..………….
PAGE 11
DS1302 Trickle-Charge Timekeeping Chip CAPACITANCE (TA = +25°C) PARAMETER SYMBOL Input Capacitance I/O Capacitance MIN TYP MAX UNITS CI 10 pF CI/O 15 pF AC ELECTRICAL CHARACTERISTICS (TA = 0°C to +70°C or TA = -40°C to +85°C.) (Note 1) PARAMETER Data to CLK Setup CLK to Data Hold CLK to Data Delay CLK Low Time CLK High Time CLK Frequency CLK Rise and Fall CE to CLK Setup CLK to CE Hold CE Inactive Time CE to I/O High Impedance SCLK to I/O High Impedance SYMBOL VCC = 2.0V tDC VCC = 5V VCC = 2.
PAGE 12
DS1302 Trickle-Charge Timekeeping Chip Figure 6. Timing Diagram: Read Data Transfer CE tCC tF tR SCLK tCL tCCZ tCH tCDH tCDZ tCDD tDC I/O READ DATA BYTE ADDRESS/COMMAND BYTE Figure 7.
PAGE 13
DS1302 Trickle-Charge Timekeeping Chip REVISION HISTORY REVISION DATE 120208 3/15 DESCRIPTION Removed the leaded parts and references to the 16-pin SO package. In the Features section, changed the 31 x 8 RAM feature to indicate that it is battery backed. Updated Figure 1 and removed original Figure 2 (oscillator circuit). PAGES CHANGED 1, 4, 12 1 3, 5 Added a new Table 2 for the trickle charger resistor and diode select. 7 Replaced the timing diagrams (Figures 6 and 7).