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DS1308

Low-Current I

C RTC with 56-Byte NV RAM

General Description

The DS1308 serial real-time clock (RTC) is a low-power,

full binary-coded decimal (BCD) clock/calendar plus

56 bytes of NV RAM. Address and data are transferred

serially through an I

C interface. The clock/calendar

provides seconds, minutes, hours, day, date, month,

and year information. The end of the month date is auto-

matically adjusted for months with fewer than 31 days,

including corrections for leap year. The clock operates

in either the 24-hour or 12-hour format with an AM/PM

indicator. The DS1308 has a built-in power-sense circuit

that detects power failures and automatically switches to

the backup supply, maintaining time and date operation.

Applications

Handhelds (GPS, POS Terminal)

Consumer Electronics (Set-Top Box, Digital

Recording, Network Appliance)

Office Equipment (Fax/Printer, Copier)

Medical (Glucometer, Medicine Dispenser)

Telecommunications (Router, Switcher, Server)

Other (Utility Meter, Vending Machine,

Thermostat, Modem)

Features

S Low Timekeeping Current of 250nA (typ)

S Compatible with Crystal ESR Up to 100kω

S RTC Counts Seconds, Minutes, Hours, Date,

Month, Day of the Week, and Year with Leap-Year

Compensation Up to 2400

S 56-Byte, Battery-Backed, General-Purpose RAM

with Unlimited Writes

S I

C Serial Interface

S External Clock Source for Synchronization Clock

Reference (e.g., 32kHz, 50Hz/60Hz Powerline, GPS

1PPS)

S Programmable Square-Wave Output Signal

S Automatic Power-Fail Detect and Switch Circuitry

S -40NC to +85NC Operating Temperature Range

S Underwriters Laboratories (UL) Recognized

Typical Operating Circuit

19-6353; Rev 2; 7/14

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/DS1308.related

DS1308

SCL

SDA

SQW/CLKIN

BAT

GND

CPU

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Summary of content (16 pages)

PAGE 1
DS1308 Low-Current I2C RTC with 56-Byte NV RAM General Description The DS1308 serial real-time clock (RTC) is a low-power, full binary-coded decimal (BCD) clock/calendar plus 56 bytes of NV RAM. Address and data are transferred serially through an I2C interface. The clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year.
PAGE 2
DS1308 Low-Current I2C RTC with 56-Byte NV RAM ABSOLUTE MAXIMUM RATINGS (All voltages relative to ground.) Voltage Range on VCC or VBAT............................-0.3V to +6.0V Voltage on Any Non-Power Pin................. -0.3V to (VCC + 0.3V) Operating Temperature Range........................... -40NC to +85NC Junction Temperature Maximum......................................+150NC Storage Temperature Range............................. -55NC to +125NC Lead Temperature (soldering, 10s)..................
PAGE 3
DS1308 Low-Current I2C RTC with 56-Byte NV RAM DC ELECTRICAL CHARACTERISTICS (VCC = 0V, VBAT = VBATMIN to VBATMAX, TA = -40NC to +85NC, unless otherwise noted.
PAGE 4
DS1308 Low-Current I2C RTC with 56-Byte NV RAM POWER-UP/DOWN CHARACTERISTICS (TA = -40NC to +85NC, unless otherwise noted.) (Notes 2, 16) PARAMETER Recovery at Power-Up SYMBOL MIN tREC TYP MAX UNITS 1 2 ms VCC Slew Rate (VPF to 0V) tVCCF 1/50 V/Fs VCC Slew Rate (0V to VPF) tVCCR 1/1 V/Fs MAX UNITS CAPACITANCE (TA = +25NC, unless otherwise noted.) (Note 16) PARAMETER SYMBOL MIN TYP Input Capacitance CI 10 pF I/O Capacitance CO 10 pF Warning: Negative undershoots below -0.
PAGE 5
DS1308 Low-Current I2C RTC with 56-Byte NV RAM SDA tBUF tF tLOW tSP tHD:STA SCL tHD:STA tHIGH tR tHD:DAT STOP tSU:STA tSU:STO tSU:DAT START REPEATED START NOTE: TIMING IS REFERENCED TO VILMAX AND VIHMIN. Figure 1. Data Transfer on I2C Serial Bus VCC VPF tREC tVCCF tVCCR SCL RECOGNIZED DON’T CARE RECOGNIZED SDA VALID HIGH IMPEDANCE VALID Figure 2.
PAGE 6
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Typical Operating Characteristics (VCC = +3.3V, TA = +25NC, unless otherwise specified.) +85°C 120 110 +25°C 90 -40°C 80 +85°C 300 250 200 +25°C 3.5 4.0 4.5 5.0 5.5 3.5 4.5 DS1308 toc03 -40°C 2.5 BATTERY VOLTAGE (V) DS1308 toc04 TA = +25°C, OUT = ECLK = SQWE = 0 3.5 4.5 5.5 BATTERY VOLTAGE (V) POWER-SUPPLY CURRENT vs. SCL FREQUENCY 0.3 VCC = 1.3V 0.2 VCC = 3.0V VCC = 5.
PAGE 7
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Pin Configuration TOP VIEW X1 1 X2 2 VBAT 3 GND 4 + DS1308 8 VCC 7 SQW/CLKIN 6 SCL 5 SDA µSOP Pin Description PIN NAME 1 X1 2 X2 FUNCTION 32.768kHz Crystal Connections. The internal oscillator circuitry is designed for use with a crystal having a specified load capacitance (CL) of 6pF.
PAGE 8
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Functional Diagram 32.768kHz 8.192kHz 4.096kHz X1 /4 /2 /32 128Hz EXTSYNC OSC-1Hz MUX/ BUFFER EXT-1Hz DIVIDER X2 SQW/CLKIN N VCC POWER CONTROL VBAT SCL SDA N CONTROL LOGIC SERIAL BUS INTERFACE AND ADDRESS REGISTER RAM OSC-1Hz Detailed Description The DS1308 serial RTC is a low-power, full BCD clock/ calendar plus 56 bytes of NV SRAM. Address and data are transferred serially through an I2C interface.
PAGE 9
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Freshness Seal Mode When a battery is first attached to the device, the device does not immediately provide battery-backup power to the RTC or internal circuitry. After VCC exceeds VPF, the devices leave the freshness seal mode and provide battery-backup power whenever VCC subsequently falls below VBAT.
PAGE 10
DS1308 Low-Current I2C RTC with 56-Byte NV RAM RTC and RAM Address Map Table 3 shows the address map for the RTC and RAM registers. The RTC registers and control register are located in address locations 00h–07h. The RAM registers are located in address locations 08h–3Fh. During a multibyte access, when the register pointer reaches 3Fh (the end of RAM space) it wraps around to location 00h (the beginning of the clock space).
PAGE 11
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Control Register (07h) The control register controls the operation of the SQW/CLKIN pin and provides oscillator status. Bit # BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Name OUT ECLK OSF SQWE LOS BBCLK RS1 RS0 1 0 1 1 1 1 1 1 POR Bit 7: Output Control (OUT). Controls the output level of the SQW/CLKIN pin when the square-wave output is disabled and VCC>VPF.
PAGE 12
DS1308 Low-Current I2C RTC with 56-Byte NV RAM External Synchronization When an external clock reference is used, the input from SQW/CLKIN is divided down to 1Hz. The 1Hz from the divider (Ext-1Hz, see Functional Diagram) is used to correct the 1Hz that is derived from the 32.768kHz oscillator (Osc-1Hz). As Osc-1Hz drifts in relation to Ext-1Hz, Osc-1Hz is digitally adjusted.
PAGE 13
DS1308 Low-Current I2C RTC with 56-Byte NV RAM If the difference between Ext-1Hz and Osc-1Hz is greater than about 0.8%, Osc-1Hz runs unadjusted (see Figure 4) and the loss of signal (LOS) is set, provided the enable external clock input bit (ECLK) is set. I2C Serial Port Operation I2C Slave Address The DS1308’s slave address byte is D0h. The first byte sent to the device includes the device identifier and the R/W bit (Figure 6).
PAGE 14
DS1308 Low-Current I2C RTC with 56-Byte NV RAM I2C Communication bytes. The master must NACK the last byte read to terminate communication so the slave returns control of SDA to the master. Writing a Single Byte to a Slave: The master must generate a START condition, write the slave address byte (R/W = 0), write the memory address, write the byte of data, and generate a STOP condition. Remember the master must read the slave’s acknowledgment during all byte write operations.
PAGE 15
DS1308 Low-Current I2C RTC with 56-Byte NV RAM impractical, the following method should be used to perform reads from a specified memory location. Manipulating the Address Counter for Reads: A dummy write cycle can be used to force the address counter to a particular value.
PAGE 16
DS1308 Low-Current I2C RTC with 56-Byte NV RAM Revision History REVISION NUMBER REVISION DATE 0 5/12 Initial release 1 4/13 Added -18 ordering variant and UL certification number 2 7/14 Added missing specs for 3.0V version DESCRIPTION PAGES CHANGED — 2, 15 2 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied.