9-5500; Rev 9/10 DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM www.maxim-ic.com FEATURES Integrated NV SRAM, Real-Time Clock (RTC), Crystal, Power-Fail Control Circuit, and Lithium Energy Source TOP VIEW RST A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 Clock Registers are Accessed Identically to the Static RAM; These Registers Reside in the 16 Top RAM Locations Century Byte Register (i.e.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM PIN DESCRIPTION A0–A16 DQ0–DQ7 IRQ/FT RST CE OE WE VCC GND N.C.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM DESCRIPTION The DS1556 is a full-function, year-2000-compliant (Y2KC), real-time clock/calendar (RTC) with an RTC alarm, watchdog timer, power-on reset, battery monitor, and 128k x 8 nonvolatile static RAM. User access to all registers within the DS1556 is accomplished with a byte-wide interface as shown in Figure 1. The RTC registers contain century, year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM Figure 1. Block Diagram Maxim DS1556 Table 1. Operating Modes VCC VCC > VPF VSO < VCC
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM a typical application, the OE signal will be high during a write cycle. However, OE can be active provided that care is taken with the data bus to avoid bus contention. If OE is low prior to WE transitioning low, the data bus can become active with read data defined by the address inputs. A low transition on WE will then disable the outputs tWEZ after WE goes active.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM CLOCK OPERATIONS Table 2 and the following paragraphs describe the operation of RTC, alarm, and watchdog functions. Table 2.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM READING THE CLOCK When reading the RTC data, it is recommended to halt updates to the external set of double-buffered RTC Registers. This puts the external registers into a static state allowing data to be read without register values changing during the read process. Normal updates to the internal registers continue while in this state. External updates are halted when a 1 is written into the read bit, B6 of the Control Register (1FFF8h).
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM USING THE CLOCK ALARM The alarm settings and control for the DS1556 reside within Registers 1FFF2h to 1FFF5h. Register 1FFF6h contains two alarm enable bits: Alarm Enable (AE) and Alarm in Backup Enable (ABE). The AE and ABE bits must be set as described below for the IRQ/FT output to be activated for a matched alarm condition. The alarm can be programmed to activate on a specific day of the month or repeat every day, hour, minute, or second.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM Figure 3. Clearing IRQ Waveforms CE=0 The IRQ/FT pin can also be activated in the battery-backed mode. The IRQ/FT will go low if an alarm occurs and both ABE and AE are set. The ABE and AE bits are cleared during the power-up transition, however an alarm generated during power-up will set AF. Therefore, the AF bit can be read after system power-up to determine if an alarm was generated during the power-up sequence.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM USING THE WATCHDOG TIMER The watchdog timer can be used to detect an out-of-control processor. The user programs the watchdog timer by setting the desired amount of time-out into the 8-bit Watchdog Register (Address 1FFF7h). The five Watchdog Register bits BMB4 to BMB0 store a binary multiplier and the two lower order bits RB1 to RB0 select the resolution, where 00=1/16 second, 01=1/4 second, 10=1 second, and 11=4 seconds.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………..……………………………………………..-0.3V to +6.0V Storage Temperature Range EDIP........................………………………………………………………………...................................-40°C to +85°C PowerCap..............………………………………………………….…………………………………..-55°C to +125°C Lead Temperature (soldering, 10s).………...........................................................................................................
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V 10%, Over the Operating Range.) PARAMETER Active Supply Current TTL Standby Current (CE = VIH) CMOS Standby Current (CE VCC - 0.2V) Input Leakage Current (Any Input) Output Leakage Current (Any Output) Output Logic 1 Voltage (IOUT = -1.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM AC CHARACTERISTICS—READ CYCLE (Over the Operating Range) PARAMETER SYMBOL VCC = 5.0V 10% MIN MAX 70 VCC = 3.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM Figure 6. Write Cycle Timing, Write-Enable Controlled Figure 7.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM POWER-UP/DOWN CHARACTERISTICS—5V (VCC = 5.0V 10%, Over the Operating Range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CE or WE at VIH, Before Power-Down tPD 0 s VCC Fall Time: VPF(MAX) to VPF(MIN) VCC Fall Time: VPF(MIN) to VSO VCC Rise Time: VPF(MIN) to VPF(MAX) tF tFB tR 300 10 0 s s s VPF to RST High Expected Data-Retention Time (Oscillator On) tREC 40 tDR (Notes 6, 7) Figure 8.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM POWER-UP/DOWN CHARACTERISTICS—3.3V (VCC = 3.3V 10%, Over the Operating Range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CE or WE at VIH, Before Power-Down tPD 0 s VCC Fall Time: VPF(MAX) to VPF(MIN) VCC Rise Time: VPF(MIN) to VPF(MAX) tF tR 300 0 s s VPF to RST High tREC 40 Expected Data-Retention Time (Oscillator On) tDR (Notes 6, 7) 200 10 ms years Figure 9. Power-Up/Down Waveform Timing (3.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM AC TEST CONDITIONS Output Load: 50 pF + 1TTL Gate Input Pulse Levels: 0.0 to 3.0V Timing Measurement Reference Levels: Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5 ns NOTES: 1. 2. 3. 4. 5. 6. 7. Voltage referenced to ground. Typical values are at +25C and nominal supplies. Outputs are open. Battery switchover occurs at the lower of either the battery voltage or VPF. The IRQ/FT and RST outputs are open drain.
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM REVISION HISTORY REVISION DATE DESCRIPTION PAGES CHANGED 9/10 Updated the Ordering Information table to include only lead-free parts; updated the Absolute Maximum Ratings section to include the storage temperature range and lead and soldering temperatures for EDIP and PowerCap packages; added Note 11 to the ICC parameter in the DC Electrical Characteristics tables (for 5.0V and 3.
