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GENERAL DESCRIPTION

The DS1672 incorporates a 32-bit counter and

power-monitoring functions. The 32-bit counter

is designed to count seconds and can be used to

derive time-of-day, week, month, month, and

year by using a software algorithm. A precision,

temperature-compensated reference and

comparator circuit monitors the status of V

When an out-of-tolerance condition occurs, an

internal power-fail signal is generated that forces

the reset to the active state. When V

returns to

an in-tolerance condition, the reset signal is kept

in the active state for a period of time to allow

the power supply and processor to stabilize.

FEATURES

 32-Bit Counter

 I

C Serial Interface

 Automatic Power-Fail Detect and Switch

Circuitry

 Power-Fail Reset Output

 Low-Voltage Oscillator Operation

(1.3V min)

 Trickle-Charge Capability

 Underwriters Laboratories (UL) Recognized

 -40°C to +85°C Operating Range

PIN CONFIGURATION

TYPICAL OPERATING CIRCUIT

PDIP

SOP

TOP VIEW

RST

SCL

SDA

BACKUP

GND

DS1672

C 32-Bit Binary Counter RTC

19-6032; Rev 9/11

Summary of content (15 pages)

PAGE 1
9-6032; Rev 9/11 DS1672 I C 32-Bit Binary Counter RTC 2 GENERAL DESCRIPTION FEATURES The DS1672 incorporates a 32-bit counter and power-monitoring functions. The 32-bit counter is designed to count seconds and can be used to derive time-of-day, week, month, month, and year by using a software algorithm. A precision, temperature-compensated reference and comparator circuit monitors the status of VCC.
PAGE 2
DS1672 ORDERING INFORMATION PART TEMP RANGE VOLTAGE (V) PIN-PACKAGE TOP MARK* DS1672-2+ -40°C to +85°C 2.0 8 PDIP (300 mils) DS1672-2 DS1672-3+ -40°C to +85°C 3.0 8 PDIP (300 mils) DS1672-3 DS1672-33+ -40°C to +85°C 3.3 8 PDIP (300 mils) DS1672-33 DS1672S-2+ -40°C to +85°C 2.0 8 SO (150 mils) D1672-2 DS1672S-3+ -40°C to +85°C 3.0 8 SO (150 mils) D1672-3 DS1672S-33+ -40°C to +85°C 3.3 8 SO (150 mils) D167233 DS1672S-3+T&R -40°C to +85°C 3.
PAGE 3
DS1672 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………..-0.5V to +6.0V Operating Temperature Range (noncondensing) ...…………………………………………-40°C to +85°C Storage Temperature Range……………………………………………………………….-55°C to +125°C Soldering Temperature (reflow)………………………………………….…………………. +260°C Lead Temperature (soldering, 10s) ………………………………………………………………..
PAGE 4
DS1672 DC ELECTRICAL CHARACTERISTICS (VCC = 0V, TA = -40°C to +85°C.) (Note 5) PARAMETER VBACKUP Current (Oscillator On) VBACKUP Current (Oscillator Off) SYMBOL MIN IBACKUPOSC IBACKUP TYP MAX UNITS 0.425 1 200 µA nA MAX UNITS kHz kΩ pF Note 5: Using the recommended crystal on X1 and X2. CRYSTAL SPECIFICATIONS* PARAMETER Nominal Frequency Series Resistance Load Capacitance SYMBOL fO ESR CL MIN TYP 32.
PAGE 5
DS1672 AC ELECTRICAL CHARACTERISTICS (VCC = 0V, TA = -40°C to +85°C.) PARAMETER SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition (Note 6) SYMBOL tBUF tHD:STA HIGH Period of SCL Clock tHIGH Setup Time for a Repeated START Condition tSU:STA Data Hold Time (Notes 7, 8) tHD:DAT Data Setup Time (Note 9) tSU:DAT Capacitive Load for Each Bus Line (Note 10) I/O Capacitance Fast mode 100 TYP MAX kHz 1.3 Standard mode 4.7 Fast mode 0.
PAGE 6
DS1672 POWER-UP/POWER-DOWN CHARACTERISTICS (TA = -40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS 10 µs VCC Detect to RST (VCC Falling) VCC Detect to RST (VCC Rising) (Note 11) VCC Fall Time; VPF(MAX) to VPF(MIN) tRPU tF 300 µs VCC Rise Time; VPF(MIN) to VPF(MAX) tR 0 µs tRPD 250 ms Note 11: If the EOSC bit in the control register is set to logic 1, tRPU is equal to 250ms plus the startup time of the crystal oscillator. Warning: Negative undershoots below –0.
PAGE 7
DS1672 PIN DESCRIPTION PIN NAME 1, 2 X1, X2 3 VBACKUP 4 GND 5 SDA 6 SCL 7 RST 8 VCC FUNCTION Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is designed for operation with a crystal having a specified load capacitance (CL) of 6pF. For more information about crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks. The DS1672 can also be driven by an external 32.
PAGE 8
DS1672 Detailed Description The DS1672 provides a 32-bit counter that increments once-per-second. The counter data is accessible via an I2C serial interface. A precision, temperature-compensated, voltage reference and comparator circuit monitors VCC. When VCC drops below VPF, RST becomes active and the interface is disabled to prevent data corruption. The device switches to the backup supply input, which maintains oscillator and counter operation while VCC is absent.
PAGE 9
DS1672 trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the oscillator circuit may result in the clock running fast. Refer to Application Note 5: “Crystal Considerations with Dallas Real-Time Clocks” for detailed information. Address Map The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h–03h).
PAGE 10
DS1672 Trickle Charger The trickle charger is controlled by the trickle charge register. The simplified schematic of Figure 5 shows the basic components of the trickle charger. The trickle charge select (TCS) bit (bits 4–7) controls the selection of the trickle charger. In order to prevent accidental enabling, only a pattern on 1010 will enable the trickle charger. All other patterns will disable the trickle charger. The DS1672 powers up with the trickle charger disabled.
PAGE 11
DS1672 Figure 5. Programmable Trickle Charger R1 VCC 250Ω VBACKUP R2 2kΩ R3 4kΩ 1 OF 16 SELECT 1 OF 2 SELECT NOTE: ONLY 1010 ENABLES TCS BIT 7 TCS BIT 6 TCS BIT 5 TCS BIT 4 DS BIT 3 DS BIT 2 1 OF 3 SELECT RS BIT 1 RS BIT 0 TCS = TRICKLE CHARGER SELECT DS = DIODE SELECT RS = RESISTOR SELECT TRICKLE CHARGE REGISTER I2C Serial Data Bus The DS1672 supports a bidirectional I2C bus and data transmission protocol.
PAGE 12
DS1672 Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START condition and terminated with a STOP condition.
PAGE 13
DS1672 with the DS1672 acknowledging each byte received. The register pointer will increment after each byte is transferred. The master will generate a stop condition to terminate the data write. 2) Slave transmitter mode (DS1672 read mode): The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is reversed. Serial data is transmitted on SDA by the DS1672 while the serial clock is input on SCL.
PAGE 14
DS1672 S 1101000 Figure 8. Data Read: Slave Transmitter Mode 1 A XXXXXXXX A XXXXXXXX A XXXXXXXX A P S - START DATA TRANSFERRED A - ACKNOWLEDGE (X+1 BYTES + ACKNOWLEDGE); NOTE: LAST DATA BYTE IS P - STOP FOLLOWED BY A NOT ACKNOWLEDGE (A) SIGNAL) A - NOT ACKNOWLEDGE R/W - READ/WRITE OR DIRECTION BIT ADDRESS = D1H THERMAL INFORMATION PACKAGE 8 PDIP (300 mils) 8 SO (150 mils) 8 µSOP (3mm) THETA-JA 110°C/W 128.
PAGE 15
DS1672 REVISION HISTORY REVISION DATE DESCRIPTION PAGES CHANGED 9/11 Updated the Ordering Information, Absolute Maximum Ratings, Recommended Operating Conditions, DC Electrical Characteristics, AC Electrical Characteristics, Pin Description, Trickle Charger, Thermal Information, and Package Information 2, 3, 5, 7, 10, 15 15 of 15 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.