Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - Digital potentiometer logarithmic Non-permanent SO 16

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FEATURES

§ Two 32-position log-tapers

§ 60dB attenuation range:

–1dB per step (12 taps)

–2dB per step (12 taps)

–3dB per step (8 taps)

–90dB low-end attenuation

§ 2-Wire Interface Control

§ Power Supply: Dual ±12V

§ Maximum Voltage Across Potentiometers:

±12V

§ Standard Resistance Value: 45kW

§ Packages: 16-Pin SOIC

§ Operating Temperature: -40

C to +85

ORDERING INFORMATION

DS1808Z-050 16-Pin SOIC -40ºC to

+85ºC 45kΩ

DS1808Z-050/T&R 16-Pin SOIC -40ºC to

+85ºC 45kΩ

PIN ASSIGNMENT

SCL

SDA

GND

PIN DESCRIPTION

- +12V Supply

- -12V Supply (substrate bias)

- 5V Digital Supply

, H

- High-end Terminals

, L

- Low-end Terminals

, W

- Wiper Terminals

SDA - 2-Wire Serial Data Input/Output

SCL - 2-Wire Clock Input

/CE - 2-Wire Interface Enable

GND - Ground

A0, A1, A2 - Address Pins

DESCRIPTION

The DS1808 is a dual-channel, digitally controlled, log-taper potentiometer. Each potentiometer is

comprised of 32 wiper terminal positions plus a mute position. The device has three accessible

potentiometer terminals that include the high-side terminal (H), the low-side terminal (L), and the wiper

terminal (W). The resolution of the DS1808 is shown in Figure 8 and represents 1dB per step for the first

12 taps, 2dB per step for the next 12 taps and 3dB per step for the bottom 8 taps, providing a total

attenuation range of 60dB. The mute position of the DS1808 provides greater than 90dB of attenuation.

The wiper position on the resistor ladder is selected via a 6-bit register, whose value is controlled by the

industry-standard 2-wire interface. The interface consists of two control signals: SDA and SCL. The

DS1808 is available in a standard 45kW resistor value. The DS1808 is specified to operate over the

industrial temperature range (-40

C to +85

C) and is available in the 16-pin SOIC package. The DS1808

was designed for low-cost, stereo volume control applications. The device is specified to operate from

±12V

±10% supplies and accept a maximum input signal range of ±12V.

DS1808

Dual Log Digital Potentiomete

www.maxim-ic.com

16-Pin SOIC (150-mil)

Summary of content (17 pages)

PAGE 1
DS1808 Dual Log Digital Potentiometer www.maxim-ic.
PAGE 2
DS1808 DS1808 BLOCK DIAGRAM Figure 1 W1 W0 H0 L0 0dB 0dB 60dB 60dB >90dB >90dB L1 Address Lines A0 – A2 SDA SCL H1 Control Logic CE VCC (+12V Supply) GND Power Supply VB (-12V Supply) VDD (5V Supply) PIN DESCRIPTIONS VCC – Power Supply Terminal. This pin acts as the positive rail. The DS1808 will support positive supply voltages ranging from 5 to 13.2 volts. When VCC–VB is less than 8 volts the series wiper resistance will increase up to 1kW. The value of VDD should never exceed VCC.
PAGE 3
DS1808 A0, A1, A2 – Address Inputs. These input pins specify the address of the device when used in a multidropped configuration. Up to eight individual DS1808s may be addressed on a single 2-wire bus. H0, H1 – These are the high-end terminals of the potentiometers. For both potentiometers, it is not required that these terminals be connected to a potential greater than the low-end terminal of the potentiometer.
PAGE 4
DS1808 OPERATION The DS1808 is a dual-channel, digitally controlled, logarithmic potentiometer. Each potentiometer has three accessible terminals, which include H, L, and W. Between each resistor element is a tap-point that is multiplexed to the wiper terminal, W. A block diagram of the DS1808 is shown in Figure 1. Potentiometer Characteristics The DS1808 is a volatile device and always powers-up with the wiper positions set to the mute position (33-decimal) with 90-dB of signal attenuation.
PAGE 5
DS1808 2-WIRE SERIAL PROTOCOL The following bus protocol has been defined: § Data transfer may be initiated only when the bus is not busy. § During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus not busy: Both data and clock lines remain high.
PAGE 6
DS1808 The master device generates all serial clock pulses and the start and stop conditions. A transfer is ended with a stop condition or with a repeated start condition. Since a repeated start condition is also the beginning of the next serial transfer, the bus will not be released. The DS1808 may operate in the following two modes: 1. Slave receiver mode: Serial data and clock are received through SDA and SCL respectively. After each byte is received, an acknowledge bit is transmitted.
PAGE 7
DS1808 READING THE DS1808 As shown in Figure 4, the DS1808 provides one read command operation. This operation allows the user to read both potentiometers. To initiate a read operation, the R/W bit of the command/control byte is set to 1. Communication to read the DS1808 begins with a start condition, which is issued by the master device. The command/control byte from the master device will follow the start condition.
PAGE 8
DS1808 Figure 3 Figure 4 Figure 5 Figure 6 8 of 17
PAGE 9
DS1808 Figure 7 9 of 17
PAGE 10
DS1808 TAP/ATTENUATION TABLE Figure 8 TAP POSITION 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 ATTENUATION (dB) 0 1 2 3 4 5 6 7 8 9 10 11 12 14 16 18 20 22 24 26 28 30 32 34 36 39 42 45 48 51 54 57 60 90 10 of 17
PAGE 11
DS1808 ABSOLUTE MAXIMUM RATINGS* Voltage on All Pins (except /CE, SDA, SCL, A0, A1, and A2) Relative to Ground Voltage on Pins /CE, SDA, SCL, A0, A1, and A2 Operating Temperature Storage Temperature Soldering Temperature VB - 0.3V to VCC + 0.3V GND - 0.3V to VDD + 0.
PAGE 12
DS1808 ANALOG RESISTOR CHARACTERISTICS (-40°C to +85°C/VCC, VB=±5V to ±13.2V/VDD=4.5V to 5.5V) PARAMETER SYMBOL CONDITION End-to-End Resistance MIN TYP -20 Total Resistance MAX UNITS +20 % NOTES 45kW Absolute Linearity -0.5 +0.5 LSB 9 Relative Linearity -0.25 +0.25 LSB 10 Interchannel Matching -0.5 +0.5 dB -3 dB Cutoff frequency fcutoff 5 MHz 2.2 mVRMS 0.
PAGE 13
DS1808 AC ELECTRICAL CHARACTERISTICS (-40oC to +85oC, VDD=4.5V to 5.5V) PARAMETER SCL Clock Frequency MIN 0 0 1.3 4.7 0.6 4.0 1.3 4.7 0.6 4.0 0 0 100 250 0.6 4.7 20+0.1 CB 20+0.1 CB 0.6 4.
PAGE 14
DS1808 NOTES: 1. All voltages are referenced to ground. 2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VCC is switched off. 3. The value of VDD should never exceed VCC, including during power-ups. VCC must be applied before either VDD or VB. VDD and VB can then follow in any order. 4. ISTBY specified for VDD equal to 5.0V. Control port logic pins are driven to the appropriate logic levels. Appropriate logic levels specify that logic inputs are within a 0.
PAGE 15
DS1808 TYPICAL OPERATING CHARACTERISTICS (VCC = 12V, VB = -12V, VDD = 5V, T = +25ºC, unless otherwise specified.
PAGE 16
DS1808 TYPICAL OPERATING CHARACTERISTICS (cont.) (VCC = 12V, VB = -12V, VDD = 5V, T = +25ºC, unless otherwise specified.
PAGE 17
DS1808 TYPICAL OPERATING CHARACTERISTICS (cont.) (VCC = 12V, VB = -12V, VDD = 5V, T = +25ºC, unless otherwise specified.