Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - Digital potentiometer linear Permanent TSSOP 14

1 of 14 011006

FEATURES

§ Two linear taper potentiometers

- DS1845-010 one 10k, 100 position &

one 10k, 256 position

- DS1845-050 one 10k, 100 position &

one 50k, 256 postition

- DS1845-100 one 10k, 100 position &

one 100k, 256 position

§ 256 bytes of EEPROM memory

§ Access to data and potentiometer control via

an I

C compatible 2-wire interface

§ External Write Enable pin to protect data and

potentiometer settings

§ Nonvolatile wiper storage

§ Operates from 3V or 5V supplies

§ Packaging: Flip Chip Package, 16-ball

CSBGA, 14-pin TSSOP

§ Industrial operating temperature: -40ºC to

+85ºC

16-Ball CSBGA (4mm x 4mm)

14-Pin Flip Chip (100-mil x 100-mil) (Not Shown)

DESCRIPTION

The DS1845 Dual NV Potentiometer and Memory consists of one 100-position linear taper

potentiometer, one 256-position linear taper potentiometer, 256 bytes of EEPROM memory, and a 2-wire

interface. The device provides an ideal method for setting bias voltages and currents in control

applications using a minimum of circuitry. The EEPROM memory allows a user to store configuration

or calibration data for a specific system or device as well as provide control of the potentiometer wiper

settings. Any type of user information may reside in the first 248 bytes of this memory. The next two

addresses of EEPROM memory are for potentiometer settings. Access to this EEPROM is via an

industry standard 2-wire bus. The wiper position of the DS1845, as well as EEPROM data, can be

hardware write-protected using the Write Protect (WP) input pin. Up to eight DS1845s can be installed

on a single 2-wire bus. Access to an individual device is achieved by using a device address that is

determined by the logic levels of address pins A0 though A2. Additionally, the DS1845 will operate

from 3 volt or 5 volt supplies. Three package options are available: Flip Chip Package, 16-ball CSBGA

and 14-pin TSSOP.

DS1845

Dual NV Potentiomete

and Memory

www.maxim-ic.com

SDA 1 14 Vcc

SCL 2 13 H0

A0 3 12 W1

A1 4 11 H1

A2 5 10 L1

WP 6 9 W0

GND 7 8 L0

14-Pin TSSOP (173 mil)

1 2 3 4

Top View

Summary of content (14 pages)

PAGE 1
DS1845 Dual NV Potentiometer and Memory www.maxim-ic.
PAGE 2
DS1845 PIN DESCRIPTIONS Name TSSOP BGA VCC 14 A3 GND SDA 7 1 D1 B2 SCL 2 A2 WP 6 C1 A0 3 A1 A1 A2 H0 4 5 13 B1 C2 A4 H1 L0 11 8 B3 D3 L1 W0 10 9 C4 D4 W1 12 B4 NC NC C3 D2 Description Power Supply Terminal. The DS1845 will support supply voltages ranging from +2.7V to +5.5V. Ground Terminal. 2-Wire serial data interface. The serial data pin is for serial data transfer to and from the DS1845.
PAGE 3
DS1845 DS1845 BLOCK DIAGRAM Figure 1 VCC GND 248 BYTES EEPROM MEMORY 2-WIRE INTERFACE SDA CONTROL 6 RESERVED BYTES SCL WP DATA 1 BYTE WIPER SETTING POT 0 A0 A1 A2 POTENTIOMETER 0 H0 100 Position Pot W0 L0 POTENTIOMETER 1 1 BYTE WIPER SETTING POT 1 256 Position Pot H1 W1 L1 MEMORY ORGANIZATION The DS1845’s serial EEPROM is internally organized with 256 words of 1 byte each. Each word requires an 8-bit address for random word addressing.
PAGE 4
DS1845 2-Wire Interface Reset: After any interruption in protocol, power loss, or system reset, the following steps reset the DS1845. 1. Clock up to nine cycles. 2. Look for SDA high in each cycle while SCL is high. 3. Create a start condition while SDA is high. Device Addressing: The DS1845 must receive an 8-bit device address word following a start condition to enable a specific device for a read or write operation. The address word is clocked into the DS1845 MSB to LSB.
PAGE 5
DS1845 CURRENT ADDRESS READ The DS1845 has an internal address register that maintains the address used during the last read or write operation, incremented by one. This data is maintained as long as VCC is valid. If the most recent address was the last byte in memory, then the register resets to the first address. This address stays valid between operations as long as power is available.
PAGE 6
DS1845 Start data transfer: A change in the state of the data line from HIGH to LOW while the clock is HIGH defines a START condition. Stop data transfer: A change in the state of the data line from LOW to HIGH while the clock line is HIGH defines the STOP condition. Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal.
PAGE 7
DS1845 The DS1845 may operate in the following two modes: 1. Slave receiver mode: Serial data and clock are received through SDA and SCL respectively. After each byte is received, an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial transfer. Address recognition is performed by hardware after reception of the slave (device) address and direction bit. 2. Slave transmitter mode: The 1st byte is received and handled as in the slave receiver mode.
PAGE 8
DS1845 2- WIRE PROTOCOL DATA TRANSFER PROTOCOL Figure 2 2-WIRE AC CHARACTERISTICS Figure 3 8 of 14
PAGE 9
DS1845 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Programming Temperature Storage Temperature Soldering Temperature -0.5V to +6.0V -40°C to +85°C; Industrial 0°C to +70°C -55°C to +125°C See J-STD-020 specification * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
PAGE 10
DS1845 DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Supply Current Active ICC Input Leakage ILI Wiper Resistance 3V 5V RW Wiper Current IW Low Level Output Voltage (SDA) CONDITION MIN TYP MAX UNITS NOTES 0.5 mA 12,13 +1 mA 1000 600 W 2 mA 0.7 VCC -0.5 VCC+0.5 0.3 VCC V -10 +10 mA 40 60 mA -1 500 250 Input Logic levels A0, A1, A2 Input Current each I/O pin Standby Current 3V 5V (-40°C to +85°C; VCC =2.7V to 5.5V) Input Logic 1 Input Logic 0 0.4
PAGE 11
DS1845 ANALOG RESISTOR CHARACTERISTICS (-40°C to +85°C; VCC=2.7V to 5.5V) PARAMETER SYMBOL End-to-End Resistance Absolute Linearity CONDITION MIN 25°C 10kW/100 pos. 10kW/256 pos. 20kW/256 pos. 50kW/256 pos. 100kW/256 pos. Relative Linearity -3dB Cutoff freq. 10kW/100 pos. all other pots fCUTOFF MAX UNITS -20 +20 % -0.75 -0.75 -1.0 -1.5 -2.25 +0.75 +0.75 +1.0 +1.5 +2.25 LSB 9 -0.25 -0.5 +0.25 +0.5 LSB 10 DS1845-010 End-to-End Temp.
PAGE 12
DS1845 AC ELECTRICAL CHARACTERISTICS (-40°C to 85°C , Vcc=2.7V to 5.5V) PARAMETER SCL clock frequency CONDITION Fast Mode Standard Mode Fast Mode Standard Mode MIN 0 0 1.3 4.7 Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode 0.6 4.0 1.3 4.7 0.6 4.0 0 0 100 250 0.6 4.7 20 + 0.1CB 20 + 0.1CB 0.6 4.
PAGE 13
DS1845 7. CB - total capacitance of one bus line in picofarads. Timing referenced to 0.9VCC and 0.1VCC. 8. EEPROM write begins after a stop condition occurs. 9. Absolute linearity is used to measure expected wiper voltage as determined by wiper position. 10. Relative linearity is used to determine the change of wiper voltage between two adjacent wiper positions. 11. When used as a rheostat or variable resister the temperature coefficient applies: 750 ppm/°C.
PAGE 14
DS1845 ORDERING INFORMATION ORDERING NUMBER DS1845E-010 DS1845E-010/T&R DS1845X-010/T&R DS1845B-010 DS1845E-050 DS1845E-050/T&R DS1845X-050/T&R DS1845B-050 DS1845E-100 DS1845E-100/T&R DS1845X-100/T&R DS1845B-100 DS1845E-100+ DS1845B-010+T&R DS1845B-010/T&R DS1845B-100+ DS1845E-100+T&R DS1845B-010+ DS1845E-010+ DS1845E-010+T&R DS1845E-050+T&R DS1845B-050+ DS1845E-050+ DS1845B-020 DS1845B-050/T&R DS1845B-050+T&R DS1845E-020 PACKAGE 14 PIN TSSOP (173 MIL) 14 PIN TSSOP/TAPE & REEL 14 PIN FLIP CHIP 16 BALL CSB