Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - Digital potentiometer linear Permanent TSSOP 16

Dual, Temperature-Controlled Resistors with Inter-

nally Calibrated Monitors and Password Protection

EVALUATION KIT AVAILABLE

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

DS1856

General Description

The DS1856 dual, temperature-controlled, nonvolatile

(NV) variable resistors with three monitors consists of

two 256-position, linear, variable resistors; three analog

monitor inputs (MON1, MON2, MON3); and a direct-to-

digital temperature sensor. The device provides an

ideal method for setting and temperature-compensating

bias voltages and currents in control applications using

minimal circuitry. The variable resistor settings are

stored in EEPROM memory and can be accessed over

the 2-wire serial bus.

Relative to other members of the family, the DS1856 is

essentially a DS1859 with a DS1852-friendly memory

map. In particular, the DS1856 can be configured so

the 128 bytes of internal Auxiliary EEPROM memory is

mapped into Main Device Table 00h and Table 01h,

maintaining compatibility between both the

DS1858/DS1859 and the DS1852. The DS1856 also

features password protection equivalent to the DS1852,

further enhancing compatibility between the two.

Applications

Optical Transceivers

Optical Transponders

Instrumentation and Industrial Controls

RF Power Amps

Diagnostic Monitoring

Features

o SFF-8472 Compatible

o Five Monitored Channels (Temperature, V

MON1, MON2, MON3)

o Three External Analog Inputs (MON1, MON2, MON3)

That Support Internal and External Calibration

o Scalable Dynamic Range for External Analog Inputs

o Internal Direct-to-Digital Temperature Sensor

o Alarm and Warning Flags for All Monitored

Channels

o Two Linear, 256-Position, Nonvolatile Temperature-

Controlled Variable Resistors

o Resistor Settings Changeable Every 2°C

o Three Levels of Security

o Access to Monitoring and ID Information

Configurable with Separate Device Addresses

o 2-Wire Serial Interface

o Two Buffers with TTL/CMOS-Compatible Inputs and

Open-Drain Outputs

o Operates from a 3.3V or 5V Supply

o -40°C to +95°C Operating Temperature Range

Ordering Information

Rev 1; 2/06

PART

RES0/RES1

RESISTANCE

(kΩ)

PIN-PACKAGE

DS1856E-050 50/50 16 TSSOP

DS1856E-050/T&R 50/50 16 TSSOP

DS1856B-050 50/50 16 CSBGA

TOP VIEW

CSBGA (4mm x 4mm)

1.0mm PITCH

324

MON3

OUT1IN2

MON1L0GND

N.C.

H0SDA

OUT2

SCLIN1

MON2

SDA

MON3

MON2

MON1

TSSOP

SCL

OUT1

IN2

IN1

OUT2

N.C.

GND

DS1856

Pin Configurations

DS1856

SDA

0.1μF

SCL

OUT1

IN1

OUT2

IN2

N.C.

GND

MON3

MON2

MON1

Rx POWER*

DIAGNOSTIC

INPUTS

TO LASER

MODULATION

CONTROL

TO LASER BIAS

CONTROL

DECOUPLING

CAPACITOR

Tx POWER*

Tx BIAS*

*SATISFIES SFF-8472 COMPATIBILITY

= 3.3V

4.7kΩ4.7kΩ

Tx-FAULT

LOS

2-WIRE

INTERFACE

Typical Operating Circuit

Ordering Information continued at end of data sheet.

Denotes lead-free package.

T&R denotes tape-and-reel package.

Note: All devices are specified over the -40°C to +95°C tem-

perature range.

Visit www.maximintegrated.com/products/patents

for

product patent marking information.

Summary of content (31 pages)

PAGE 1
EVALUATION KIT AVAILABLE DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection General Description The DS1856 dual, temperature-controlled, nonvolatile (NV) variable resistors with three monitors consists of two 256-position, linear, variable resistors; three analog monitor inputs (MON1, MON2, MON3); and a direct-todigital temperature sensor.
PAGE 2
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection ABSOLUTE MAXIMUM RATINGS Voltage Range on VCC Relative to Ground ...........-0.5V to +6.0V Voltage Range on Inputs Relative to Ground* ..............................................-0.5V to (VCC + 0.5V) Voltage Range on Resistor Inputs Relative to Ground* ..............................................-0.5V to (VCC + 0.5V) Current into Resistors............................................................
PAGE 3
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection ANALOG RESISTOR CHARACTERISTICS (VCC = 2.85V to 5.5V, TA = -40°C to +95°C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS kΩ Position 00h Resistance (50kΩ) TA = +25°C 0.65 1.0 1.35 Position FFh Resistance (50kΩ) TA = +25°C 40 50 60 kΩ Position 00h Resistance (30kΩ) TA = +25°C 0.165 0.275 0.400 kΩ Position FFh Resistance (30kΩ) TA = +25°C 22.5 30 37.
PAGE 4
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection AC ELECTRICAL CHARACTERISTICS (VCC = 2.85V to 5.5V, TA = -40°C to +95°C, unless otherwise noted. See Figure 6.
PAGE 5
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Note 10: After this period, the first clock pulse is generated. Note 11: The maximum tHD:DAT only has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal. Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) to bridge the undefined region of the falling edge of SCL.
PAGE 6
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Typical Operating Characteristics (continued) (VCC = 5.0V, TA = +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.) RESISTOR 0 DNL (LSB) RESISTOR 1 INL (LSB) 0 -0.2 -0.4 0.6 0.4 0.2 0 -0.2 -0.4 0.4 0.2 0 -0.2 -0.4 -0.6 -0.6 -0.6 -0.8 -0.8 -0.8 -1.0 -1.0 25 50 75 100 125 150 175 200 225 250 -1.
PAGE 7
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Typical Operating Characteristics (continued) (VCC = 5.0V, TA = +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.) POSITION FFh RESISTANCE vs. TEMPERATURE 20kΩ VERSION 0.37 50kΩ VERSION 49.75 20.00 DS1856 toc14 50.00 DS1856 toc13 0.38 POSITION FFh RESISTANCE vs. TEMPERATURE 20kΩ VERSION 19.80 0.35 RESISTANCE (kΩ) RESISTANCE (kΩ) RESISTANCE (kΩ) 49.50 0.
PAGE 8
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Pin Description PIN BALL NAME 1 B2 SDA FUNCTION 2-Wire Serial Data I/O Pin. Transfers serial data to and from the device. 2 A2 SCL 3 C3 OUT1 2-Wire Serial Clock Input. Clocks data into and out of the device. 4 A1 IN1 5 B1 OUT2 6 C2 IN2 TTL/CMOS-Compatible Input to Buffer 7 C1 N.C.
PAGE 9
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection AD MD MD MD AD (AUXILIARY DEVICE ENABLE A0h) EEPROM 128 x 8 BIT STANDARDS TABLE SELECT DEVICE ADDRESS MD (MAIN DEVICE ENABLE) DEVICE ADDRESS IF ADEN = 0, [00h - 7Fh OF AD] IF ADEN = 1, [80h-FFh OF MD, TABLE 00/01h] ADDRESS R/W ADEN ADFIX SDA TABLE SELECT TABLE SELECT EEPROM 72 x 8 BIT 80h-C7h ADDRESS ADDRESS TABLE 04 RESISTOR 0 LOOK-UP TABLE R/W EEPROM 72 x 8 BIT 80h-C7h TABLE 05 RESIS
PAGE 10
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Table 1. Scales for Monitor Channels at Factory Setting Table 3. Look-Up Table Address for Corresponding Temperature Values +FS SIGNAL +FS (hex) -FS SIGNAL -FS (hex) TEMPERATURE (°C) CORRESPONDING LOOK-UP TABLE ADDRESS Temperature +127.984° 7FFC -128°C 8000 <-40 80h SIGNAL VCC 6.5528V FFF8 0V 0000 -40 80h MON1 2.4997V FFF8 0V 0000 -38 81h MON2 2.
PAGE 11
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Table 4. ADEN Address Configuration ADEN (ADDRESS ENABLE) NO.
PAGE 12
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection DEC HEX 2-WIRE ADDRRESS A2h (DEFAULT) 0 0 00h NOTE 1: ADEN BIT = 1. ALL MEMORY (INCLUDING THE AUXILIARY MEMORY) IS ADDRESSED USING THE NOTE 1: MAIN DEVICE 2-WIRE SLAVE ADDRESS. NOTE 2: TABLES 00h AND 01h ACCESS THE SAME PHYSICAL MEMORY. NOTE 3: TABLE 02h DOES NOT EXIST.
PAGE 13
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection The DS1856 2-wire interface uses 8-bit addressing, which allows up to 256 bytes to be addressed traditionally on a given 2-wire slave address. However, since the Main Device contains more than 256 bytes, a table scheme is used. The lower 128 bytes of the Main Device, memory locations 00h to 7Fh, function as expected and are independent of the currently selected table. Byte 7Fh is the Table Select byte.
PAGE 14
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Memory Map LOWER MEMORY Row (hex) Row Name Word 0 Byte 0/8 Word 1 Byte 1/9 Byte 2/A Word 2 Byte 3/B Byte 4/C Word 3 Byte 5/D Byte 6/E Byte 7/F 00 <1> 08 <1> VCC Alarm Hi VCC Alarm Lo VCC Warn Hi VCC Warn Lo 10 <1> Mon1 Alarm Hi Mon1 Alarm Lo Mon1 Warn Hi Mon1 Warn Lo 18 <1> Mon2 Alarm Hi Mon2 Alarm Lo Mon2 Warn Hi Mon2 Warn Lo 20 <1> Mon3 Alarm Hi Mon3 Alarm Lo Mon3 W
PAGE 15
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Memory Map (continued) 60 62 Temp Value VCC Value 26 S 15 14 2 2 14 24 13 12 2 2 2 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 10 9 8 7 6 5 4 3 2 1 20 1 2 2 2 2 2 2 2 20 66 Mon2 Value 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 Mon3 Value 15 14 13 12 11 2 10 9 8 7 6 5 4 3 2 1 20 SoftHiz <2> 2 2 <2> 2 Temp Rdy
PAGE 16
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Memory Map (continued) TABLE 03 (CONFIGURATION) Row (hex) Row Name 80 <0> 88 <8> Config0 Config1 Word 0 Byte 0/8 <8> Word 1 Byte 1/9 Byte 2/A <4> Mode <4> Tindex Int Enable Config Word 2 Byte 3/B <4> Res0 <8> Res1 Reserved Byte 4/C Reserved Reserved chip addr Word 3 Byte 5/D <8> Reserved Byte 6/E <8> Reserved Reserved Byte 7/F <8> Reserved Rshift1 Rshift0 90 <8> Res
PAGE 17
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Memory Map (continued) TABLE 04 (LOOKUP TABLE FOR RESISTOR 0) Row (hex) Row Name Word 0 Word 1 Word 2 Word 3 Byte 0/8 Byte 1/9 Byte 2/A Byte 3/B Byte 4/C Byte 5/D Byte 6/E Byte 7/F C8 Empty Empty Empty Empty Empty Empty Empty Empty D0 Empty Empty Empty Empty Empty Empty Empty Empty D8 Empty Empty Empty Empty Empty Empty Empty Empty E0 Empty Empty Empty Empty
PAGE 18
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Memory Map (continued) TABLE 05 (LOOKUP TABLE FOR RESISTOR 1) Row (hex) Row Name Word 0 Word 1 Word 2 Word 3 Byte 0/8 Byte 1/9 Byte 2/A Byte 3/B Byte 4/C Byte 5/D Byte 6/E Byte 7/F C8 Empty Empty Empty Empty Empty Empty Empty Empty D0 Empty Empty Empty Empty Empty Empty Empty Empty D8 Empty Empty Empty Empty Empty Empty Empty Empty E0 Empty Empty Empty Empty
PAGE 19
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions Name of Row • • Name of Byte............. Name of Byte............. Threshold0 • • • • Temp High Alarm ..... <7FFFh> Temperature measurements above this two's complement threshold set its corresponding alarm bit. Measurements below this threshold clear the alarm bit.
PAGE 20
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions (continued) Threshold3 • • • • Mon2 High Alarm ..... Voltage measurements of the Mon2 input above this unsigned threshold set its corresponding alarm bit. Measurements below this threshold clear the alarm bit. Mon2 Low Alarm ......
PAGE 21
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions (continued) A2D Value1 • • • Mon3 Meas................ Reserved .................... Status ......................... a) Rhiz.................... b) Soft Hiz.............. c) Reserved ............ d) TxF ................... e) RxL ................... f) Rdyb................... • Update ....................... a) b) c) d) Temp Rdy .......... VCC Rdy............. Mon1 Rdy.......
PAGE 22
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions (continued) d) VCC Lo .............. Low Warning Status for VCC measurement. This bit is set when the VCC supply is below the POA trip point value. It clears itself when a VCC measurement is completed and the value is above the low threshold. e) MON1 Hi........... High Warning Status for MON1 measurement. f) MON1 Lo .......... Low Warning Status for MON1 measurement. g) MON2 Hi....
PAGE 23
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions (continued) • • • Config . Res0 ........................... The base value used for Resistor 0 and recalled from Table 4 at the memory address found in T Index. This register is updated at the end of the Temperature conversion. Res1 ...........................
PAGE 24
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Register Descriptions (continued) Scale0 • • • Scale1 VCC Scale................... <6.5535V> Controls the Scaling or Gain of the VCC measurements. MON1 Scale .............. <2.500V> Controls the Scaling or Gain of the MON1 measurements. MON2 Scale .............. <2.500V> Controls the Scaling or Gain of the MON2 measurements. • MON3 Scale .............
PAGE 25
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Programming the Look-up Table (LUT) The following equation can be used to determine which resistor position setting, 00h to FFh, should be written in the LUT to achieve a given resistance at a specific temperature.
PAGE 26
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection gain_result = gain_result + 2^n; Force the 90% FS input (2.949075V); Meas2 = read the digital result from the part; If Meas2 >= Clamp then gain_result = gain_result – 2^n; Else Force the null input (0.
PAGE 27
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Power-Up and Low-Voltage Operation During power-up, the device is inactive until V CC exceeds the digital power-on-reset voltage (POD). At this voltage, the digital circuitry, which includes the 2-wire interface, becomes functional.
PAGE 28
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection A page write is initiated the same way as a byte write, but the master does not send a STOP condition after the first byte. Instead, after the slave acknowledges the data byte has been received, the master can send up to seven more bytes using the same nine-clock sequence.
PAGE 29
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Stop data transfer: A change in the state of the data line from low to high while the clock line is high defines the STOP condition. Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the high period of the clock signal. The data on the line can be changed during the low period of the clock signal.
PAGE 30
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Within the bus specifications, a standard mode (100kHz clock rate) and a fast mode (400kHz clock rate) are defined. The DS1856 works in both modes. Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the byte has been received. The master device must generate an extra clock pulse, which is associated with this acknowledge bit.
PAGE 31
DS1856 Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection Ordering Information (continued) PART RES0/RES1 RESISTANCE (kΩ) PIN-PACKAGE PART RES0/RES1 RESISTANCE (kΩ) PIN-PACKAGE DS1856B-050 50/50 16 CSBGA DS1856B-020+T&R 20/20 DS1856B-050/T&R 50/50 16 CSBGA DS1856B-030 30/10 16 CSBGA DS1856B-050+ 50/50 16 CSBGA DS1856E-030+ 30/10 16 TSSOP 16 TSSOP 16 CSBGA DS1856B-050+T&R 50/50 16 CSBGA DS1856E-030+T&R 30/10 DS1856E-050 50/50 16 T