Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsLinear ICsDS1877T+

SFP Controller for Dual Rx Interface

DS1877

19-5188; Rev 1; 4/10

General Description

The DS1877 controls and monitors all functions for SFF,

SFP, and SFP+ modules including all SFF-8472 func-

tionality. The device supports all LOS functions for two

receivers, and continually monitors for LOS of either

channel. Four ADC channels monitor V

, temperature,

and two differential external monitor inputs that can be

used to meet all monitoring requirements. Two digital-

to-analog converter (DAC) outputs with temperature-

indexed lookup tables (LUTs) are available for additional

monitoring and control functionality.

Applications

SFF, SFP, and SFP+ Transceiver Modules

Dual Rx Video SFPs

Ordering Information

Features

S Meets All SFF-8472 Control and Monitoring

Requirements

S Four Analog Monitor Channels: Temperature,

, RSSI1, RSSI2

RSSI1 and RSSI2 Support Internal and External

Calibration

Differential Input

Common-Mode Range from GND to V

Scalable Dynamic Range

Internal Direct-to-Digital Temperature Sensor

Alarm and Warning Flags for All Monitored

Channels

S Two 10-Bit Delta-Sigma Outputs

Each Controlled by 72-Entry Temperature LUT

S Digital I/O Pins: Four Inputs, Four Outputs

S Comprehensive Loss-of-Signal (LOS) Detection

System

S Flexible, Two-Level Password Scheme Provides

Three Levels of Security

S 120 Bytes of Password-1 Protected Memory

S 128 Bytes of Password-2 Protected Memory in

Main Device Address

S 256 Additional Bytes Located at A0h Slave

Address

S Receiver 1 is Accessed at A2h Slave Address

S Receiver 2 is Accessed at B2h Slave Address

S I

C-Compatible Interface

S +2.85V to +3.9V Operating Voltage Range

S -40NC to +95NC Operating Temperature Range

S 28-Pin TQFN (5mm x 5mm x 0.75mm) Package

+Denotes a lead(Pb)-free/RoHS-compliant package.

T&R = Tape and reel.

*EP = Exposed pad.

PART TEMP RANGE PIN-PACKAGE

DS1877T+

-40NC to +95NC

28 TQFN-EP*

DS1877T+T&R

-40NC to +95NC

28 TQFN-EP*

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Summary of content (65 pages)

PAGE 1
DS1877 SFP Controller for Dual Rx Interface General Description The DS1877 controls and monitors all functions for SFF, SFP, and SFP+ modules including all SFF-8472 functionality. The device supports all LOS functions for two receivers, and continually monitors for LOS of either channel. Four ADC channels monitor VCC, temperature, and two differential external monitor inputs that can be used to meet all monitoring requirements.
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DS1877 SFP Controller for Dual Rx Interface TABLE OF CONTENTS Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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DS1877 SFP Controller for Dual Rx Interface TABLE OF CONTENTS (continued) I2C Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 I2C Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 I2C Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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DS1877 SFP Controller for Dual Rx Interface LIST OF FIGURES Figure 1. Power-Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 2. Quick-Trip Sample Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 3. ADC Round-Robin Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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DS1877 SFP Controller for Dual Rx Interface ABSOLUTE MAXIMUM RATINGS Voltage Range on RSSI1_, RSSI2_, INX, LOS1, and LOS2 Pins Relative to Ground....... -0.5V to (VCC + 0.5V)* Voltage Range on VCC, SDA, SCL, OUTX, FAULT, RSELOUT, and LOSOUT Pins Relative to Ground.....-0.5V to +6V Continuous Power Dissipation 28-Pin TQFN (derate 34.5mW/NC) above +70NC.....2758.6mW Operating Temperature Range........................... -40NC to +95NC Programming Temperature Range........................
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DS1877 SFP Controller for Dual Rx Interface DAC1, DAC2 ELECTRICAL CHARACTERISTICS (VCC = +2.85V to +3.9V, TA = -40NC to +95NC, unless otherwise noted.) PARAMETER Main Oscillator Frequency Delta-Sigma Input-Clock Frequency Reference Voltage Input (REFIN) SYMBOL CONDITIONS TYP MAX UNITS 5 MHz fDS fOSC/2 MHz VREFIN Minimum 0.
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DS1877 SFP Controller for Dual Rx Interface ANALOG QUICK-TRIP CHARACTERISTICS (VCC = +2.85V to +3.9V, TA = -40NC to +95NC, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN RSSI Full-Scale Voltage TYP MAX UNITS 65 kW Bits 1.25 Input Resistance 35 Resolution 50 V 8 Error %FS ±2 TA = +25°C Integral Nonlinearity -1 +1 Differential Nonlinearity -1 +1 LSB LSB Temperature Drift -2 +2 %FS Offset -5 +10 mV MAX UNITS QUICK-TRIP TIMING CHARACTERISTICS (VCC = +2.85V to +3.
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DS1877 SFP Controller for Dual Rx Interface NONVOLATILE MEMORY CHARACTERISTICS (VCC = +2.85V to +3.9V, unless otherwise noted.) PARAMETER EEPROM Write Cycles Note Note Note Note Note Note Note Note Note Note 8 SYMBOL CONDITIONS MIN At +25NC 200,000 At +85NC 50,000 TYP MAX UNITS — All voltages are referenced to ground. Current into the IC is positive, and current out of the IC is negative. Inputs are at supply rail. Outputs are not loaded. This parameter is guaranteed by design.
PAGE 9
DS1877 SFP Controller for Dual Rx Interface Typical Operating Characteristics (VCC = +3.3V, TA = +25NC, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE +95°C 2.35 +25°C 2.30 2.25 2.20 2.15 2.40 -40°C 2.10 DAC POSITIONS = 1FFh SDA = SCL = VCC 2.45 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 2.40 2.35 VCC = 3.9V 2.30 2.25 VCC = 3.3V 2.20 2.15 VCC = 2.85V 2.10 2.05 2.05 2.00 2.00 2.85 3.15 3.45 3.
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DS1877 SFP Controller for Dual Rx Interface RSSI1N VCC N.C. 20 DAC2 21 GND DAC1 TOP VIEW GND Pin Configuration 19 18 17 16 15 REFIN 22 14 RSSI1P N.C. 23 13 RSSI2N N.C. 24 12 RSSI2P 11 N.C. 10 DNC DS1877 N.C. 25 VCC 26 LOSOUT 27 *EP 3 4 5 6 7 SCL FAULT LOS1 INX LOS2 1 RSELOUT 2 SDA + OUTX 28 9 RSEL 8 GND THIN QFN (5mm × 5mm × 0.8mm) *EXPOSED PAD.
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DS1877 SFP Controller for Dual Rx Interface Block Diagram VCC REFIN VCC SDA SCL MAIN MEMORY AT A2h/B2h EEPROM/SRAM I2C INTERFACE EEPROM 256 BYTES AT A0h A/D CONFIGURATION/RESULTS, SYSTEM STATUS/CONTROL BITS, ALARMS/WARNINGS, LOOKUP TABLES, USER MEMORY 10-BIT DELTA-SIGMA DAC DAC1 10-BIT DELTA-SIGMA DAC DAC2 VCC ANALOG MUX RSSI1P RSSI1N RSSI2P RSSI2N 13-BIT ADC 8-BIT QTs DS1877 POWER-ON ANALOG INTERRUPT FAULT TEMPERATURE SENSOR RSELOUT RSEL INX LOGIC CONTROL OUTX LOS1 LOSOUT LOS2 GND Maxi
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DS1877 SFP Controller for Dual Rx Interface Typical Operating Circuit +3.3V R RX2 THRESH2 ROUT2+ ROUT2- LOS2 +3.
PAGE 13
DS1877 SFP Controller for Dual Rx Interface Table 1. Acronyms Detailed Description The DS1877 integrates the control and monitoring functionality required in an SFP or SFP+ system. The device is specifically designed for a dual-receiver SFP module. Key components of the device are shown in the Block Diagram and described in subsequent sections. ACRONYM DACs During Power-Up On power-up, the device sets the DACs to high impedance. After time tINIT, the DACs are set to an initial condition set in EEPROM.
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DS1877 SFP Controller for Dual Rx Interface Monitors and Fault Detection Monitors Monitoring functions on the device include two QT comparators and four ADC channels. This monitoring combined with the alarm enables (Table 01h/05h) determines when/if the device triggers the FAULT and/or LOSOUT outputs. All the monitoring levels and interrupt masks are user programmable.
PAGE 15
DS1877 SFP Controller for Dual Rx Interface a factor of 8, and because the result is digitally divided by 8 by right-shifting, the bit weight of the measurement still meets the standard’s specification (i.e., SFF-8472). The right-shift operation on the ADC result is carried out based on the contents of right-shift control registers (Table 02h, Registers 8Eh–8Fh) in EEPROM. Two analog channels—RSSI1 and RSSI2—each have 3 bits allocated to set the number of right-shifts.
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DS1877 SFP Controller for Dual Rx Interface Dual-range operation is transparent to the end user. The results of RSSI1/RSSI2 ADCs are still stored/reported in the same memory locations (68h−69h, Lower Memory) regardless of whether the conversion was performed in fine mode or coarse mode. The RSSIR bit indicates whether a fine or coarse conversion generated the digital result. When the device is powered up, ADCs begin in a roundrobin fashion.
PAGE 17
DS1877 SFP Controller for Dual Rx Interface RSSI RESULT CROSSOVER POINT IDEAL RESPONSE RSSI_ INPUT Figure 5. Crossover Enabled PON SE RSSI RESULT RES ALE L-SC A FINE FUL CO FT SHI TIGH SC LL- FU =3 ER FIN E RS SE ON ESP R ALE HYSTERESIS RSSI_ INPUT FINE COARSE Figure 6. Crossover Disabled SEE RECALL SEE RECALL VPOA VCC VPOD SEE PRECHARGED TO 0 RECALLED VALUE PRECHARGED TO 0 RECALLED VALUE PRECHARGED TO 0 Figure 7.
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DS1877 SFP Controller for Dual Rx Interface Any time VCC is above POD, the I2C interface can be used to determine if VCC is below the POA level. This is accomplished by checking the RDYB bit in the STATUS byte (Lower Memory, Register 6Eh). RDYB is set when VCC is below POA; when VCC rises above POA, RDYB is timed (within 500Fs) to go to 0, at which point the part is fully functional.
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DS1877 SFP Controller for Dual Rx Interface DAC OFFSET LUTs (04h)[A2h/B2h] EIGHT REGISTERS PER DAC FDh DELTA-SIGMA DACs 767 DAC LUT BITS 7:0 FCh FBh 511 F8h DAC LUT BITS 7:0 255 0 -40°C FAh F9h DAC LUT BITS 7:0 -8°C DAC LUT BITS 7:0 +8°C DAC LUT BITS 7:0 DAC LUT BITS 7:0 FFh FEh DAC LUT BITS 7:0 1023 DAC LUT BITS 7:0 FBh FAh F9h 511 F8h 255 +24°C +40°C +56°C +70°C +88°C +104°C EACH OFFSET REGISTER CAN BE INDEPENDENTLY SET BETWEEN 0 AND 1020. 1020 = 4 x FFh.
PAGE 20
DS1877 SFP Controller for Dual Rx Interface CNFGA register (Table 02h, Register 88h). External pullup resistors must be provided on OUTX and RSELOUT to realize high logic levels. Bus Idle or Not Busy: Time between STOP and START conditions when both SDA and SCL are inactive and in their logic-high states. FAULT Output FAULT can be triggered by all alarms, warnings, and QTs. The six ADC alarms, warnings, and LOS QTs require enabling (Table 01h/05h, Registers F8h and FCh).
PAGE 21
DS1877 SFP Controller for Dual Rx Interface of SCL plus the setup and hold time requirements (Figure 12). Data is shifted into the device during the rising edge of the SCL. Bit Read: At the end of a write operation, the master must release the SDA bus line for the proper amount of setup time (Figure 12) before the next rising edge of SCL during a bit read.
PAGE 22
DS1877 SFP Controller for Dual Rx Interface TYPICAL I2C WRITE TRANSACTION MSB START X MSB LSB X X X 0 0 SLAVE ADDRESS* 1 R/W SLAVE ACK b7 LSB b6 b5 b4 b3 b2 b1 b0 MSB SLAVE ACK b7 LSB b6 b5 b4 REGISTER ADDRESS READ/ WRITE b3 b2 b1 SLAVE ACK b0 STOP DATA *IF ASEL IS 0, THE SLAVE ADDRESS IS A0h FOR THE AUXILIARY MEMORY AND A2h/B2h FOR THE MAIN MEMORY. IF ASEL = 1, THE SLAVE ADDRESS IS DETERMINED BY TABLE 02h, REGISTER 8Bh FOR THE MAIN MEMORY.
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DS1877 SFP Controller for Dual Rx Interface Reading a Single Byte from a Slave: Unlike the write operation that uses the memory address byte to define where the data is to be written, the read operation occurs at the present value of the memory address counter. To read a single byte from the slave, the master generates a START condition, writes the slave address byte with R/W = 1, reads the data byte with a NACK to indicate the end of the transfer, and generates a STOP condition.
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DS1877 SFP Controller for Dual Rx Interface I2C ADDRESS A0h I2C ADDRESS A2h/B2h 00h 00h EEPROM (256 BYTES) MAIN DEVICES AT A2h AND B2h AUXILIARY DEVICE LOWER MEMORY PASSWORD ENTRY (PWE) (4 BYTES) TABLE-SELECT BYTE 7Fh 80h 80h 80h TABLE 04h TABLE 02h TABLE 01h F7h F8h ALARMENABLE ROW (8 BYTES) FFh (B2h ONLY CONTAINS RECEIVER 2RELATED REGISTERS) FFh C7h ALARM-ENABLE ROW CAN BE CONFIGURED TO EXIST AT TABLE 01h OR TABLE 05h USING MASK BIT IN TABLE 02h, REGISTER 88h.
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DS1877 SFP Controller for Dual Rx Interface Register Descriptions The register maps show each byte/word (2 bytes) in terms of its row in the memory. The first byte in the row is located in memory at the row address (hexadecimal) in the leftmost column. Each subsequent byte on the row is one/two memory locations beyond the previous byte/ word’s address. A total of 8 bytes are present on each row. For more information about each of these bytes, see the corresponding register description.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory Register Map LOWER MEMORY ROW (HEX) WORD 0 ROW NAME BYTE 0/8 00–07 <1/C>THRESHOLD 08–0F <1/C >THRESHOLD 20–27 <1/D>THRESHOLD BYTE 2/A WORD 2 BYTE 3/B BYTE 4/C TEMP WARN LO 1 VCC ALARM HI VCC ALARM LO VCC WARN HI VCC WARN LO EE EE EE EE 4 RSSI ALARM HI RSSI ALARM LO RSSI WARN HI RSSI WARN LO EE EE EE EE 38–4F <1/D >EEPROM EE EE EE 50–5F <1/C >EEPROM 60–67 <2/C>ADC VALUES0 68–6F <0/M>ADC VALUES1 <2/D>ALARM/WA
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DS1877 SFP Controller for Dual Rx Interface Table 02h Register Map TABLE 02h (PW2) ROW (HEX) ROW NAME WORD 0 WORD 1 WORD 2 WORD 3 BYTE 0/8 BYTE 1/9 BYTE 2/A BYTE 3/B BYTE 4/C BYTE 5/D BYTE 6/E BYTE 7/F 80 <0/C>CONFIG <8/C>MODE <4/C>TINDEX RESERVED RESERVED RESERVED RESERVED 88 <8/C>CONFIG CNFGA CNFGB CNFGC DEVICE ADDRESS RESERVED FORCE RSSI 90 <8/C>SCALE 0 RESERVED VCC SCALE XOVER2 COARSE XOVER2 FINE 98 <8/C>SCALE 1 RSSI2 COARSE SCALE RSSI2 FINE SCALE RSSI1 COARSE S
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DS1877 SFP Controller for Dual Rx Interface Table 05h Register Map TABLE 05h ROW (HEX) ROW NAME 80–F7 EMPTY F8–FF <7/M>ALARM ENABLE WORD 0 WORD 1 WORD 2 WORD 3 BYTE 0/8 BYTE 1/9 BYTE 2/A BYTE 3/B BYTE 4/C BYTE 5/D BYTE 6/E EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY RESERVED RESERVED RESERVED ALARM EN3 ALARM EN2 RESERVED ALARM EN0 WARN EN3 BYTE 7/F or <_/C> = Common, or <_/D> = Different, or <_/M> = Mixture of common and different.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory Register Descriptions Lower Memory, Register 00h–01h: TEMP ALARM HI Lower Memory, Register 04h–05h: TEMP WARN HI FACTORY DEFAULT 7FFFh READ ACCESS All WRITE ACCESS PW2 or (PW1 and WLOWER) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) 00h, 04h S 26 25 24 23 22 21 20 01h, 05h 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 BIT 7 BIT 0 Temperature measurement updates above this two’s complement thresho
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 08h–09h: VCC ALARM HI Lower Memory, Register 0Ch–0Dh: VCC WARN HI 08h, 0Ch FACTORY DEFAULT FFFFh READ ACCESS All WRITE ACCESS PW2 or (PW1 and WLOWER) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) 215 214 213 212 211 210 29 27 26 25 24 23 22 21 09h, 0Dh BIT 7 28 20 BIT 0 Voltage measurement updates above this unsigned threshold set its corresponding alarm or warning bit.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 20h–21h: RSSI ALARM HI Lower Memory, Register 24h–25h: RSSI WARN HI FACTORY DEFAULT FFFFh READ ACCESS All WRITE ACCESS PW2 or (PW1 and WLOWER) A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) 20h, 24h 215 214 213 212 211 210 29 28 21h, 25h 27 26 25 24 23 22 21 20 BIT 7 BIT 0 Voltage measurement updates above this unsigned threshold set its corresponding alarm or warning bit
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 28h–37h: EE 28h–37h FACTORY DEFAULT 00h READ ACCESS All WRITE ACCESS PW2 or (PW1 and WLOWER) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (EE) EE EE EE EE EE EE EE BIT 7 EE BIT 0 PW2 level access-controlled EEPROM.
PAGE 33
DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 60h–61h: TEMP VALUE POWER-ON VALUE 0000h READ ACCESS All WRITE ACCESS N/A A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Volatile 60h S 26 25 24 23 22 21 20 61h 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 BIT 7 BIT 0 Signed two’s complement direct-to-temperature measurement.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 68h–69h: RSSI VALUE POWER-ON VALUE 0000h READ ACCESS All WRITE ACCESS N/A A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Volatile 68h 215 214 213 212 211 210 29 28 69h 27 26 25 24 23 22 21 20 BIT 7 BIT 0 Left-justified unsigned voltage measurement.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 6Eh: STATUS POWER-ON VALUE X0XX 0XXXb READ ACCESS All WRITE ACCESS See below A2h AND B2h MEMORY Mixture of common memory locations and different memory locations (see below) MEMORY TYPE Volatile Write Access 6Eh N/A All N/A All All N/A N/A N/A RESERVED <5/D>TXDC <2/C>INXS <2/C>RSELS <5/C>RSELC <2/C>FLTS <2/D>RXL <2/C>RDYB BIT 7 Maxim Integrated BIT 0 BIT 7 RESERVED BIT 6 TXDC1 [A2h]: TXD1 software control bit
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 6Fh: UPDATE 6Fh POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS All and device hardware A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Volatile TEMP RDY RESERVED VCC RDY RESERVED RSSI RDY RESERVED RESERVED BIT 7 BITS 7, 6, 3 BITS 5, 4, 2, 1 BIT 0 RSSIR BIT 0 TEMP RDY, VCC RDY, RSSI RDY: Update of completed conversions.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 71h: ALARM2 71h POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS N/A A2h AND B2h MEMORY Mixed A2h and B2h memory locations MEMORY TYPE Volatile RSSI HI RSSI LO RESERVED RESERVED RESERVED RESERVED RESERVED BIT 7 BIT 0 BIT 7 RSSI HI: High alarm status for RSSI measurement. A TXD event does not clear this alarm. 0 = (default) Last measurement was equal to or below the threshold setting.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Register 73h: ALARM0 73h POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS N/A A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Volatile LOS HI LOS LO RESERVED RESERVED RESERVED RESERVED RESERVED BIT 7 RESERVED BIT 0 BIT 7 LOS HI: High alarm status for RSSI; fast comparison. A TXD event does not clear this alarm. 0 = (default) Last comparison was below threshold setting.
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DS1877 SFP Controller for Dual Rx Interface Lower Memory, Registers 75h–7Ah: RESERVED POWER-ON VALUE 00h READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A These registers are reserved. The value when read is 00h.
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DS1877 SFP Controller for Dual Rx Interface Table 01h Register Descriptions Table 01h, Register 80h–F7h: EEPROM 80h–F7h POWER-ON VALUE 00h READ ACCESS PW2 or (PW1 and RWTBL1A) or (PW1 and RTBL1A) WRITE ACCESS PW2 or (PW1 and RWTBL1A) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (EE) EE EE EE EE EE EE EE EE BIT 7 BIT 0 EEPROM for PW1 and/or PW2 level access.
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DS1877 SFP Controller for Dual Rx Interface Table 01h, Register F9h: ALARM EN2 F9h POWER-ON VALUE 00h READ ACCESS PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C) WRITE ACCESS PW2 or (PW1 and RWTBL1C) A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) RSSI HI RSSI LO RESERVED RESERVED BIT 7 RESERVED RESERVED RESERVED RESERVED BIT 0 Layout is identical to ALARM2 in Lower Memory, Register 71h. Enables alarms to create FLTINT (Lower Memory, Register 71h).
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DS1877 SFP Controller for Dual Rx Interface Table 01h, Register FBh: ALARM EN0 FBh POWER-ON VALUE 00h READ ACCESS PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C) WRITE ACCESS PW2 or (PW1 and RWTBL1C) A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) LOS HI LOS LO RESERVED RESERVED RESERVED RESERVED RESERVED BIT 7 RESERVED BIT 0 Layout is identical to ALARM0 in Lower Memory, Register 73h.
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DS1877 SFP Controller for Dual Rx Interface Table 01h, Register FDh–FFh: RESERVED POWER-ON VALUE 00h READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A These registers are reserved.
PAGE 44
DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 81h: TEMPERATURE INDEX (TINDEX) FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS (PW2 and AEN = 0) or (PW1 and RWTBL2 and AEN = 0) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Volatile 27 81h 26 25 24 23 22 21 20 BIT 7 BIT 0 Holds the calculated index based on the temperature measurement. This index is used for the address during lookup of Table 04h.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 87h: DEVICE VER FACTORY DEFAULT DEVICE VERSION READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS N/A MEMORY TYPE ROM 87h DEVICE VERSION BIT 7 BIT 0 Hardwired connections to show the device version.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 89h: CNFGB 89h FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) INXC INVOUTX ALATCH2 QTLATCH2 WLATCH2 ALATCH1 QTLATCH1 BIT 7 46 WLATCH1 BIT 0 BIT 7 INXC: INX software control bit (see Figure 11). 0 = INX pin’s logic controls OUTX pin.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 8Ah: CNFGC 8Ah FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) TXD_RST EN DAC2 RESERVED LOSC2 INVLOS2 RESERVED TXD_RST EN DAC1 LOSC1 BIT 7 BITS 7, 3 INVLOS1 BIT 0 RESERVED BIT 6 TXD_RST EN DAC2: 0 = TXDC2 has no effect on DAC2. 1 = DAC2 is reset by TXDC2.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 8Ch: RESERVED FACTORY DEFAULT READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A This register is reserved.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 8Eh: RIGHT-SHIFT2 (RSHIFT2) FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) 8Eh RESERVED RSSI2C2 RSSI2C1 RSSI2C0 RESERVED RSSI2F2 RSSI2F1 BIT 7 RSSI2F0 BIT 0 Allows for right-shifting the final answer of RSSI2 COARSE and RSSI2 FINE.
PAGE 50
DS1877 SFP Controller for Dual Rx Interface Table 02h, Register 92h–93h: VCC SCALE Table 02h, Register 94h–95h: XOVER2 COARSE Table 02h, Register 96h–97h: XOVER2 FINE Table 02h, Register 98h–99h: RSSI2 COARSE SCALE Table 02h, Register 9Ah–9Bh: RSSI2 FINE SCALE Table 02h, Register 9Ch–9Dh: RSSI1 COARSE SCALE Table 02h, Register 9Eh–9Fh: RSSI1 FINE SCALE FACTORY CALIBRATED READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h mem
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register A2h–A3h: VCC OFFSET Table 02h, Register A4h–A5h: XOVER1 COARSE Table 02h, Register A6h–A7h: XOVER1 FINE Table 02h, Register A8h–A9h: RSSI2 COARSE OFFSET Table 02h, Register AAh–ABh: RSSI2 FINE OFFSET Table 02h, Register ACh–ADh: RSSI1 COARSE OFFSET Table 02h, Register AEh–AFh: RSSI1 FINE OFFSET FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register B0h–B3h: PW1 FACTORY DEFAULT FFFF FFFFh READ ACCESS N/A WRITE ACCESS PW2 or (PW1 and WPW1) MEMORY TYPE Nonvolatile (SEE) B0h 231 230 229 228 227 226 225 224 B1h 223 222 221 220 219 218 217 216 B2h 215 214 213 212 211 210 29 28 B3h 27 26 25 24 23 22 21 20 BIT 7 BIT 0 The PWE value is compared against the value written to this location to enable PW1 access.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register B8h: LOS RANGING2 B8h FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory location MEMORY TYPE Nonvolatile (SEE) RESERVED HLOS22 HLOS21 HLOS20 RESERVED LLOS22 LLOS21 BIT 7 LLOS20 BIT 0 This register controls the full-scale range of the QT monitoring for the RSSI2 differential inputs.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register B9h: RESERVED FACTORY DEFAULT 00h READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A This register is reserved.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register BCh: LOS RANGING1 BCh FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) RESERVED HLOS12 HLOS11 HLOS10 RESERVED LLOS12 LLOS11 BIT 7 LLOS10 BIT 0 This register controls the full-scale range of the QT monitoring for the RSSI1 differential inputs.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register BDh: RESERVED FACTORY DEFAULT 00h READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A This register is reserved.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register C0h: PW_ENA C0h FACTORY DEFAULT 10h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) RESERVED RWTBL1C RWTBL2 RWTBL1A RWTBL1B WLOWER WAUXA BIT 7 Maxim Integrated WAUXB BIT 0 BIT 7 RESERVED BIT 6 RWTBL1C: Table 01h or 05h bytes F8h–FFh.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register C1h: PW_ENB C1h FACTORY DEFAULT 03h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) RWTBL46 RTBL1C RTBL2 RTBL1A RTBL1B WPW1 WAUXAU BIT 7 58 WAUXBU BIT 0 BIT 7 RWTBL46: Table 04h. 0 = (default) Read and write access for PW2 only. 1 = Read and write access for PW1 and PW2.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register C2h–C5h: RESERVED FACTORY DEFAULT 00h READ ACCESS N/A WRITE ACCESS N/A A2h AND B2h MEMORY N/A MEMORY TYPE N/A These registers are reserved.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register C7h: TBLSELPON C7h FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS PW2 or (PW1 and RWTBL2) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Nonvolatile (SEE) 27 26 25 24 23 22 21 BIT 7 20 BIT 0 Chooses the initial value for the TBL SEL byte (Lower Memory, Register 7Fh) at power-on.
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DS1877 SFP Controller for Dual Rx Interface Table 02h, Register CCh–CDh: DAC1 VALUE FACTORY DEFAULT 0000h READ ACCESS PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2) WRITE ACCESS (PW2 and DAC1EN = 0) or (PW1 and RWTBL2 and DAC1EN = 0) A2h AND B2h MEMORY Common A2h and B2h memory locations MEMORY TYPE Volatile CCh 0 0 0 0 0 0 29 28 CDh 27 26 25 24 23 22 21 20 BIT 7 BIT 0 The digital value used for DAC1 VALUE.
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DS1877 SFP Controller for Dual Rx Interface Table 04h Register Descriptions Table 04h, Register 80h–C7h: DAC LUT 80h–C7h FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL46) WRITE ACCESS PW2 or (PW1 and RWTBL46) A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Nonvolatile (EE) 27 26 25 BIT 7 24 23 22 21 20 BIT 0 Digital value for the DAC1 VALUE (A2h address) and DAC2 VALUE (B2h address) outputs.
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DS1877 SFP Controller for Dual Rx Interface Table 04h, Register F8h–FFh: DAC OFFSET LUT FACTORY DEFAULT 00h READ ACCESS PW2 or (PW1 and RWTBL46) WRITE ACCESS PW2 or (PW1 and RWTBL46) A2h AND B2h MEMORY Different A2h and B2h memory locations MEMORY TYPE Nonvolatile (EE) 29 F8h–FFh 28 27 26 25 24 23 BIT 7 22 BIT 0 The digital value for the temperature offset of the DAC1 and DAC2 VALUE outputs.
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DS1877 SFP Controller for Dual Rx Interface Auxiliary Memory A0h, Register 80h–FFh: EEPROM 80h–FFh FACTORY DEFAULT 00h READ ACCESS All WRITE ACCESS PW2 or (PW1 and WAUXB) or WAUXBU MEMORY TYPE Nonvolatile (EE) 27 26 25 24 23 22 21 BIT 7 20 BIT 0 Accessible with the slave address A0h. Applications Information Package Information Power-Supply Decoupling For the latest package outline information and land patterns, go to www.maximintegrated.com/packages.
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DS1877 SFP Controller for Dual Rx Interface Revision History REVISION NUMBER REVISION DATE 0 3/10 Initial release 4/10 Updated Figure 11 labels for LOS1/2 and INVLOSOUT, and corrected errors in the CNFGC, HLOS2, and HLOS1 bit tables. 1 DESCRIPTION PAGES CHANGED — 19, 47, 54, 56 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied.