Datasheet
DS1878
SFP+ Controller with Digital LDD Interface
28 ______________________________________________________________________________________
The control registers are first written once V
CC
exceeds
POA. They are also written after every temperature con-
version and on a rising edge of TXD. Any time one of
these events occurs, the device reads and updates
TXSTAT1 and TXSTAT2, and writes SET_IBIAS and
SET_IMOD to 0.
Slave Register Map and DS1878 Corresponding Location
SLAVE REGISTER
AND ADDRESS
DS1878
REGISTER
ACTIVE CHIP
SELECTS
REGISTER FUNCTION DS1878 LOCATION
00h, RXCTRL1 RXCTRL1 1 and 2 Receiver Control Table 02h, E8h
01h, RXCTRL2 RXCTRL2 1 and 2 Receiver Control Table 02h, E9h
02h, RXSTAT STATUS 1 and 2 Receiver Status
Lower Memory, 6Eh, Bit 1 comes from
the LOSOUT pin (Note 1)
03h, SET_CML SETCML 1 and 2
Output CML Level
Setting
Table 02h, EAh
04h, SET_LOS
SETLOSH,
SETLOSL
1 and 2
LOS Assert Level
Settings
Table 02h, EBh is SETLOSH,
Table 02h, F3h is SETLOSL (Note 2)
05h, TXCTRL TXCTRL 1 Only (Note 3) Transmitter Control Table 02h, ECh
06h, TXSTAT1 TXSTAT1 1 Only (Note 3) Transmitter Status Table 02h, FCh
07h, TXSTAT2 TXSTAT2 1 Only (Note 3) Transmitter Status Table 02h, FDh
08h, SET_IBIAS BIAS 1 Only (Note 3) BIAS Current Setting Table 02h, CBh–CCh
09h, SET_IMOD MODULATION 1 Only (Note 3)
MODULATION Current
Setting
Table 02h, 82h–83h
0Ah, SET_IMODMAX IMODMAX 1 Only (Note 3)
MODULATION Current
Limit Setting
Table 02h, EDh
0Bh, SET_IBIASMAX IBIASMAX 1 Only (Note 3)
BIAS Current Limit
Setting
Table 02h, EEh
0Ch, MODINC MODINC 1 Only (Note 3)
MODULATION Current
DAC Increment Setting
Automatically written after each
temperature conversion.
0Dh, BIASINC BIASINC 1 Only (Note 3)
BIAS Current DAC
Increment Setting
Automatically performed by APC loop.
Disable APC before using 3-wire
manual mode.
0Eh, MODECTRL MODECTRL 1 and 2 General Control (Note 1)
0Fh, SET_PWCTRL SETPWCTRL 1 Only (Note 3) Tx Pulse Width Setting Table 02h, EFh
10h, SET_TXDE SETTXDE 1 Only (Note 3) Tx Deemphasis Setting Table 02h, F0h
11h, SET_TXEQ SETTXEQ 1 Only (Note 3) Tx Equalization Table 02h, F1h
12h, SET_LOSTIMER SETLOSTIMER 1 and 2 LOS Timer Table 02h, F2h
14h, TXTM TXTM 1 and 2 Tx Test Mode (Note 1)
15h, RXTM1 RXTM1 1 and 2 Rx Test Mode (Note 1)
16h, RXTM2 RXTM2 1 and 2 Rx Test Mode (Note 1)
17h, Reserved RXCTRL3 1 and 2 Receiver Control Table 02h, F4h
18h, Reserved TXCTRL2 1 Only (Note 3) Transmitter Control Table 02h, F5h
19h, Reserved TXCTRL3 1 Only (Note 3) Transmitter Control Table 02h, F6h
Note 1: This register is not present in the DS1878. To access this register the user must use manual operation (see the
Manual
Operation
section for details).
Note 2: Either SETLOSH or SETLOSL is written to the slave register SET_LOS. This is determined by the signal RSEL (see Figure 16).
Note 3: In manual 3-wire mode both chip selects are active for all registers.