Datasheet

DS1878
SFP+ Controller with Digital LDD Interface
34 ______________________________________________________________________________________
Register Descriptions
The register maps show each byte/word (2 bytes) in terms of its row in the memory. The first byte in the row is locat-
ed in memory at the row address (hexadecimal) in the leftmost column. Each subsequent byte on the row is one/two
memory locations beyond the previous byte/word’s address. A total of 8 bytes are present on each row. For more
information about each of these bytes see the corresponding register description.
Lower Memory Register Map
LOWER MEMORY
WORD 0 WORD 1 WORD 2 WORD 3
ROW
(HEX)
ROW NAME
BYTE 0/8 BYTE 1/9 BYTE 2/A BYTE 3/B BYTE 4/C BYTE 5/D BYTE 6/E BYTE 7/F
00
<1>
THRESHOLD
0
TEMP ALARM HI TEMP ALARM LO TEMP WARN HI TEMP WARN LO
08
<1>
THRESHOLD
1
V
CC
ALARM HI V
CC
ALARM LO V
CC
WARN HI V
CC
WARN LO
10
<1>
THRESHOLD
2
MON1 ALARM HI MON1 ALARM LO MON1 WARN HI MON1 WARN LO
18
<1>
THRESHOLD
3
MON2 ALARM HI MON2 ALARM LO MON2 WARN HI MON2 WARN LO
20
<1>
THRESHOLD
4
MON3 ALARM HI MON3 ALARM LO MON3 WARN HI MON3 WARN LO
28
<1>
THRESHOLD
5
MON4 ALARM HI MON4 ALARM LO MON4 WARN HI MON4 WARN LO
30–5F
<1>
EEPROM EE EE EE EE EE EE EE EE
60
<2>
ADC
VALUES
0
TEMP VALUE V
CC
VALUE MON1 VALUE MON2 VALUE
68
<0>
ADC
VALUES
1
<2>
MON3 VALUE
<2>
MON4 VALUE
<2>
RESERVED
<0>
STATUS
<3>
UPDATE
70
<2>
ALARM/
WARN
ALARM
3
ALARM
2
ALARM
1
ALARM
0
WARN
3
WARN
2
RESERVED
78
<0>
TABLE
SELECT
<2>
RESERVED
<2>
RESERVED
<6>
PWE MSW
<6>
PWE LSW
<5>
TBL
SEL
ACCESS
CODE
<0> <1> <2> <3> <4> <5> <6> <7> <8> <9> <10> <11>
Read
Access
All All All PW2 All N/A PW1 PW2 N/A PW2 All
Write
Access
See each
bit/byte
separately
PW2 N/A
All and
device
hardware
PW2 +
mode
bit
All All PW1 PW2 PW2 N/A PW1
The access codes represent the factory default values of PW_ENA and PW_ENB (Table 02h, Registers C0h–C1h).