Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsLinear ICsN/A Case type TO/92 Type (misc.) 1-Wire Serial number Case type TO/92

1 of 10 112006

FEATURES

 Upgrade and drop-in replacement for DS2400

— Extended 2.8 to 6.0 voltage range

— Multiple DS2401s can reside on a

common 1-Wire

Net

 Unique, factory-lasered and tested 64-bit

registration number (8-bit family code + 48-

bit serial number + 8-bit CRC tester);

guaranteed no two parts alike

 Built-in multidrop controller ensures

compatibility with other 1-Wire Net

products

 8-bit family code specifies DS2401

communications requirements to reader

 Presence Pulse acknowledges when the

reader first applies voltage

 Low-cost TO-92, SOT-223, and TSOC

surface mount packages

 Reduces control, address, data, and power to

a single pin

 Zero standby power required

 Directly connects to a single port pin of a

microprocessor and communicates at up to

16.3kbits/s

 TO-92 Tape & Reel version with leads bent

to 100mil spacing (default) or with straight

leads (DS2401T-SL)

 Applications

— PCB Identification

— Network Node ID

— Equipment Registration

 Operates over industrial temperature range of

-40°C to +85°C

PIN ASSIGNMENT

1 2

1rrd

Flip Chip, Top View

with Laser Mark,

Contacts Not Visible.

“rrd” = Revision/Date

See 56-G7009-001 for package outline.

PIN DESCRIPTION

TO-92,

SOT-223

TSOC Flip Chip

Pin 1 Ground Ground Data (DQ)

Pin 2 Data (DQ) Data (DQ) Ground

Pin 3 No Connect No Connect —

Pin 4 Ground No Connect —

Pin 5-6 — No Connect —

DS2401

Silicon Serial Numbe

www.maxim-ic.com

TOP VIEW

See Mech. Drawings

Section

TOP VIEW

3.7mm x 4.0mm x 1.5mm

BOTTOM VIEW

TO-92

DALLAS

DS2401

2 3

1 2 3

1-Wire is a registered trademark of Dallas Semiconductor.

TSOC PACKAGE

EV Kit Available

Summary of content (10 pages)

PAGE 1
EV Kit Available DS2401 Silicon Serial Number www.maxim-ic.com FEATURES PIN ASSIGNMENT Upgrade and drop-in replacement for DS2400 — Extended 2.8 to 6.
PAGE 2
DS2401 ORDERING INFORMATION Standard DS2401 DS2401/T&R DS2401/T&R/SL DS2401Z DS2401Z/T&R DS2401P DS2401P/T&R DS2401X1 Lead-Free DS2401+ DS2401+T&R DS2401-SL+T&R DS2401Z+ DS2401Z+T&R DS2401P+ DS2401P+T&R — Description TO-92 Package TO-92 Package, Tape-and-Reel TO-92 Package with Straight Leads, Tape-and-Reel SOT-223 Surface-Mount Package SOT-223 Surface-Mount Package, Tape-and-Reel TSOC Surface-Mount Package TSOC Surface-Mount Package, Tape-and-Reel Flip-Chip Package, Tape & Reel DESCRIPTION The DS2401 e
PAGE 3
DS2401 DS2401 MEMORY MAP Figure 1 8-Bit CRC Code MSB 48-Bit Serial Number LSB MSB 8-Bit Family Code (01h) LSB MSB LSB DS2401 EQUIVALENT CIRCUIT Figure 2 BUS MASTER CIRCUIT Figure 3 A) Open Drain See note To data connection of DS2401 B) Standard TTL See note To data connection of DS2401 Note: Depending on the 1-Wire communication speed and the bus load characteristics, the optimal pullup resistor (RPU) value will be in the 1.5kΩ to 5kΩ range.
PAGE 4
DS2401 TRANSACTION SEQUENCE The sequence for accessing the DS2401 via the 1-Wire port is as follows: Initialization ROM Function Command Read Data INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by a Presence Pulse(s) transmitted by the slave(s). The Presence Pulse lets the bus master know that the DS2401 is on the bus and is ready to operate.
PAGE 5
DS2401 1-Wire SIGNALING The DS2401 requires a strict protocol to ensure data integrity. The protocol consists of four types of signaling on one line: reset sequence with Reset Pulse and Presence Pulse, write 0, write 1, and read data. All these signals except Presence Pulse are initiated by the bus master. The initialization sequence required to begin any communication with the DS2401 is shown in Figure 5.
PAGE 6
DS2401 ROM FUNCTIONS FLOW CHART Figure 4 6 of 10
PAGE 7
DS2401 INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 5 RESISTOR MASTER DS2401 ∗ 480μs ≤ tRSTL < ∞ * 480μs ≤ tRSTH < ∞ (includes recovery time) 15μs ≤ tPDH < 60μs 60μs ≤ tPDL < 240μs In order not to mask interrupt signaling by other devices on the 1-Wire bus, tRSTL + tR should always be less than 960μs.
PAGE 8
DS2401 READ/WRITE TIMING DIAGRAM (cont’d) Figure 6 Write-zero Time Slot 60μs ≤ tLOW0 < tSLOT < 120μs 1μs ≤ tREC < ∞ Read-data Time Slot RESISTOR MASTER DS2401 60μs ≤ tSLOT < 120μs 1μs ≤ tLOWR < 15μs 0 ≤ tRELEASE < 45μs 1μs ≤ tREC < ∞ tRDV = 15μs tSU < 1μs CRC GENERATION To validate the data transmitted from the DS2401, the bus master may generate a CRC value from the data as it is received. This generated value is compared to the value stored in the last 8 bits of the DS2401.
PAGE 9
DS2401 ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature -0.5V to +7.0V -40°C to +85°C -55°C to +125°C See J-STD-020A Specification ∗ This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
PAGE 10
DS2401 NOTES: 1) All voltages are referenced to ground. 2) VPUP = external pullup voltage. 3) Input load is to ground. 4) An additional reset or communication sequence cannot begin until the reset high time has expired. 5) Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is guaranteed to be valid within 1μs of this falling edge and will remain valid for 14μs minimum (15μs total from falling edge on 1-Wire bus).