Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsLinear ICsDS2413P+

GENERAL DESCRIPTION

The DS2413 is a dual-channel programmable I/O

1-Wire

chip. The PIO outputs are configured as

open-drain and provide up to 20mA continuous sink

capability and off-state operating voltage up to 28V.

Control and sensing of the PIO pins is performed with

a dedicated device-level command protocol. To

provide a high level of fault tolerance in the end

application, the 1-Wire IO and PIO pins are all

capable of withstanding continuous application of

voltages up to 28V max. Communication and

operation of the DS2413 is performed with the single

contact Maxim/Dallas 1-Wire serial interface.

APPLICATIONS

 LED Control

 Accessory Identification and Control

 General Purpose Input/Output

 Key-Pick Systems

 Industrial Controllers

 System Monitoring

TYPICAL OPERATING CIRCUIT

PX.Y

µC

PUP

Local

Power

LED

Switch

PIOA

PIOB

GND

DS2413

FEATURES

 Open-Drain Programmable I/O Pins

 PIO Pins Support 20mA max Continuous Current

Sink

 Supports 28V (max) PIO Pin Operating Voltage

 On-Resistance of PIO Pulldown Transistor 20Ω

max; OFF Resistance 1MΩ min

 Parasitic Power Supply Through 1-Wire

 Communicates to Host with a Single Digital

Signal at 14.9kb or 100kbps Using 1-Wire

Protocol

 Unique 64-bit ROM Serial Number Factory

Lasered Into Each Device

 Switchpoint Hysteresis and Filtering to Optimize

Performance in the Presence of Noise

 1-Wire IO Pin Supports 28V Absolute Maximum

DC Level for Fault Conditions

 Operates Over a Wide 1-Wire Voltage Range of

2.8V to 5.25V from 0°C to +70°C

 High ESD Immunity of 1-Wire IO Pin: 8kV HBM

Typical

 TSOC and TDFN Packages Available

ORDERING INFORMATION

PART

TEMP RANGE

PIN-PACKAGE

DS2413P+

0°C to +70°C

TSOC

DS2413P+T&R

0°C to +70°C

TSOC

DS2413Q+T&R

0°C to +70°C

TDFN

+ Denotes a lead(Pb)-free package/RoHS-compliant

package.

T&R = Tape and reel.

PIN CON

FIGURATION

2413

ymrrF

2413

ywwrr

TSOC TDFN

Top View with Marking. TDFN Contacts

Not Visible in this View.

Exposed Paddle

DS2413

Wire Dual Channel

Addressable Switch

Commands, Registers, and Modes are capitalized for

clarity.

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

19-5316; 11/14

1 of

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

Summary of content (18 pages)

PAGE 1
9-5316; 11/14 DS2413 1-Wire Dual Channel Addressable Switch GENERAL DESCRIPTION FEATURES The DS2413 is a dual-channel programmable I/O ® 1-Wire chip. The PIO outputs are configured as open-drain and provide up to 20mA continuous sink capability and off-state operating voltage up to 28V. Control and sensing of the PIO pins is performed with a dedicated device-level command protocol.
PAGE 2
DS2413: 1-Wire Dual Channel Addressable Switch ABSOLUTE MAXIMUM RATINGS Voltage on Any Pin to GND Maximum Current into IO Pin Maximum Current into PIO Pin Maximum Current Through GND Pins (Both Pins Tied Together) Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering, 10s) Soldering Temperature (reflow) -0.
PAGE 3
DS2413: 1-Wire Dual Channel Addressable Switch PARAMETER Presence Detect Sample Time (Notes 1, 20) SYMBOL tMSP CONDITIONS Standard speed, VPUP > 4.5V Standard speed Overdrive speed, VPUP ≥ 4.5V Overdrive speed MIN 67.4 69.6 7.7 9.1 TYP MAX 75 75 10 10 Standard speed, VPUP > 4.5V Standard speed (Note 14) Overdrive speed, VPUP ≥ 4.
PAGE 4
DS2413: 1-Wire Dual Channel Addressable Switch LEGACY VALUES STANDARD SPEED OVERDRIVE SPEED MIN MAX MIN MAX 61µs (undef.) 7µs (undef.) 480µs (undef.) 48µs 80µs 15µs 60µs 2µs 6µs 60µs 240µs 8µs 24µs 60µs 120µs 6µs 16µs PARAMETER tSLOT (incl. tREC) tRSTL tPDH tPDL tW0L DS2413 VALUES STANDARD SPEED OVERDRIVE SPEED MIN MAX MIN MAX 67µs (undef.) 10µs (undef.) 600µs 960µs 63µs 80µs 15µs 68µs 2µs 8.
PAGE 5
DS2413: 1-Wire Dual Channel Addressable Switch 64-BIT LASERED ROM Each DS2413 has a unique ROM Registration Number that is 64 bits long, as shown in Figure 3. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC (Cyclic Redundancy Check) of the first 56 bits. The 1-Wire CRC is generated using a polynomial generator consisting of a 8 5 4 shift register and XOR gates as shown in Figure 4. The polynomial is X + X + X + 1.
PAGE 6
DS2413: 1-Wire Dual Channel Addressable Switch PIO STUCTURE Each PIO consists of an open-drain pulldown transistor with 28V capability. The transistor is controlled by the PIO Output Latch, as shown in Figure 5. The PIO Control unit connects the PIOs to the 1-Wire interface. Figure 5. PIO Simplified Logic Diagram PIO Pin State PIO Pin PIO Output Latch State.
PAGE 7
DS2413: 1-Wire Dual Channel Addressable Switch Figure 6.
PAGE 8
DS2413: 1-Wire Dual Channel Addressable Switch PIO ACCESS WRITE [5Ah] The PIO Access Write command writes to the PIO output latches, which control the pulldown transistors of the PIO channels. In an endless loop this command first writes new data to the PIO and then reads back the PIO status. This implicit read-after-write can be used by the master for status verification. A PIO Access Write can be terminated at any time with a 1-Wire Reset.
PAGE 9
DS2413: 1-Wire Dual Channel Addressable Switch The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 16µs (Overdrive speed) or more than 120µs (standard speed), one or more devices on the bus may be reset. Figure 9.
PAGE 10
DS2413: 1-Wire Dual Channel Addressable Switch SEARCH ROM [F0h] When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their device ID numbers. By taking advantage of the wired-AND property of the bus, the master can use a process of elimination to identify the device ID numbers of all slave devices. For each bit of the device ID number, starting with the least significant bit, the bus master issues a triplet of time slots.
PAGE 11
DS2413: 1-Wire Dual Channel Addressable Switch Figure 10-1.
PAGE 12
DS2413: 1-Wire Dual Channel Addressable Switch Figure 10-2.
PAGE 13
DS2413: 1-Wire Dual Channel Addressable Switch 1-Wire SIGNALING The DS2413 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write-Zero, Write-One, and Read-Data. Except for the Presence pulse, the bus master initiates all falling edges. The DS2413 can communicate at two different speeds, standard speed, and Overdrive Speed.
PAGE 14
DS2413: 1-Wire Dual Channel Addressable Switch Read/Write Time Slots Data communication with the DS2413 takes place in time slots, which carry a single bit each. Write-time slots transport data from bus master to slave. Read-time slots transfer data from slave to master. Figure 12 illustrates the definitions of the write- and read-time slots. All communication begins with the master pulling the data line low.
PAGE 15
DS2413: 1-Wire Dual Channel Addressable Switch Master-to-Slave For a write-one time slot, the voltage on the data line must have crossed the VTH threshold before the write-one low time tW1LMAX is expired. For a write-zero time slot, the voltage on the data line must stay below the VTH threshold until the write-zero low time tW0LMIN is expired. For the most reliable communication, the voltage on the data line should not exceed VILMAX during the entire tW0L or tW1L window.
PAGE 16
DS2413: 1-Wire Dual Channel Addressable Switch Figure 13. Noise Suppression Scheme tREH VPUP tREH VTH VHY Case A Case B 0V Case C tGL tGL COMMAND-SPECIFIC 1-Wire COMMUNICATION PROTOCOL—LEGEND SYMBOL DESCRIPTION RST PD Select PIOR PIOW FF loop 1-Wire Reset Pulse generated by master. 1-Wire Presence Pulse generated by slave. Command and data to satisfy the ROM function protocol. Command "PIO Access Read". Command "PIO Access Write". Indefinite loop where the master reads FF bytes.
PAGE 17
DS2413: 1-Wire Dual Channel Addressable Switch PIO ACCESS READ EXAMPLE Read the state of the PIOs 3 times.
PAGE 18
DS2413: 1-Wire Dual Channel Addressable Switch REVISION HISTORY REVISION DATE PAGES CHANGED DESCRIPTION • Remove epsilon from the tW1L spec in the EC table. • Apply EC table note 17 also to tWOL. • Add to EC table notes 17 and 18 the reference to Figure 12 and the text "The actual maximum duration...." 11/07 11/08 07/10 11/14 • Show epsilon also in the write zero time slot graphic. • Add note that the VTH and VTL maximum spec values apply at VPUP max (VTH and VTL are GBD, not tested).