Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsInterface ICsInterface IC - drivers RS232 1/0 SOIC 8 N

Maxim Integrated 1

FEATURES

 Universal, Common-Ground Serial Port to |

1-Wire

Line Driver

 Works with All iButton

and 1-Wire Slave

Devices

 Communicates at Standard and Overdrive

1-Wire speed and Serial Port Data Rates of

9600 (default), 19200, 57600, and 115200 bps

 Supports 12V EPROM Programming and

Stiff 5V Pullup for Sensors and EEPROM

 Self-Calibrating Time Base with ±5%

Tolerance for Serial and 1-Wire

Communication

 Slew Rate Controlled 1-Wire Pulldown and

Active Pullup to Accommodate Long Lines

and Reduce Radiation

 User-Selectable RXD/TXD Polarity

Minimizes Component Count When

Interfacing to 5V Based RS232 Systems or

Directly to UARTs

 Programmable 1-Wire Timing and Driver

Characteristics Accommodate a Wide Range

of Slave Device Configurations at Standard

Speed

 Smart Protocol Combines Data and Control

Information Without Requiring Extra Pins

 Compatible with Optical, IR, and RF to

RS232 Converters

 Low-Cost 8-Pin SO Surface-Mount Package

 Operates Over 4.5V to 5.5V from -40°C to

+85°C

PIN ASSIGNMENT

PIN DESCRIPTION

GND - Ground

1-W - 1-Wire Input/Output

NC - No Connection

- 4.5V to 5.5V

- Optional EPROM

Programming Voltage

POL - RXD/TXD Polarity Select

TXD - Serial Data from UART

RXD - Serial Data to UART

ORDERING INFORMATION

PART

TEMP

RANGE

PIN-

PACKAGE

DS2480B+

-40°C to +85°C

8 SO

DS2480B+T&R

-40°C to +85°C

8 SO

+ Denotes a lead(Pb)-free/RoHS-compliant package.

T&R = Tape and reel.

DESCRIPTION

The DS2480B is a serial port to 1-Wire interface chip that supports standard and overdrive speeds. It con-

nects directly to UARTs and 5V RS232 systems. Interfacing to RS232C (±12V levels) requires a passive

clamping circuit and one 5V to ±12V level translator. Internal timers relieve the host of the burden of

generating the time-critical 1-Wire communication waveforms. In contrast to the DS9097(E) where a full

character must be sent by the host for each 1-Wire time slot, the DS2480B can translate each character

into eight 1-Wire time slots, thereby increasing the data throughput significantly. In addition, the

DS2480B can be set to communicate at four different data rates, including 115.2kbps, 57.6kbps, and

19.2kbps, with 9.6kbps being the power-on default. Command codes received from the host’s crystal

controlled UART serve as a reference to continuously calibrate the on-chip timing generator. The

DS2480B

Serial to 1-

Wire Line

Driver

GND

1-W

VDD

RXD

TXD

POL

VPP

8-Pin SO (150 mil)

19-5047; 5/10

1-Wire and iButton are registered trademarks of

Maxim Integrated Products, Inc.

Summary of content (32 pages)

PAGE 1
DS2480B Serial to 1-Wire Line Driver FEATURES             Universal, Common-Ground Serial Port to | 1-Wire® Line Driver Works with All iButton® and 1-Wire Slave Devices Communicates at Standard and Overdrive 1-Wire speed and Serial Port Data Rates of 9600 (default), 19200, 57600, and 115200 bps Supports 12V EPROM Programming and Stiff 5V Pullup for Sensors and EEPROM Self-Calibrating Time Base with ±5% Tolerance for Serial and 1-Wire Communication Slew Rate Controlled 1-Wire Pulldown and Act
PAGE 2
DS2480B DS2480B uses a unique protocol that merges data and control information without requiring control pins. This approach maintains compatibility to off-the-shelf serial to wireless converters, allowing easy realization of 1-Wire media jumpers. The various control functions of the DS2480B are optimized for 1Wire networks and support the special needs of all current 1-Wire devices including EPROM-based addonly memories, EEPROM devices, and 1-Wire thermometers.
PAGE 3
DS2480B As data enters the core of the DS2480B’s logic circuitry, it is analyzed to separate data and command bytes and to calibrate the device’s timing generator. The timing generator controls all speed relations of the communication interface and the 1-Wire bus as well as the waveforms on the 1-Wire bus. Command bytes either affect the configuration setting or generate certain waveforms on the 1-Wire bus. Data bytes are simply translated by the protocol converter into the appropriate 1-Wire activities.
PAGE 4
DS2480B Figure 2.
PAGE 5
DS2480B A master reset cycle can also be generated by means of software. This may be necessary if the host for any reason has lost synchronization with the device. The DS2480B will perform a master reset cycle equivalent to the power-on reset if it detects start polarity in place of the stop bit. The host has several options to generate this condition.
PAGE 6
DS2480B In addition to the command codes explained in the subsequent sections the DS2480B understands the following reserved command codes: E1h E3h F1h switch to Data Mode switch to Command Mode pulse termination Except for these reserved commands, the Search Accelerator control and the first byte after power-on reset or master reset cycle, every legal command byte generates a response byte. The pulse termination code triggers the response byte of the terminated pulse command.
PAGE 7
DS2480B Table 1. COMMUNICATION COMMAND CODES FUNCTION BIT 7 Single Bit BIT 6 1 BIT 5 0 BIT 4 0 0 = write 0 1 = write 1 BIT 3, BIT 2 Search Accelerator Control 1 0 1 0 = accelerator off 1 = accelerator on See Text Reset 1 1 0 (don’t care) Pulse 1 1 1 0 = 5V strong pullup 1 = 12V prog. pulse 00 reg. speed 01 flex. speed 10 OD. speed 11 reg. speed 00 reg. speed 01 flex. speed 10 OD. speed 11 reg. speed 00 reg. speed 01 flex. speed 10 OD.
PAGE 8
DS2480B of the pulse command is arming and disarming a strong pullup after every subsequent byte in Data Mode. The arm/disarm function is controlled by bit 1 of the command code. Bit 4 determines whether the device will generate a strong pullup to 5V or a 12V programming pulse. The table below summarizes these options.
PAGE 9
DS2480B During the execution of the Search ROM function, the Search Accelerator receives from the host information on the preferred path to choose as one contiguous chain of bytes and then translates it into the appropriate time slots on the 1-Wire bus. In addition, the Search Accelerator reports back to the host the ROM ID of the device actually addressed and the bit positions in which conflicts were found.
PAGE 10
The type of time slot b2 (write 1 or write 0) is determined by the DS2480B as follows: b2 = rn if conflict (as chosen by the host) = b0 if no conflict (there is no alternative) = 1 if error (there is no response) DS2480B The response the host will receive during a complete pass through a Search ROM function using the Search Accelerator consists of 16 bytes as follows: first byte 7 6 r’3 d3 et cetera 16th byte 7 6 r’63 d63 5 r’2 4 d2 3 r’1 2 d1 1 r’0 0 d0 5 r’62 4 d62 3 r’61 2 d61 1 r’60 0 d60
PAGE 11
Search Accelerator Usage Example Action Sequence Generate Reset Pulse Set Data Mode Search ROM command Set Command Mode Search Accelerator On Set Data Mode Send 16 bytes Set Command Mode Search Accelerator Off Set Data Mode Do Memory Function Set Command Mode Generate Reset Pulse DS2480B Host TX C1 E1 F0 E3 B1 E1 data E3 A1 E1 Host RX CD or ED (nothing) (as sent) (nothing) (nothing) (nothing) (response) (nothing) (nothing) (nothing) E3 C1 (nothing) CD or ED CONFIGURATION COMMANDS The DS2480B is desig
PAGE 12
DS2480B Table 3. CONFIGURATION PARAMETER OVERVIEW Parameter Description Pulldown Slew Rate Control Programming Pulse Duration Strong Pullup Duration Write-1 Low Time Data Sample Offset and Write 0 Recovery Time RS232 Baud Rate Par. Code Configurable at Standard Flexible Overdrive 001 √ Default Reg./Flex. Overdrive 15V/µs 15V/µs 010 √ √ √ 512µs 512µs 011 100 √ √ √ √ 524ms 8µs 3µs 3µs 9.6kbps 524ms 1µs 1µs 3µs 9.
PAGE 13
DS2480B Table 4. CONFIGURATION PARAMETER VALUE CODES Parameter Code 001 (PDSRC) 010 (PPD) 000 15 32 001 2.2 64 010 1.65 128 Value Codes 011 100 101 1.37 1.1 0.83 256 512 1024 110 0.7 2048 111 0.55 ∞ Unit V/µs µs 011 (SPUD) 16.4 65.5 131 262 524 1048 Note ms 100 (W1LT) 101 (DSO/W0RT) 110 (LOAD) 111 (RBR) 8 3 1.8 9.6 9 4 2.1 19.2 10 5 2.4 57.6 11 6 2.7 115.2 12 7 3.0 9.6 13 8 3.3 19.2 14 9 3.6 57.6 ∞ 15 10 3.9 115.
PAGE 14
CONTROLLED EDGES DS2480B One of the tasks of the DS2480B is to actively shape the edges of the 1-Wire communication waveforms. This speeds up the recharging of the 1-Wire bus (rising edges) and reduces ringing of long lines (falling edges). The circuitry for shaping rising edges is always on. The slew rate of falling edges is actively controlled only at flexible speed and requires the parameter for slew rate control being different from its power-on default value.
PAGE 15
Falling Edges (DS2480B-initiated) DS2480B Whenever the DS2480B begins pulling the 1-Wire bus low to initiate a time slot, for example, it first turns off the weak pullup current IWEAKPU. Then, at standard and Overdrive speeds it will generate a falling edge at a slew rate of typically 15V/µs. This value is acceptable for short 1-Wire busses and adequate for communication at Overdrive speed. For 1-Wire networks of more than roughly 30m length one should always use flexible speed.
PAGE 16
DS2480B 1-WIRE COMMUNICATION WAVEFORMS One of the major features of the DS2480B is that it relieves the host from generating the timing of the 1-Wire signals and sampling the 1-Wire bus at the appropriate times. How this is done for the reset/presence detect sequence is shown in Figure 6a. This sequence is composed of four timing segments: the reset low time tRSTL, the short/interrupt sampling offset tSI, the presence detect sampling offset tPDT and a delay time tFILL.
PAGE 17
DS2480B A Write-1 and Read Data time slot is comprised of the segments tLOW1, tDSO and tHIGH. During Write-1 time slots, after the Write-1 low time tLOW1 is over, the DS2480B waits for the duration of the data sample offset and then samples the voltage at the 1-Wire bus to read the response. After this, the waiting time tHIGH1 must expire before the time slot is complete. A Write-0 time slot only consists of the two segments tLOW0 and tREC0.
PAGE 18
PULSE WAVEFORMS, DISARMED DS2480B The Pulse command can be used to generate a strong pullup to 5V and a 12V programming pulse, respectively. The duration of the pulse is predefined if the parameter value code of parameter 010 (Programming Pulse Duration) has a value from 000 to 110, and parameter 011 (Strong Pullup Duration) has a value from 000 to 101 (see Table 4). Figures 7a and 7b show the timing of a pulse with predefined duration, which should be considered the normal case.
PAGE 19
DS2480B For EPROM programming, only a single slave device should be connected to the 1-Wire bus and the cable must to be short, not to exceed a few meters. One should not attempt generating a programming pulse with a non-EPROM device on the bus; this may damage the device as well as the DS2480B. Certain applications may require a duration for a strong pullup or programming pulse that cannot be realized using one of the predefined values.
PAGE 20
PULSE WAVEFORM, ARMED DS2480B As explained in the Communication Commands section, bit 1 of the Pulse command allows the arming of a strong pullup to 5V if the bit is set to 1. If the strong pullup is armed and the device is switched to Data Mode, there will be a strong pullup immediately following every byte on the 1-Wire bus. This mode is implemented to provide extra energy when writing to EEPROM devices or to do a temperature conversion with the DS1920 temperature iButton, for example.
PAGE 21
SINGLE BIT WITH STRONG PULLUP DS2480B Similar to the Pulse command, the Single Bit command also allows generating a strong pullup immediately following a time slot. The strong pullup of the Single Bit command, however, is controlled directly by bit 1 of the command code and therefore needs not be armed. Since the DS2480B remains in Command Mode when using the Single Bit command, any duration of the strong pullup including infinite may be selected. Figure 9a.
PAGE 22
DS2480B The minimum duration of a strong pullup of infinite duration strongly depends on the baud rate of the communication between host and DS2480B. The host must first receive the response byte of the Single Bit command, react to it and then transmit the termination command. Neglecting the host’s response time, the shortest duration of an infinite strong pullup therefore is 173.6µs at 115.2kbps, 347.2µs at 57.6kbps, 1.04ms at 19.2kbps, and 2.08ms at 9.6kbps.
PAGE 23
READ MEMORY SEQUENCE Action Sequence Generate Reset Pulse Set Data Mode Skip ROM Command Read Memory Command Starting Address TA1 Starting Address TA2 Read 8 Bytes of Data Set Command Mode Generate Reset Pulse DS2480B Host TX C1 E1 CC F0 40 00 FF (x8) E3 C1 Host RX CD or ED (nothing) CC (as sent) (as sent) (as sent) (data) (nothing) CD or ED WRITE EPROM SEQUENCE (DS2505) Write memory starting at address 40h Action Sequence Host TX Set Vpp dur.
PAGE 24
DS2480B HARDWARE APPLICATION EXAMPLES This section discusses five typical application scenarios. The DS2480B can be configured for EPROM programming as well as for 5V operation only. OUTPUT FILTERING As described in the CONTROLLED EDGES section, the DS2480B employs an active pullup on the rising edges of the 1-Wire waveform. Excessive noise on the 1-Wire line in the region of the pullup trip voltage, VIAPTO, can cause an undesirable trip of the active pullup, which can disrupt 1-Wire communication.
PAGE 25
DS2480B Figure 11a. UART DIRECT With EPROM Programming 12 V VDD VPP UART SIN (RXD) RXD or µC 5V POL 1-W 1-Wire Bus DS2480B SOUT (TXD) L DS9503 TXD DS9503 GND 1 0 VDD VPP POL Optional filter RXD 1-W DS2480B 62 Ohms 470 pF TXD GND * DS9503 Return M Start 5V Operation Only 5V Regulator Stop * only one DS950x ESD protection device with 5V Figure 11b. ±5V RS232 Power Stealing 22 µF 0.
PAGE 26
DS2480B Figure 11c. ±12V RS232 Power Stealing +12VDC Programming 5V Regulator DTR VPP RTS SIN (RXD) UART or µC BSS110 SOUT (TXD) 6.8K 4.7V 1 µf L M 0 RXD 1-W See Text 1-Wire Bus * DS2480B DS9503 TXD GND DS9503 Return 1 Start POL S D 2.7K VDD * only one DS950x ESD protection device with 5V Stop In the interface to a true RS232C system (±12V, Figure 11c) the power for the DS2480B is stolen from DTR and RTS.
PAGE 27
DS2480B Figure 11d. UART DIRECT OPTO-ISOLATED 5V SIN (RXD) 2.7K 5.1K 5V DC to DC Converter 12 V VDD 5.1K VPP 2.7K POL DS2480B UART 1-W or µC 1-Wire Bus RXD HCPL-2300 SOUT (TXD) TXD GND 1 L 0 DS9503 Return M Start * DS9503 Stop * only one DS950x ESD protection device with 5V The circuit in Figure 11d is essentially the same as in Figure 11a. The main difference is the optoisolation. The characteristics of the opto-isolators are not very critical.
PAGE 28
Figure 12. RS232 DATA TIMING RXD LINE DS2480B Figure 13. RECEIVE DELAY TIMING Figure 14. RS232 DATA TIMING TXD LINE Figure 15. TXD LINE ASYMMETRY Maxim Integrated ...........................................................................................................................................................................................
PAGE 29
DS2480B Table 7. FUNCTION AND SPEED MATRIX Baud Rate 9600bps 19200bps 57600bps 115200bps √ X Standard √ √ X √ X X X X 1-Wire Speed Flexible √ √ X X X X X X Overdrive √ √ √ √ √ √ X √ Function Search Command/Data Search Command/Data Search Command/Data Search Command/Data tIDLET is guaranteed by the UART; no precautions necessary. Not recommended unless tIDLET is controlled by the host through a wait function. Maxim Integrated ............................................................................
PAGE 30
DS2480B ABSOLUTE MAXIMUM RATINGS* Voltage on 1-W to Ground Voltage on VPP to Ground Voltage on VDD, RXD, TXD, POL to Ground Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10s) Soldering Temperature (reflow) -0.5V to +14.0V -0.5V to +12.5V -0.5V to +7.
PAGE 31
AC ELECTRICAL CHARACTERISTICS PARAMETER UART Bit Time Device Bit Time Fall Time RXD Rise Time RXD Transmit Idle Time Receive Idle Time Asymmetry Arrival Response Time Master Reset Time Active Pullup on Time Response Time SYMBOL TT TR tFR tRR tIDLET tIDLER tASYM tARR tMR tAPUOT tRESP DS2480B (VDD = 4.5V to 5.5V; -40°C to +85°C) MIN 8.68 8.68 8 13 0 4.4 104 0.5 8.68 + ∆ TYP tIDLET MAX 104 104 20 27 1 52 2.
PAGE 32
DS2480B REVISION DATE 3/17/99 10/19/99 7/1/03 8/20/04 5/10 DESCRIPTION Initial release Removed preliminary status, deleted VPPmin spec, changed ∆VPROGMAX to 0.30V Changing the Communication Command Response Bit 5 to Don't Care status. Added references to Application Note 192. Clarification in the second paragraph of the Device Operation section. Removed references to DOS from the search accelerator introduction.