Datasheet

DS2762 High-Precision Li+ Battery Monitor With Alerts

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HARDWARE CONFIGURATION

Because the 1-Wire bus has only a single line, it is important that each device on the bus be able to drive it at the

appropriate time. To facilitate this, each device attached to the 1-Wire bus must connect to the bus with open-drain

or tri-state output drivers. The DS2762 used an open-drain output driver as part of the bidirectional interface

circuitry shown in Figure 16. If a bidirectional pin is not available on the bus master, separate output and input pins

can be connected together.

The 1-Wire bus must have a pullup resistor at the bus-master end of the bus. For short line lengths, the value of

this resistor should be approximately 5kW. The idle state for the 1-Wire bus is high. If, for any reason, a bus

transaction must be suspended, the bus must be left in the idle state to properly resume the transaction later. If the

bus is left low for more than 120ms, slave devices on the bus begin to interpret the low period as a reset pulse,

effectively terminating the transaction.

Figure 16. 1-Wire Bus Interface Circuitry

TRANSACTION SEQUENCE

The protocol for accessing the DS2762 through the 1-Wire port is as follows:

§ Initialization

§ Net Address Command

§ Function Command

§ Transaction/Data

The sections that follow describe each of these steps in detail.

All transactions of the 1-Wire bus begin with an initialization sequence consisting of a reset pulse transmitted by the

bus master, followed by a presence pulse simultaneously transmitted by the DS2762 and any other slaves on the

bus. The presence pulse tells the bus master that one or more devices are on the bus and ready to operate. For

more details, see the 1-Wire Signaling section.

1mA

(typ)

100W

MOSFET

Rx = RECEIVE

Tx = TRANSMIT

PULLUP

(2.0V to 5.5V)

4.7kW

BUS M

STER DS2762 1-Wire PORT