Datasheet

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19-6067; Rev 5; 9/13

GENERAL DESCRIPTION

The DS28EC20 is a 20480-bit, 1-Wire

EEPROM

organized as 80 memory pages of 256 bits each. An

additional page is set aside for control functions.

Data is written to a 32-byte scratchpad, verified, and

then copied to the EEPROM memory. As a special

feature, blocks of eight memory pages can be write

protected or put in EPROM-Emulation mode, where

bits can only be changed from a 1 to a 0 state. The

DS28EC20 communicates over the single-conductor

1-Wire bus. The communication follows the standard

1-Wire protocol. Each device has its own unalterable

and unique 64-bit ROM registration number. The

registration number is used to address the device in

a multidrop 1-Wire net environment.

APPLICATIONS

Device Authentication

IEEE 1451.4 Sensor TEDS

Ink/Toner Cartridges

Medical Sensors

PCB Identification

Wireless Base Stations

ORDERING INFORMATION

PART

TEMP RANGE

PIN-PACKAGE

DS28EC20+

-40°C to +85

3 TO-92

DS28EC20+T

-40°C to +85

3 TO-92, T&R

DS28EC20P+

-40°C to +85

6 TSOC

DS28EC20P+T

-40°C to +85

6 TSOC, T&R

+Denotes a lead(Pb)-free/RoHS-compliant package.

T = Tape and reel.

TYPICAL OPERATING CIRCUIT

PX.Y

µC

I/O

DS28EC20

GND

PUP

(300Ω

to 2.2kΩ)

FEATURES

 20480 Bits of Nonvolatile (NV) EEPROM

Partitioned into Eighty 256-Bit Pages

 Individual 8-Page Groups of Memory Pages

(Blocks) can be Permanently Write Protected or

Put in OTP EPROM-Emulation Mode ("Write to 0")

 Read and Write Access Highly Backward-

Compatible to Legacy Devices (e.g., DS2433)

 256-Bit Scratchpad with Strict Read/Write

Protocols Ensures Integrity of Data Transfer

 200k Write/Erase Cycle Endurance at +25°C

 Unique Factory-Programmed 64-Bit Registration

Number Ensures Error-Free Device Selection

and Absolute Part Identity

 Switchpoint Hysteresis and Filtering to Optimize

Performance in the Presence of Noise

 Communicates to Host at 15.4kbps or 90kbps

Using 1-Wire Protocol

 Low-Cost TO-92 Package

 Operating Range: 5V ±5%, -40°C to +85°C

 Operating Range: 3.3V ±5%, 0°C to +70°C

(Standard Speed only)

 IEC 1000-4-2 Level 4 ESD Protection (±8kV

Contact, ±15kV Air, Typical) for I/O Pin

PIN CONFIGURATION

PIN 1 ---------- GND

PIN 2 ---------- I/O

PIN 3 ---------- N.C.

28EC20

BOTTOM VIEW

2 3

1 2 3

FOR TAPE-AND-

REEL THE LEADS

ARE FORMED TO

100 MILS (2.54mm)

SPACING VERSUS

50 MILS (1.27mm)

FOR BULK.

TSOC, Top View

PIN 1

----------

N.C.

PIN 2 ---------- I/O

PIN 3 ---------- GND

PIN 4, 5, 6 ---- N.C.

TO-92

Commands, bytes, and modes are capitalized for clarity.

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

DS28EC20

20Kb 1-Wire EEPROM

Summary of content (27 pages)

PAGE 1
DS28EC20 20Kb 1-Wire EEPROM GENERAL DESCRIPTION FEATURES ® The DS28EC20 is a 20480-bit, 1-Wire EEPROM organized as 80 memory pages of 256 bits each. An additional page is set aside for control functions. Data is written to a 32-byte scratchpad, verified, and then copied to the EEPROM memory. As a special feature, blocks of eight memory pages can be write protected or put in EPROM-Emulation mode, where bits can only be changed from a 1 to a 0 state.
PAGE 2
DS28EC20: 20Kb 1-Wire EEPROM ABSOLUTE MAXIMUM RATINGS I/O Voltage to GND I/O Sink Current Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering, 10s) Soldering Temperature (reflow) TO-92 TSOC -0.5V, +6V 20mA -40°C to +85°C +150°C -55°C to +125°C +300°C +250°C +260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
PAGE 3
DS28EC20: 20Kb 1-Wire EEPROM PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.
PAGE 4
DS28EC20: 20Kb 1-Wire EEPROM 3.3V SUPPLY ELECTRICAL CHARACTERISTICS (VPUP = 3.3V ±5%, TA = 0°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.2 kΩ pF µA I/O PIN GENERAL DATA 1-Wire Pullup Resistance Input Capacitance Input Load Current High-to-Low Switching Threshold Input Low Voltage Low-to-High Switching Threshold Switching Hysteresis Output Low Voltage Recovery Time Rising-Edge Hold-off Time Timeslot Duration (Notes 1, 2) 0.
PAGE 5
DS28EC20: 20Kb 1-Wire EEPROM Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: Note 13: Note 14: Note 15: Note 16: Note 17: Note 18: Note 19: Note 20: Note 21: Note 22: Note 23: System requirement. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system, 1-Wire recovery times, and current requirements during EEPROM programming.
PAGE 6
DS28EC20: 20Kb 1-Wire EEPROM PIN DESCRIPTION NAME I/O GND N.C. FUNCTION 1-Wire Bus Interface. Open drain, requires external pullup resistor. Ground Reference Not Connected DESCRIPTION The DS28EC20 combines 20Kb of data EEPROM with a fully featured 1-Wire interface in a single chip. The memory is organized as 80 pages of 256 bits each. In addition, the device has one page for control functions such as permanent write protection and EPROM-Emulation mode for individual 2048-bit (8-page) memory blocks.
PAGE 7
DS28EC20: 20Kb 1-Wire EEPROM OVERVIEW The block diagram in Figure 1 shows the relationships between the major control and memory sections of the DS28EC20. The DS28EC20 has four main data components: 1) 64-bit registration number, 2) 32-byte scratchpad, 3) eighty 32-byte pages of EEPROM, and 4) special function registers. The hierarchical structure of the 1-Wire protocol is shown in Figure 2.
PAGE 8
DS28EC20: 20Kb 1-Wire EEPROM Figure 4. 1-Wire CRC Generator 8 5 4 Polynomial = X + X + X + 1 st nd 1 STAGE X 0 rd 2 STAGE X 1 th 3 STAGE X 2 th 4 STAGE X 3 th 5 STAGE X 4 th 6 STAGE X 5 th 7 STAGE X 6 8 STAGE X 7 X 8 INPUT DATA MEMORY Data memory and special function registers are located in a linear address space, as shown in Figure 5. The data memory and the registers have unrestricted read access. The data memory consists of 80 pages of 32 bytes each.
PAGE 9
DS28EC20: 20Kb 1-Wire EEPROM Figure 5.
PAGE 10
DS28EC20: 20Kb 1-Wire EEPROM ADDRESS REGISTERS AND TRANSFER STATUS The DS28EC20 employs three address registers: TA1, TA2, and E/S (Figure 6). Registers TA1 and TA2 must be loaded with the target address to which the data is written or from which data is read. Register E/S is a read-only transfer status register used to verify data integrity with write commands. E/S bits E[4:0] are loaded with the incoming T[4:0] on a Write Scratchpad command and increment on each subsequent data byte.
PAGE 11
DS28EC20: 20Kb 1-Wire EEPROM MEMORY FUNCTION COMMANDS The Memory Function Flowchart (Figure 7) describes the protocols necessary for accessing the memory of the DS28EC20. The target address registers TA1 and TA2 are used for both read and write. To prevent accidental changes to the data memory or control registers the device employs a BS-flag indicating a “bad sequence”. The communication between master and DS28EC20 takes place either at standard speed (default, OD = 0) or at overdrive speed (OD = 1).
PAGE 12
DS28EC20: 20Kb 1-Wire EEPROM Figure 7-1. Memory Function Flowchart From ROM Functions Flow Chart (Figure 9) Bus Master TX Memory Function Command 0Fh Write Scratchpad ? To Figure 7, nd 2 Part N Y Note: The PF Flag is set upon poweron reset. It is cleared only if a complete 16-bit target address is transmitted. Sending less than 16 bits for the target address sets the PF flag.
PAGE 13
DS28EC20: 20Kb 1-Wire EEPROM Figure 7-2. Memory Function Flowchart (continued) From Figure 7, st 1 Part AAh Read ScratchPad ? N To Figure 7, rd 3 Part Y Bus Master RX TA1 (T[7:0]), TA2 (T[15:8]) and E/S Byte DS28EC20 sets Scratchpad Offset = (T[4:0]) Bus Master RX Data Byte from Scratchpad Offset DS28EC20 Increments Scratchpad Offset Master TX Reset ? See note in Write Scratchpad flow chart for additional details. Y N N Scrpad.
PAGE 14
DS28EC20: 20Kb 1-Wire EEPROM Figure 7-3. Memory Function Flowchart (continued) From Figure 7, nd 2 Part 55h Copy ScratchPad ? To Figure 7, th 4 Part N Y Bus Master TX TA1 (T[7:0]), TA2 (T[15:8]) and E/S Byte Y Auth.
PAGE 15
DS28EC20: 20Kb 1-Wire EEPROM Figure 7-4.
PAGE 16
DS28EC20: 20Kb 1-Wire EEPROM COPY SCRATCHPAD [55h] The Copy Scratchpad command is used to copy data from the scratchpad to the data memory and the writable sections of the register page. After issuing the Copy Scratchpad command, the master must provide a 3-byte authorization pattern, which should have been obtained by an immediately preceding Read Scratchpad command. This 3-byte pattern must exactly match the data contained in the three address registers (TA1, TA2, E/S, in that order).
PAGE 17
DS28EC20: 20Kb 1-Wire EEPROM speed, the DS28EC20 requires VPUP to be 5V ±5%. Note that legacy 1-Wire products support a standard communication speed of 16.3kbps and overdrive of 142kbps. The slightly reduced rates for the DS28EC20 are a result of additional recovery times, which in turn were driven by a 1-Wire physical interface enhancement to improve noise immunity. The value of the pullup resistor primarily depends on the network size and load conditions. The DS28EC20 requires a pullup resistor of 2.
PAGE 18
DS28EC20: 20Kb 1-Wire EEPROM MATCH ROM [55h] The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS28EC20 on a multidrop bus. Only the DS28EC20 that exactly matches the 64-bit ROM sequence responds to the following memory function command. All other slaves wait for a reset pulse. This command can be used with a single or multiple devices on the bus.
PAGE 19
DS28EC20: 20Kb 1-Wire EEPROM Figure 9-1.
PAGE 20
DS28EC20: 20Kb 1-Wire EEPROM Figure 9-2.
PAGE 21
DS28EC20: 20Kb 1-Wire EEPROM 1-Wire SIGNALING The DS28EC20 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. Except for the presence pulse, the bus master initiates all falling edges. The DS28EC20 can communicate at two different speeds: standard speed and overdrive speed.
PAGE 22
DS28EC20: 20Kb 1-Wire EEPROM Master-to-Slave For a write-one time slot, the voltage on the data line must have crossed the VTH threshold before the write-one low time tW1LMAX is expired. For a write-zero time slot, the voltage on the data line must stay below the VTH threshold until the write-zero low time tW0LMIN is expired. For the most reliable communication, the voltage on the data line should not exceed VILMAX during the entire tW0L or tW1L window.
PAGE 23
DS28EC20: 20Kb 1-Wire EEPROM Slave-to-Master A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below VTL until the read low time tRL is expired. During the tRL window, when responding with a 0, the DS28EC20 starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again.
PAGE 24
DS28EC20: 20Kb 1-Wire EEPROM CRC GENERATION The DS28EC20 uses two different types of CRCs. One CRC is an 8-bit type and is stored in the most significant byte of the 64-bit ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS28EC20 to determine if the ROM data has been received error-free. 8 5 4 The equivalent polynomial function of this CRC is X + X + X + 1. This 8-bit CRC is received in the true (noninverted) form.
PAGE 25
DS28EC20: 20Kb 1-Wire EEPROM COMMAND-SPECIFIC 1-Wire COMMUNICATION PROTOCOL—LEGEND SYMBOL RST PD Select WS RS CPS RM ERM TA TA-E/S CRC16\ FF loop AA loop Programming DESCRIPTION 1-Wire reset pulse generated by master. 1-Wire presence pulse generated by slave. Command and data to satisfy the ROM function protocol. Command "Write Scratchpad". Command "Read Scratchpad". Command "Copy Scratchpad". Command "Read Memory". Command "Extended Read Memory".
PAGE 26
DS28EC20: 20Kb 1-Wire EEPROM READ MEMORY (CANNOT FAIL) RST PD Select RM TA FF Loop EXTENDED READ MEMORY (CANNOT FAIL) RST PD Select ERM TA CRC16\ <32 Bytes> CRC16\ Loop PACKAGE INFORMATION For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only.
PAGE 27
DS28EC20: 20Kb 1-Wire EEPROM REVISION HISTORY REVISION NUMBER 0 REVISION DATE 071007 1 091707 2 3 040109 11/11 4 3/12 5 9/13 DESCRIPTION Initial release TSOC package added; corrected Electrical Characteristics table Note 20 Updated the text and graphics to mark which features are not applicable in the low-voltage environment Created a second Electrical Characteristics table for 3.