Datasheet

GND
VCC
GND
SCL
SDA
32KHZ
VBAT
VCC GND
1
32 kHz
32KHZ
1
VCC
2
INT/SQW
3
RST
4
GND
5
VBAT
6
SDA
7
SCL
8
DS3231MU1
SCL
SDA
GND
VCC
INT/SQW
4. 7k
R6
VCC VCC GND
4. 7k
R7
150R2
150R3
150R4
150R1 RST
1uF
C1
0. 1uFC2
4. 7k
R8
VCC
VCC
4. 7k
R5
B+
1
B-
2
BAT1
1
2
3
4
5
6
J1
1
2
3
4
5
6
7
8
J2
DS3231MPMB1 Peripheral Module
3Maxim Integrated
Software and FPGA Code
Example software and drivers are available that execute
directly without modification on several FPGA devel-
opment boards tha support an integrated or synthe-
sized microprocessor. These boards include the Digilent
Nexys 3, Avnet LX9, and Avnet ZEDBoard, although
other platforms can be added over time. Maxim provides
complete Xilinx ISE projects containing HDL, Platform
Studio, and SDK projects. In addition, a synthesized bit
stream, ready for FPGA download, is provided for the
demonstration application.
The software project (for the SDK) contains several
source files intended to accelerate customer evalu-
ation and design. These include a base application
(maximModules.c) that demonstrates module function-
ality and uses an API interface (maximDeviceSpecific
Utilities.c) to set and access Maxim device functions
within a specific module.
The source code is written in standard ANSI C format, and
all API documentation including theory/operation, regis-
ter description, and function prototypes are documented
in the API interface file (maximDeviceSpecificUtilities.h
& .c).
The complete software kit is available for download at
www.maximintegrated.com. Quick start instructions are
also available as a separate document.
Figure 1. DS3231MPMB1 Peripheral Module Schematic