Datasheet

Sample/Hold
Pin combinations GP2-GP3 and GP12-GP13 can be used
for sample/hold conversions if enabled in the SHCN regis-
ter. These two can be independently enabled or disabled
by writing a 1 or 0 to their corresponding bit locations in
SHCN register. A data buffer location is reserved for each
channel. When a particular channel is enabled, a sample
of the input voltage is taken when a signal is issued on
the SHEN pin, converted and stored in the corresponding
data buffer.
The two sample/hold channels can sample simultane-
ously on the same SHEN signal or different SHEN signals
depending on the SH_DUAL bit in the SHCN SFR.
The sample/hold data available interrupt flag (SHnDAI)
can be configured to trigger an interrupt following sample
completion. Once set, SHnDAI can be cleared by software.
Each sample/hold circuit consists of a sampling capaci-
tor, charge injection nulling switches, and a buffer. Also
included is a discharge circuit used to discharge parasitic
capacitance on the input node and the sample capacitor
before sampling begins. The negative input pins are used
to reduce ground offsets and noise.
The ADC controller provides options to average the sam-
ple/hold results of individual channel. The device provides
1, 2, 4, and 8 samples averaging configurations for each
channel independently.
The sample/hold inputs can be used for monitoring the
burst mode receive power signal in APD biasing and OLT
applications using current mirror, as shown Figure 10.
Temperature Measurement
The device provides an internal temperature sensor for
die temperature monitoring which can be enabled inde-
pendently by setting the appropriate bit locations in the
TEMPCN register. Whenever a temperature conversion
is complete the INTDAI is set. This can be configured to
cause an interrupt, and can be cleared by software. The
temperature measurement resolution is 0.0625°C.
Figure 10. Burst Mode RSSI Monitoring
DS4830A Optical Microcontroller
www.maximintegrated.com
Maxim Integrated
24
MIR1
MIRIN
MIR2
MIROUT
I
BIAS
ADC
MCU
CORE
C
S
C
S
C
IN
3.3V
3.3V
V
CC
R
IN
C
IN
VINP
S/H A
S/H B
VINN
VINP
VINN
SEN
GND
C
S
C
S
C
IN
CONTROL LOGIC
4 x R
IN
C
IN
BURST MODE
RSSI TRIGGER
I
MIROUT/10
R
C
R
D
I
MIROUT/5
CURRENT
LIMIT
CLAMP
GND
DS4830A PWM
R
A
1M
R
AGC
100
ROSA
APD
TIA
R
B
15kΩ
BSS123
<76V
APD BIAS
APD FEEDBACK
TO ADC
DS1842
DS4830A
APD VOLTAGE
MONITOR TO ADC