Datasheet

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DS4830

Optical Microcontroller

General Description

The DS4830 provides a complete optical control, calibra-

tion, and monitor solution based on a low-power, 16-bit,

microcontroller core, providing program and RAM data

memory. I/O resources include a fast/accurate analog-to-

digital converter (ADC), fast comparators with an internal

comparison digital-to-analog converter (DAC), 12-bit

DACs, 12-bit PWMs, internal and external temperature

sensors, fast sample/hold, I

C slave host interface, and

a multiprotocol serial master/slave interface.

Direct connection of diode-connected transistors, used

as remote temperature sensors, is supported as well as

expansion to additional external digital temperature sen-

sor ICs using the on-chip master I

C interface. An inde-

pendent slave I

C interface facilitates communication to

a host microprocessor in addition to password-protected

in-system reprogramming of the on-chip flash.

Firmware development is supported by third-party highly

versatile C-compilers and development software that

programs flash and performs in-circuit debug through

the integrated JTAG interface and associated hardware.

Applications

PON Diplexers and Triplexers: GPON, 10GEPON,

XPON OLT, ONU

Optical Transceivers: XFP, SFP, SFP+, QSFP,

40G, 100G

Features

S 16-Bit Low-Power Microcontroller

S 36 kWords Total Program Memory

 32 kWords Flash Program Memory

 4 kWords ROM Program Memory

S 1 kWords Data RAM

S 8 DAC Channels

 12-Bit Buffered Voltage DACs

 Internal or External Reference

S 10 PWM Channels

 Boost/Buck DC-DC Control with Support for

7-Bit to 12-Bit Resolution and 1MHz Switching

Frequency

 Supports 4-Channel TECC H-Bridge Control

S 8-Bit Fast Comparator with 16-Input Mux

 1.6µs per Comparison

S 13-Bit A/D Converter with 26-Input Mux (27ksps)

S Temperature Measurement Analog Front-End

 Internal Temperature Sensor, ±3NC

 0.0625NC Resolution

 Supports Two External Temperature Sensors

 Differential Rail-Rail Inputs

S 31 GPIO Pins

S Maskable Interrupt Sources

S Internal 20MHz Oscillator, CPU Core Frequency 10MHz

 4% Accurate from 0NC to +50NC

S Up to 133MHz External Clock for PWM and Timers

S Slave Communication Interface: SPI or 400kHz

C-Compatible 2-Wire

S Master Communication Interface: SPI, 400kHz I

C-

Compatible, or Maxim 3-Wire Laser Driver

S I

C and JTAG Bootloader

S Two 16-Bit Timers

S 2.97V to 3.63V Operating Voltage Range

S Brownout Monitor

S JTAG Port with In-System Debug and Programming

S Low Power Consumption (16mA) with All Analog

Active

Typical Application Circuit appears at end of data sheet.

19-5934; Rev 2; 6/13

Ordering Information appears at end of data sheet.

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may

be simultaneously available through various sales channels. For information about device errata, go to: www.maximintegrated.com/errata.

For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/DS4830.related

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Summary of content (30 pages)

PAGE 1
DS4830 Optical Microcontroller General Description The DS4830 provides a complete optical control, calibration, and monitor solution based on a low-power, 16-bit, microcontroller core, providing program and RAM data memory.
PAGE 2
DS4830 Optical Microcontroller Absolute Maximum Ratings Continuous Source Current.................20mA per pin, 50mA total Operating Temperature Range........................... -40NC to +85NC Storage Temperature Range............................. -55NC to +125NC Lead Temperature (soldering, 10s)............................. …+300NC Soldering Temperature (reflow)................................... …+260NC VDD to GND.........................................................-0.3V to +3.97V SCL, SDA, RST......
PAGE 3
DS4830 Optical Microcontroller DC Electrical Characteristics (continued) (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VDD = 3.3V, TA = +25NC.
PAGE 4
DS4830 Optical Microcontroller DAC DC Electrical Characteristics (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VDD = 3.3V, TA = +25NC.) PARAMETER DAC Resolution SYMBOL CONDITIONS DACR DAC Internal Reference Accuracy DACREFACC DAC Internal Reference Power-Up Speed tDACPUP Reference Input Full-Scale Range (REFINA, REFINB) REFFS DAC Operating Current IDACS 2.5V internal reference +1.25 10 1 Per channel 12-bit at 2.
PAGE 5
DS4830 Optical Microcontroller ADC DC Electrical Characteristics (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VDD = 3.3V, TA = +25NC.) PARAMETER ADC Resolution SYMBOL ADCR ADC Internal Reference Accuracy ADCREFACC ADC Operating Current IADC CONDITIONS Default or slow ADC clock setting MIN TYP MAX 13 UNITS Bits -0.85 +0.85 % See the DC Electrical Characteristics ADC Full-Scale 1 VFS-ADC1 1.2 V ADC Full-Scale 2 VFS-ADC2 0.
PAGE 6
DS4830 Optical Microcontroller Flash Memory DC Electrical Characteristics (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VDD = 3.3V, TA = +25NC.) PARAMETER Flash Erase Time SYMBOL MIN TYP MAX tME Mass erase CONDITIONS 22.9 24.14 25.35 tPE Page erase 22.9 24.14 25.
PAGE 7
DS4830 Optical Microcontroller 3-Wire Digital Interface Specification (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted.) (See Figure 2.
PAGE 8
DS4830 Optical Microcontroller SPI Digital Interface Specification (continued) (VDD = 2.97V to 3.63V, TA = -40NC to +85NC, unless otherwise noted.) (See Figure 3 and Figure 4.
PAGE 9
DS4830 Optical Microcontroller Timing Diagrams SDA/ MSDA tBUF tF tLOW tSP tHD:STA SCL/ MSCL tHD:STA tHIGH tR tSU:STA tHD:DAT STOP tSU:STO tSU:DAT START REPEATED START NOTE: TIMING IS REFERENCED TO VILMAX AND VIHMIN. Figure 1.
PAGE 10
DS4830 Optical Microcontroller Timing Diagrams (continued) SHIFT SAMPLE SHIFT SAMPLE MSPICS (SAS = 0) tMSPICK 1/0 MSPICK CKPOL/CKPHA 0/1 0/1 tMCH 1/1 MSPICK CKPOL/CKPHA 1/0 tMCL 1/1 0/0 0/0 tMOH tSPI_RF tMOV MSPIDO MSB tMLH tMIS MSPIDI LSB MSB-1 tMIH MSB LSB MSB-1 Figure 3.
PAGE 11
DS4830 Optical Microcontroller Timing Diagrams (continued) tTL TCK VREF tTH TMS/TDI tDVTH tTHDX TDO tTLQ Figure 5.
PAGE 12
DS4830 Optical Microcontroller Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) DAC INL (LSB) DAC DNL (LSB) 4 3 DAC DNL (LSB) DAC INL (LSB) 2 1 0 -1 -2 -3 -4 -5 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.0 500 1000 1500 2000 2500 3000 3500 4000 DS4830 toc02 DS4830 toc01 5 0 500 1000 1500 2000 2500 3000 3500 4000 SETTING (DEC) SETTING (DEC) ADC INL (LSB) ADC DNL (LSB) 2 -3 DS4830 toc04 0.8 0.
PAGE 13
DS4830 Optical Microcontroller SHEN MDIO MDI 26 25 GP14 28 27 GP15 30 29 MCL MCS VDD PW8 TOP VIEW PW9 Pin Configuration 24 23 22 21 REFINA 31 20 GP13 DACPW0 32 19 GP12 DACPW1 33 18 GP11 DACPW2 34 17 GP10 DACPW3 35 16 REG18 DS4830 DACPW4 36 15 GP9 DACPW5 37 14 GP8 DACPW6 38 13 GP7 EP + REFINB 39 12 GP6 11 GP5 6 7 8 9 10 GP2 GP3 GP4 SDA 5 VDD RST 4 GP1 3 REG285 2 GP0 1 SCL DACPW7 40 TQFN (5mm x 5mm) Pin Description PIN NAME INPUT STRUCTURE(S) OUTP
PAGE 14
DS4830 Optical Microcontroller Pin Description (continued) PIN NAME INPUT STRUCTURE(S) OUTPUT STRUCTURE POWER-ON STATE SELECTABLE FUNCTIONS (FIRST COLUMN IS DEFAULT FUNCTION) 9 GP3 SH input, ADC Input None High Impedance ADC-S3 ADCSHN0 ADCD1N — — 10 GP4 ADC/Digital Input Push-Pull 55µA Pullup JTAG TCK ADC-S4 ADCD2P — P6.0 11 GP5 ADC/Digital Input Push-Pull 55µA Pullup JTAG TDI ADC-S5 ADCD2N — P6.
PAGE 15
DS4830 Optical Microcontroller Pin Description (continued) PIN NAME INPUT STRUCTURE(S) OUTPUT STRUCTURE POWER-ON STATE 27 MCS Digital Push-Pull, Extra Strong 55µA Pullup 3-Wire Chip Select MCS — SPI MSPICS PW7 P1.2 28 VDD Voltage Supply None VDD ADC-VDD — — — — 29 PW9 Digital Push-Pull, Extra Strong 55µA Pullup PW9 — — — P0.7 30 PW8 Digital Push-Pull, Extra Strong 55µA Pullup PW8 — — — P0.
PAGE 16
DS4830 Optical Microcontroller Pin Description (continued) PIN INPUT STRUCTURE(S) NAME OUTPUT STRUCTURE POWER-ON STATE SELECTABLE FUNCTIONS (FIRST COLUMN IS DEFAULT FUNCTION) PW7 — — P2.7 — — — — 40 DACPW7 Digital Push-Pull 55µA Pullup DAC7, FS = REFINB or Internal Reference — EP Exposed Pad (Connect to GND) — GND — PORT Note: Bypass VDD, REG285, and REG18 each with a 1µF X5R and 10nF capacitors to ground.
PAGE 17
DS4830 Optical Microcontroller Block Diagram MDI MDIO MCL MCS FFFFh 8FFFh MASTER: I2C SPI 3-WIRE CLOCK CONTROL, WATCHDOG TIMER, AND POWER MONITOR CKCN SCL SDA SSPIDO SSPICS 0000h IC 16-BIT TIMERS x2 UP TO 31 PORT PINS STACK MEMORY 16 x 16 4K x 16 UTILITY ROM 8000h 32K x 16 USER PROGRAM MEMORY DATA MEMORY SPACE 4K x 16 UTILITY ROM 03FFh 0000h 1K x 16 SRAM MEMORY MANAGEMENT UNIT (MMU) INTERRUPT LOGIC ADDRESS GENERATION IC IP IMR LOOP COUNTERS IIR LC[n] GPIO FFFFh 8FFFh SP WDCN RST
PAGE 18
DS4830 Optical Microcontroller Detailed Description The following is an introduction to the primary features of the DS4830 optical microcontroller. More detailed descriptions of the device features can be found in the DS4830 User’s Guide. Microcontroller Core Architecture The device employs a low-power, low-cost, high-performance, 16-bit RISC microcontroller with on-chip flash memory. It is structured on an advanced, 16 accumulator-based, 16-bit RISC architecture.
PAGE 19
DS4830 Optical Microcontroller SYSTEM REGISTERS PROGRAM MEMORY SPACE AP 8h 9h A Bh PFX Ch IP Dh SP Eh DPC 00h DATA MEMORY (WORD MODE) FFFFh FFFFh FFFFh 8FFFh 9FFFh 8FFFh 4K x 16 UTILITY ROM DP Fh DATA MEMORY (BYTE MODE) 0Fh 8000h 7FFFh 8K x 8 UTILITY ROM 8000h 4K x 16 UTILITY ROM 8000h PERIPHERAL REGISTERS 0h M0 1h M1 2h M2 3h M3 4h M4 M5 5h 00h 0Fh 00h 32K x 16 USER PROGRAM MEMORY 1Fh 16 x 16 STACK 001Fh PASSWORD 0010h 0000h 07FFh 0000h 2K x 8 SRAM DATA 03FFh 0000
PAGE 20
DS4830 Optical Microcontroller Stack Memory A 16-bit, 16-level internal stack provides storage for program return addresses. The stack is used automatically by the processor when the CALL, RET, and RETI instructions are executed and interrupts serviced. The stack can also be used explicitly to store and retrieve data by using the PUSH, POP, and POPI instructions. On reset, the stack pointer, SP, initializes to the top of the stack (0Fh).
PAGE 21
DS4830 Optical Microcontroller allows the application to develop custom loader software that can operate under the control of the application software. The utility ROM contains firmware-accessible flash programming functions that erase and program flash memory. These functions are described in detail in the DS4830 User’s Guide. Register Set Sets of registers control most device functions.
PAGE 22
DS4830 Optical Microcontroller All the registers that are cleared on POR are also cleared on brownout reset. Watchdog Timer Reset The watchdog timer provides a mechanism to reset the processor in the case of undesirable code execution. The watchdog timer is a hardware timer designed to be periodically reset by the application software. If the software operates correctly, the timer is reset before it reaches its maximum count.
PAGE 23
DS4830 Optical Microcontroller contains six peripheral modules, M0 to M5. An MIIR register is implemented in modules M1 and M2. The MIIRs are 16-bit read-only registers and all of them default to all zeros on system reset. Once the module that causes the interrupt is singled out, it can then be interrogated for the specific interrupt source and software can take appropriate action.
PAGE 24
DS4830 Optical Microcontroller Analog-to-Digital Converter and Sample/Hold The analog-to-digital converter (ADC) controller is the digital interface block between the CPU and the ADC. It provides all the necessary controls to the ADC and the CPU interface. The ADC uses a set of SFRs for configuring the ADC in desired mode of operation. The device contains a 13-bit ADC with an input mux (Figure 9). The mux selects the ADC input from 16 singleended or eight differential inputs.
PAGE 25
DS4830 Optical Microcontroller Temperature Measurement The device provides an internal temperature sensor for die temperature monitoring and two external remote temperature-sensing channels. In external temperature mode, current is forced into an external diode that is connected between user-specified channel pins (GP8-GP9 or GP10-GP11). The diode temperature is obtained by measuring the diode voltages at multiple bias currents.
PAGE 26
DS4830 Optical Microcontroller 3) The SCL logic level is high. 4) The I2C-compatible slave interface is disabled. When a timeout occurs, the timeout bit is set and an interrupt is generated, if enabled. The I2C master-related SFRs are accessed in module 1. The I2C slave-related SFRs are accessed in module 2. Details can be found in the I2C section of the DS4830 User’s Guide. Serial Peripheral Interface Module The device supports master and slave SPI interfaces.
PAGE 27
DS4830 Optical Microcontroller Applications Information Power-Supply Decoupling DS4830 DEBUG SERVICE ROUTINES (UTILITY ROM) CPU DEBUG ENGINE TMS TCK TDI TDO TAP CONTROLLER CONTROL BREAKPOINT ADDRESS DATA Figure 10. In-Circuit Debugger In-Circuit Debug Embedded debugging capability is available through the JTAG-compatible test access port (TAP).
PAGE 28
DS4830 Optical Microcontroller Ordering Information PART TEMP RANGE PIN-PACKAGE DS4830T+T -40NC to +85NC 40 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. *EP = Exposed pad. Maxim Integrated Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only.
PAGE 29
DS4830 Optical Microcontroller Typical Application Circuit VCC (+3.
PAGE 30
DS4830 Optical Microcontroller Revision History REVISION NUMBER REVISION DATE 0 6/11 Initial release 1 10/11 Corrected the lead temperature from +260NC to +300NC in the Absolute Maximum Ratings section; added explanation to the DAC Outputs section about the DAC operation to achieve desired INL levels 2 6/13 Style edits, rephrasing, edits to all Electrical Characteristics tables, values updated, Typical Operating Characteristics added, Block Diagram updated, and updated Figures 6, 7, 8 DESCRIPTION