DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock www.maxim-ic.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ORDERING INFORMATION TEMP RANGE MAX CLOCK SPEED (MHz) DS87C530-QCL 0C to +70C 33 52 PLCC DS87C530-QCL+ 0C to +70C 33 52 PLCC DS87C530-QNL -40C to +85C 33 52 PLCC DS87C530-QNL+ -40C to +85C 33 52 PLCC DS87C530-KCL* 0C to +70C 33 52 Windowed CLCC DS87C530-ECL 0C to +70C 33 52 TQFP DS87C530-ECL+ 0C to +70C 33 52 TQFP DS87C530-ENL -40C to +85C 33 52 TQFP DS87C530-ENL+ -40C to +85C 33 52 TQFP
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DETAILED DESCRIPTION The DS87C530/DS83C530 EPROM/ROM microcontrollers with a real-time clock (RTC) are 8051compatible microcontrollers based on the Dallas Semiconductor high-speed core. They use 4 clocks per instruction cycle instead of the 12 used by the standard 8051. They also provide a unique mix of peripherals not widely available on other processors. They include an on-chip RTC and battery backup support for an on-chip 1k x 8 SRAM.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 1. Block Diagram DS87C530/ DS83C530 PIN DESCRIPTION PIN NAME FUNCTION PLCC TQFP 52 45 VCC +5V Processor Power Supply 1, 25 18, 46 GND Processor Digital Circuit Ground 29 22 VCC2 +5V RTC Supply. VCC2 is isolated from VCC to isolate the RTC from digital noise. 26 19 GND2 12 5 RST 23 16 XTAL2 24 17 XTAL1 RTC Circuit Ground Reset Input.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PIN DESCRIPTION (continued) PIN PLCC TQFP 38 31 NAME FUNCTION PSEN Program Store-Enable Output. This active-low signal is a chip enable for optional external ROM memory. PSEN provides an active-low pulse and is driven high when external ROM is not being accessed. Address Latch-Enable Output. This pin latches the external address LSB from the multiplexed address/data bus on Port 0.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PIN DESCRIPTION (continued) PIN NAME FUNCTION 23 P2.0 (AD8) 31 24 P2.1 (AD9) 32 25 P2.2 (AD10) 33 26 P2.3 (AD11) 34 27 P2.4 (AD12) 35 28 P2.5 (AD13) 36 29 P2.6 (AD14) 37 30 P2.7 (AD15) Port 2 (A8–A15), I/O. Port 2 is a bidirectional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pullup holds the port high.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock COMPATIBILITY The DS87C530/DS83C530 are fully static, CMOS 8051-compatible microcontrollers designed for high performance. While remaining familiar to 8051 users, the devices have many new features. In general, software written for existing 8051-based systems works without modification on the DS87C530/DS83C530.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock The relative time of two instructions might be different in the new architecture than it was previously. For example, in the original architecture, the “MOVX A, @DPTR” instruction and the “MOV direct, direct” instruction used two machine cycles or 24 oscillator cycles. Therefore, they required the same amount of time.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 1. Special Function Register Locations * Functions not present in the 80C52 are in bold. REGISTER P0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 1. Special Function Register Locations (continued) * Functions not present in the 80C52 are in bold.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock automatically to occur once per second, once per minute, once per hour, or once per day. Enabling interrupts with no match will generate an interrupt 256 times per second. Software enables the timekeeper oscillator using the RTC enable bit in the RTC Control register (F9h). This starts the clock. It can disable the oscillator to preserve the life of the backup energy-source if unneeded.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock 12.5pF crystal uses more power, giving a shorter battery backed life, but produces a more robust oscillator. Bit 6 in the RTC Trim register (TRIM; 96h) must be programmed to specify the crystal type for the oscillator. When TRIM.6 = 1, the circuit expects a 12.5pF crystal. When TRIM.6 = 0, it expects a 6pF crystal. This bit will be nonvolatile so these choices will remain while the backup source is present.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock space SRAM is read/write accessible and is memory mapped. This on-chip SRAM is reached by the MOVX instruction. It is not used for executable memory. The scratchpad area is 256 bytes of register mapped RAM and is identical to the RAM found on the 80C52. There is no conflict or overlap among the 256 bytes and the 1kB as they use different addressing modes and separate instructions.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock device will immediately jump to external program execution because program code from 4kB to 16kB (1000h–3FFFh) is no longer located on-chip. This could result in code misalignment and execution of an invalid instruction. The recommended method is to modify the ROMSIZE register from a location in memory that will be internal (or external) both before and after the operation.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock The on-chip data area is software selectable using 2 bits in the Power Management Register at location C4h. This selection is dynamically programmable. Thus access to the on-chip area becomes transparent to reach off-chip devices at the same addresses. The control bits are DME1 (PMR.1) and DME0 (PMR.0). They have the following operation: Table 2.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Using a Stretch value between 1 and 7 causes the microcontroller to stretch the read/write strobe and all related timing. Also, setup and hold times are increased by 1 clock when using any Stretch greater than 0. This results in a wider read/write strobe and relaxed interface timing, allowing more time for memory/peripherals to respond. The timing of the variable speed MOVX is in the Electrical Specifications section.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock POWER MANAGEMENT Along with the standard Idle and power-down (Stop) modes of the standard 80C52, the DS87C530/DS83C530 provide a new Power Management Mode. This mode allows the processor to continue functioning, yet to save power compared with full operation. The DS87C530/DS83C530 also feature several enhancements to Stop mode that make it more useful.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock CRYSTAL-LESS PMM A major component of power consumption in PMM is the crystal amplifier circuit. The DS87C530/DS83C530 allow the user to switch CPU operation to an internal ring oscillator and turn off the crystal amplifier. The CPU would then have a clock source of approximately 2MHz to 4MHz, divided by either 4, 64, or 1024. The ring is not accurate, so software cannot perform precision timing.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Switchback To return to a 4-clock rate from PMM, software can simply select the CD1 and CD0 clock control bits to the 4 clocks per cycle state. However, the DS87C530/DS83C530 provide several hardware alternatives for automatic Switchback. If Switchback is enabled, then the device will automatically return to a 4-clock per cycle speed when an interrupt occurs from an enabled, valid external interrupt source.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Crystal/Ring Operation The DS87C530/DS83C530 allow software to choose the clock source as an independent selection from the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under software control. Power-on reset default is the crystal (or external clock) source. The ring may save power depending on the actual crystal speed. To save still more power, software can then disable the crystal amplifier.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 6. PMM Control and Status Bit Summary NAME LOCATION FUNCTION XT/ RG EXIF.3 Control. XT/ RG =1, runs from crystal or external clock; XT/ RG =0, runs from internal ring oscillator. X 0 to 1 only when XTUP = 1 and XTOFF= 0 RGMD EXIF.2 Status. RGMD=1, CPU clock = ring; RGMD = 0, CPU clock = crystal. 0 None CD1, CD0 PMR7, PMR.6 Control. CD1, 0 = 01, 4 clocks; CS1, 0 = 10, PMM1; CD1, 0 = 11, PMM2. 0, 1 SWB PMR.5 Control.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 5.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock IDLE MODE Setting the lsb of the Power Control register (PCON; 87h) invokes the Idle mode. Idle will leave internal clocks, serial ports and timers running. Power consumption drops because the CPU is not active. Since clocks are running, the Idle power consumption is a function of crystal frequency. It should be approximately one-half the operational power at a given frequency. The CPU can exit the Idle state with any interrupt or a reset.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock The ring oscillator runs at approximately 2MHz to 4MHz but will not be a precise value. Do not conduct real-time precision operations (including serial communication) during this ring period. Figure 6 shows how the operation would compare when using the ring, and when starting up normally. The default state is to exit Stop mode without using the ring oscillator. The RGSL ring-select bit at EXIF.1 (EXIF; 91h) controls this function.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PERIPHERAL OVERVIEW The DS87C530/DS83C530 provide several of the most commonly needed peripheral functions in microcomputer-based systems. These new functions include a second serial port, power-fail reset, Powerfail interrupt, and a programmable watchdog timer. These are described below, and more details are available in the High-Speed Microcontroller User’s Guide.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock read the PFI flag at WDCON.4. A PFI condition sets this bit to a 1. The flag is independent of the interrupt enable and software must manually clear it. If the PFI is enabled and the bandgap select bit (BGS) is set, a PFI will bring the device out of Stop mode. WATCHDOG TIMER To prevent software from losing control, the DS87C530/DS83C530 include a programmable watchdog timer.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock There are five control bits in special function registers that affect the Watchdog Timer and two status flags that report to the user. WDIF (WDCON.3) is the interrupt flag that is set at timer termination when there are 512 clocks remaining until the reset flag is set. WTRF (WDCON.2) is the flag that is set when the timer has completely timed out.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock TIMED-ACCESS PROTECTION It is useful to protect certain SFR bits from an accidental write operation. The Timed-Access procedure stops an errant CPU from accidentally changing these bits. It requires that the following instructions precede a write of a protected bit. MOV MOV 0C7h, #0AAh 0C7h, #55h Writing an AAh and then a 55h to the Timed-Access register (location C7h) opens a three-cycle window for write access.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DS87C530 SECURITY OPTIONS The DS87C530 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted form. Lock Bits The security lock consists of 3 lock bits. These bits select a total of 4 levels of security. Higher levels provide increasing security but also limit application flexibility.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 9. EPROM Programming Modes RST PSEN ALE/PROG EA/VPP P2.6 P2.7 P3.3 P3.6 P3.7 Program Code Data H L PL 12.75V L H H H H Verify Code Data H L H H L L L H H Program Encryption Array Address 0-3Fh H L PL 12.75V L H H L H LB1 H L PL 12.75V H H H H H LB2 H L PL 12.75V H H H L L LB3 H L PL 12.75V H L H H L Program Option Register Address FCh H L PL 12.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 7. EPROM Programming Configuration ROM-SPECIFIC FEATURES (DS83C530) The DS83C530 supports a subset of the EPROM features found on the DS87C530. SECURITY OPTIONS Lock Bits The DS83C530 employs a lock that restricts viewing of the ROM contents. When set, the lock will prevent MOVC instructions in external memory from reading program bytes in internal memory. When locked, the EA pin is sampled and latched on reset.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DS83C530 ROM Verification The DS83C530 memory contents can be verified using a standard EPROM programmer. The memory address to be verified is placed on the pins shown in Figure 7, and the programming control pins are set to the levels shown in Table 9. The data at that location is then asserted on port 0. DS83C530 Signature The Signature bytes identify the DS83C530 to EPROM programmers.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………….………-0.3V to (VCC + 0.5V) Voltage Range on VCC Relative to Ground…………………………………………………………………..-0.3V to +6.0V Operating Temperature Range………………………………………………………………………………….0°C to +70°C Storage Temperature Range……………………………………………………………………...-55°C to +125°C (Note 1) Soldering Temperature.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 4.5V to 5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL MIN Input Leakage Port 0, EA, Pins, I/O Mode IL Input Leakage Port 0, Bus Mode RST Pulldown Resistance Note 1: TYP MAX UNITS NOTES -10 +10 A 13 IL -300 +300 A 14 RRST 50 200 k Note 2: Note 3: Storage temperature is defined as the temperature of the device when VCC = 0V and VBAT = 0V.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock AC ELECTRICAL CHARACTERISTICS (Note 1) PARAMETER Oscillator Frequency External Oscillator External Crystal SYMBOL 1/tCLCL 33MHz VARIABLE CLOCK MIN MAX MIN MAX 0 33 0 33 1 33 1 33 UNITS MHz ALE Pulse Width tLHLL 40 1.5tCLCL-5 ns Port 0 Address Valid to ALE Low tAVLL 10 0.5tCLCL-5 ns Address Hold after ALE Low tLLAX1 (Note 2) (Note 2) ns ALE low to Valid Instruction In tLLIV ALE Low to PSEN Low tLLPL 4 0.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock MOVX CHARACTERISTICS USING STRETCH MEMORY CYCLES PARAMETER SYMBOL Data Access ALE Pulse Width tLHLL2 Port 0 Address Valid to ALE Low tAVLL2 Address Hold After ALE Low for MOVX Write tLLAX2 RD Pulse Width tRLRH WR Pulse Width tWLWH RD Low Valid Data In tRLDV Data Hold After Read tRHDX Data Float After Read tRHDZ ALE Low to Valid Data In tLLDV Port 0 Address to Valid Data In tAVDV1 Port 2 Address to Valid Data In tAVDV2
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock MOVX CHARACTERISTICS USING STRETCH MEMORY CYCLES (continued) M2 M1 M0 MOVX CYCLES tMCS 0 0 0 2 machine cycles 0 0 0 1 3 machine cycles (default) 4 tCLCL 0 1 0 4 machine cycles 8 tCLCL 0 1 1 5 machine cycles 12 tCLCL 1 0 0 6 machine cycles 16 tCLCL 1 0 1 7 machine cycles 20 tCLCL 1 1 0 8 machine cycles 24 tCLCL 1 1 1 9 machine cycles 28 tCLCL EXTERNAL CLOCK CHARACTERISTICS PARAMETER SYMBOL MIN T
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock EXPLANATION OF AC SYMBOLS In an effort to remain compatible with the original 8051 family, this device specifies the same parameters as such devices, using the same symbols. For completeness, the following is an explanation of the symbols.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE tVALL2 39 of 45
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DATA MEMORY WRITE CYCLE tAVLL2 DATA MEMORY WRITE WITH STRETCH = 1 40 of 45
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DATA MEMORY WRITE WITH STRETCH = 2 EXTERNAL CLOCK DRIVE 41 of 45
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock SERIAL PORT MODE 0 TIMING 42 of 45
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock POWER-CYCLE TIMING EPROM PROGRAMMING AND VERIFICATION WAVEFORMS 43 of 45
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PACKAGE INFORMATION For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DATA SHEET REVISION SUMMARY REVISION 071107 070505 040104 112299 070798 022097 060895 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) 11) 12) DESCRIPTION Corrected P1.5 pin for TQFP package from 4 to 1 (page 5). Added Pb-free/RoHS-compliant part numbers to Ordering Information table. Deleted the “A” from the IPC/JEDEC J-STD-020 specification in the Absolute Maximum Ratings. Removed “Preliminary” status.