Datasheet

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General Description

The Maxim ICL7116 and ICL7117 are 3½ digit monolithic

analog-to-digital converters. They differ from the Maxim

ICL7106 and ICL7107 in that the ICL7116 and ICL7117

have a Hold pin, which makes it possible to hold or

“freeze” a reading. These integrating ADCs have very

high input impedances and directly drive LCD (ICL7116)

and LED (ICL7117) displays.

Versatility and accuracy are inherent features of these

converters. The dual-slope conversion technique auto-

matically rejects interference signals common in industrial

environments. The true differential input is particularly

useful when making ratiometric measurements (ohms or

bridge transducers). Maxim has added a zero-integrator

phase to the ICL7116 and ICL7117, eliminating overrange

hangover and hysteresis effects. Finally, these devices

offer high accuracy by lowering rollover error to less than

one count and zero reading drift to less than 1µV/ºC.

Applications

These devices can be used in a wide range of digital

panel meter applications. Most applications, however,

involve the measurement and display of analog data:

Features

● Improved 2nd Source!

● Hold Pin Allows Indefinite Display Hold

● Guaranteed First Reading Recovery from Overrange

● On-Board Display Drive Capability—No External

Circuitry Required: LCD (ICL7116), LED (ICL7117)

● High-Impedance CMOS Differential Inputs

● Low Noise (< 15µV

P-P

) Without Hysteresis or

Overrange Hangover

● Clock and Reference On-Chip

● Zero Input Gives Zero Reading

● True Polarity Indication for Precision Null Applications

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/ICL7116-ICL7117.related.

● Pressure

● Voltage

● Resistance

● Temperature

● Conductance

● Current

● Speed

● Material Thickness

ANALOG

INPUT

ICL7116

LCD DISPLAY

REF

CLOSED = HOLD

OPEN = RUN

TO ANALOG

COMMON PIN

[PIN 32]

TOP VIEW

B1 TEST

HOLD

D1 OSC2

OSC3

OSC1

PDIP

E1 C-REF

F1 V+

C+REF

REF HI

D2 COMMON

9 32

C2 ON HI

10 31

B2 ON LO

11 30

A/Z

BUFF

INT

12 29

13 28

AB4

POL

V-

BP/GND

ICL7116

ICL7117

Detailed Circuit Diagram - see Figure 1

Pin Configurations continued at end of data sheet

ICL7116/ICL7117 3½ Digit ADCs with Display Hold

19-0949; Rev 1; 9/13

Typical Operating Circuit

Pin Congurations

EVALUATION KIT AVAILABLE

Summary of content (8 pages)

PAGE 1
EVALUATION KIT AVAILABLE ICL7116/ICL7117 3½ Digit ADCs with Display Hold General Description The Maxim ICL7116 and ICL7117 are 3½ digit monolithic analog-to-digital converters. They differ from the Maxim ICL7106 and ICL7107 in that the ICL7116 and ICL7117 have a Hold pin, which makes it possible to hold or “freeze” a reading. These integrating ADCs have very high input impedances and directly drive LCD (ICL7116) and LED (ICL7117) displays.
PAGE 2
ICL7116/ICL7117 3½ Digit ADCs with Display Hold Absolute Maximum Ratings Supply Voltage ICL7116, V+ to V-...................................................................15V ICL7117, V+ to GND..............................................................+6V ICL7117, V- to GND............................................................... -9V Analog Input Voltage (either input) (Note 1)...................V+ to VReference lnput Voltage (either input)............................V+ to VClock Input ICL7116..
PAGE 3
ICL7116/ICL7117 3½ Digit ADCs with Display Hold Electrical Characteristics (continued) (Note 3) PARAMETER CONDITIONS MIN TYP VIL, Pin 1 (ICL7117 Only) MAX GND +1.5 VIH, Pin 1 (Both) V+ - 1.5 ICL7116 Only (Note 5) Pk-Pk Segment Drive Voltage, Pk-Pk Backplane Drive Voltage V+ to V- = 9V ICL7117 Only (Except Pin 19) Segment Sinking Current V+ = 5.0V Segment Voltage = 3V (Pin 19 Only) V V 4 5 6 4 5 6 5 8.
PAGE 4
ICL7116/ICL7117 3½ Digit ADCs with Display Hold Electrical Characteristics (continued) Specifications below satisfy or exceed all ‘tested’ parameters on adjacent page V+ = 9V, TA = +25ºC, fCLOCK = 48kHz; test circuit = Figure 1 (ICL7116), Figure 2 (ICL7117), unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS Common-Mode Rejection Ratio (Note 4) VCM = ±1V, VIN = 0V Full Scale = 200.00mV 50 µV/V Noise (Pk-Pk Value Not Exceeded 95% of the Time) VIN = 0V Full Scale = 200.
PAGE 5
ICL7116/ICL7117 3½ Digit ADCs with Display Hold Detailed Description input. When the Hold input is connected to V+, however, the display latch pulse is inhibited, and the the display latches are not updated. The Hold input has a 70kΩ pulldown resistor to Test (ICL7116) or Ground (ICL7117) and the Hold input will be pulled low if it is left open. When Hold is low the ICL7116/ICL7117 updates the display at the end of each conversion.
PAGE 6
ICL7116/ICL7117 3½ Digit ADCs with Display Hold 0.1µF Figure 2 34 1MΩ ANALOG INPUT + - 0.01µF C+REF C-REF 31 IN HI 30 IN LO 32 LCD DISPLAY 33 2–19 22–25 POL COMMON BP ICL7117 28 47kΩ 0.47µF 29 0.22µF 29 V+ BUFF SEGMENT DRIVE 20 21 BACKPLANE DRIVE CLOSED = HOLD OPEN = RUN 1 35 +5V 24kΩ A-Z REF HI INT OSC2 OSC3 38 COSC 39 100pF OSC1 40 V- 36 VREF 10kΩ 26 +5V TO ANALOG COMMON PIN [PIN 32] ROSC 100kΩ Figure 2.
PAGE 7
ICL7116/ICL7117 3½ Digit ADCs with Display Hold BUFF INT V- 35 34 A-Z IN LO 37 36 COMMON IN HI 39 38 C+ REF C- REF 41 40 44 43 42 41 40 V+ REF HI 1 TOP VIEW 44 43 42 2 TEST N.C. 3 OSC3 HOLD 4 OSC2 D1 5 OSC1 B1 6 C1 A1 TOP VIEW REF HI Pin Configurations (continued) F1 7 39 V+ N.C. 1 33 N.C. G1 8 38 C+ REF N.C. 2 32 G2 E1 9 37 C- REF TEST 3 31 C3 D2 10 36 COMMON OSC3 4 30 A3 C2 11 35 IN HI N.C. 5 29 G3 34 N.C.
PAGE 8
ICL7116/ICL7117 3½ Digit ADCs with Display Hold Revision History REVISION NUMBER REVISION DATE 0 9/85 Initial release 1 9/13 Added the 44 MQFP package to data sheet DESCRIPTION PAGES CHANGED — 1–8 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product.