Datasheet

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MAX1032/MAX1033

8- and 4-Channel, ±3 x V

REF

Multirange Inputs, Serial 14-Bit ADCs

19-3573; Rev 6; 7/13

For pricing, delivery, and ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.

General Description

The MAX1032/MAX1033 multirange, low-power, 14-bit,

successive-approximation, analog-to-digital converters

(ADCs) operate from a single +5V supply and achieve

throughput rates up to 115ksps. A separate digital sup-

ply allows digital interfacing with 2.7V to 5.25V systems

using the SPI/QSPI™-/MICROWIRE

-compatible serial

interface. Partial power-down mode reduces the supply

current to 1.3mA (typ). Full power-down mode reduces

the power-supply current to 1µA (typ).

The MAX1032 provides eight (single-ended) or four

(true differential) analog input channels. The MAX1033

provides four (single-ended) or two (true differential)

analog input channels. Each analog input channel is

independently software programmable for seven sin-

gle-ended input ranges 0 to (3 x V

REF

)/2, (-3 x V

REF

)/2

to 0, 0 to 3 x V

REF

, -3 x V

REF

to 0, (±3 x V

REF

)/4,

(±3 x V

REF

)/2

±3 x V

REF

and three differential input

ranges (±3 x V

REF

)/2

±3 x V

REF,

±6 x V

REF

An on-chip +4.096V reference offers a small convenient

ADC solution. The MAX1032/MAX1033 also accept an

external reference voltage between 3.800V and 4.136V.

The MAX1032 is available in a 24-pin TSSOP package

and the MAX1033 is available in a 20-pin TSSOP pack-

age. Each device is specified for operation from -40°C

to +85°C.

Applications

Industrial Control Systems

Data-Acquisition Systems

Avionics

Robotics

Features

o Software-Programmable Input Range for Each

Channel

o Single-Ended Input Ranges (V

REF

= 4.096V)

(0 to (3 x V

REF

)/2, (-3 x V

REF

)/2 to 0,

0 to 3 x V

REF

, -3 x V

REF

to 0, (±3 x V

REF

)/4,

(±3 x V

REF

)/2, ±3 x V

REF

)

o Differential Input Ranges

(±3 x V

REF

)/2, ±3 x V

REF

, ±6 x V

REF

o Eight Single-Ended or Four Differential Analog

Inputs (MAX1032)

o Four Single-Ended or Two Differential Analog

Inputs (MAX1033)

o ±16.5V Overvoltage Tolerant Inputs

o Internal or External Reference

o 115ksps Maximum Sample Rate

o Single +5V Power Supply

o 20-/24-Pin TSSOP Package

Pin Configurations

Ordering Information

AGND1

AGND2

AVDD2

AGND3CH2

CH1

CH0

AVDD1

TOP VIEW

REF

REFCAP

DVDD

DVDD0CH6

CH5

CH4

CH3

DGND

DGNDO

DOUT

SCLKSSTRB

DIN

CH7

TSSOP

MAX1032

PART PIN-PACKAGE CHANNELS

MAX1032BEUG+ 24 TSSOP 8

MAX1033BEUP+ 20 TSSOP 4

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corp.

Pin Configurations continued at end of data sheet.

Note: All devices are specified over the -40°C to +85°C oper-

ating temperature range.

Denotes a lead(Pb)-free/RoHS-compliant package.

Summary of content (32 pages)

PAGE 1
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs General Description The MAX1032/MAX1033 multirange, low-power, 14-bit, successive-approximation, analog-to-digital converters (ADCs) operate from a single +5V supply and achieve throughput rates up to 115ksps. A separate digital supply allows digital interfacing with 2.7V to 5.25V systems using the SPI/QSPI™-/MICROWIRE®-compatible serial interface. Partial power-down mode reduces the supply current to 1.3mA (typ).
PAGE 2
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs ABSOLUTE MAXIMUM RATINGS REF, REFCAP to AGND1 ......................-0.3V to (VAVDD1 + 0.3V) Continuous Current (any pin) ...........................................±50mA Continuous Power Dissipation (TA = +70°C) 20-Pin TSSOP (derate 11mW/°C above +70°C) ..........879mW 24-Pin TSSOP (derate 12.2mW/°C above +70°C) .......976mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ...........
PAGE 3
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 6
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 7
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) DIGITAL I/O SUPPLY CURRENT vs.
PAGE 8
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) ANALOG SUPPLY CURRENT vs. CONVERSION RATE 2.38 13.95 13.93 13.
PAGE 9
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) 79 MAX1032/33 toc13 0.06 0.04 ±3 x VREF BIPOLAR RANGE 0.02 0 -0.
PAGE 10
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) SNR, SINAD, ENOB vs. ANALOG INPUT FREQUENCY SNR, SINAD, ENOB vs.
PAGE 11
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDD0 = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±3 x VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) REFERENCE VOLTAGE vs.
PAGE 12
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Pin Description PIN NAME FUNCTION MAX1032 MAX1033 1 2 AVDD1 2 3 CH0 Analog Input Channel 0 3 4 CH1 Analog Input Channel 1 4 5 CH2 Analog Input Channel 2 5 6 CH3 Analog Input Channel 3 6 — CH4 Analog Input Channel 4 7 — CH5 Analog Input Channel 5 8 — CH6 Analog Input Channel 6 9 — CH7 Analog Input Channel 7 10 7 CS Active-Low Chip-Select Input.
PAGE 13
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Pin Description (continued) PIN NAME FUNCTION MAX1032 MAX1033 22 19 AVDD2 Analog Supply Voltage 2. Connect AVDD2 to a 4.75V to 5.25V power-supply voltage. Bypass AVDD2 to AGND2 with a 0.1μF capacitor. 23 20 AGND2 Analog Ground 2. This ground carries approximately five times more current than AGND1. DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together. 24 1 AGND1 Analog Ground 1.
PAGE 14
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Power Supplies Track-and-Hold Circuitry To maintain a low-noise environment, the MAX1032/ MAX1033 provide separate power supplies for each section of circuitry. Table 1 shows the four separate power supplies. Achieve optimal performance using separate AVDD1, AVDD2, DVDD, and DVDDO supplies. Alternatively, connect AVDD1, AVDD2, and DVDD together as close to the device as possible for a convenient power connection.
PAGE 15
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs CS 31 32 30 BYTE 3 29 28 27 26 25 24 23 22 BYTE 2 21 20 19 18 17 16 15 14 BYTE 1 13 12 11 9 10 8 7 6 5 4 3 2 1 SCLK X X BYTE 4 SSTRB DIN S C2 C1 C0 0 0 0 0 ** fSAMPLE ≈ fSCLK / 32 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* DOUT HOLD TRACK HIGH IMPEDANCE HOLD B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 HIGH IMPEDANCE *TRACK AND HOLD TIMING IS CONT
PAGE 16
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs CS SSTRB 31 32 30 BYTE 3 29 28 27 26 25 24 0 23 0 22 BYTE 2 21 0 20 0 19 C0 18 C1 17 C2 16 S 15 DIN 14 BYTE 1 13 12 11 9 10 8 7 6 5 4 3 2 1 SCLK X X BYTE 4 *** HIGH IMPEDANCE DOUT B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 fSAMPLE ≈ fSCLK / 32 + fINTCLK / 17 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* HOLD TRACK HOLD 100ns to 400ns 17 16 15 1
PAGE 17
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs CS SSTRB 24 0 23 0 22 BYTE 2 21 0 20 0 19 C0 18 C1 16 C2 17 S 15 DIN 14 BYTE 1 13 12 11 10 9 8 7 6 5 4 3 2 1 SCLK X X BYTE 3 *** HIGH IMPEDANCE DOUT B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 fSAMPLE ≈ fSCLK / 24 + fINTCLK / 28 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* TRACK HOLD HOLD 100ns to 400ns 28 27 26 25 14 13 12 11 10 3 2 1 INTCLK**
PAGE 18
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Table 3. Input Data Word Formats DATA BIT OPERATION D7 (START) D6 D5 D4 D3 D2 D1 D0 Conversion-Start Byte (Tables 4 and 5) 1 C2 C1 C0 0 0 0 0 Analog-Input Configuration Byte (Table 2) 1 C2 C1 C0 DIF/SGL R2 R1 R0 Mode-Control Byte (Table 7) 1 M2 M1 M0 1 0 0 0 CH7 AGND1 Table 4.
PAGE 19
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs +3 x VREF 3 x VREF +6 x VREF 3 x VREF 12 x VREF 6 x VREF 0 3 x VREF +3 x VREF 2 -3 x VREF 2 INPUT RANGE SELECTION BITS, R[2:0] EACH INPUT IS FAULT TOLERANT TO ±16.5V. VREF = 4.096V. Figure 7. Single-Ended Input Voltage Ranges Digital Interface The MAX1032/MAX1033 feature a serial interface that is compatible with SPI/QSPI and MICROWIRE devices.
PAGE 20
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Table 6.
PAGE 21
12 12 8 8 COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs 4 0 -4 -8 4 0 -4 -8 -12 -12 -16 -16 -18 -12 -6 0 6 12 18 -18 -12 Figure 9. Common-Mode Voltage vs. Input Voltage (FSR = 3 x VREF) 6 12 18 Output Data Format Output data is clocked out of DOUT in offset binary format on the falling edge of SCLK, MSB first (B13). For output binary codes, see the Transfer Function section and Figures 12, 13, and 14.
PAGE 22
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs FSR FSR 3FFF 3FFE 3FFD 2001 2000 1FFF 2001 FSR BINARY OUTPUT CODE (LSB [hex]) 3FFE 3FFD FSR BINARY OUTPUT CODE (LSB [hex]) 3FFF 2000 1FFF 0003 0003 0002 1 LSB = 0001 0002 FSR x VREF 16,384 x 4.096V 1 LSB = 0001 FSR x VREF 16,384 x 4.096V 0000 0000 -8,192 -8,190 -1 0 +1 0 +8,189 +8,191 1 2 3 8,192 16,381 16,383 INPUT VOLTAGE (LSB [DECIMAL]) (AGND1) AGND1 (DIF/SGL = 0) CH_- (DIF/SGL = 1) Figure 13.
PAGE 23
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs tCSPW tCSS CS tCL SCLK tCH tCSH 1 8 tCP tDS DIN START SEL2 SEL1 SEL0 1 8 tDH DIF/SGL R2 R1 R0 START M2 ANALOG INPUT CONFIGURATION BYTE tDV DOUT M1 M0 1 0 0 0 MODE CONTROL BYTE tTR HIGH IMPEDANCE HIGH IMPEDANCE HIGH IMPEDANCE Figure 15.
PAGE 24
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Table 8. Mode-Control Bits M[2:0] M2 M1 M0 0 0 0 External Clock (DEFAULT) MODE 0 0 1 External Acquisition 0 1 0 Internal Clock 0 1 1 Reserved 1 0 0 Reset 1 0 1 Reserved 1 1 0 Partial Power-Down 1 1 1 Full Power-Down External Acquisition Mode (Mode 1) The slowest maximum throughput rate is achieved with the external acquisition method.
PAGE 25
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs This prevents the MAX1032/MAX1033 from inadvertently exiting full power-down mode because of a CS glitch in a noisy digital environment. Power-On Reset The MAX1032/MAX1033 power up in normal operation configured for external clock mode with all circuitry active (Tables 7 and 8). Each analog input channel (CH0–CH7) is set for single-ended conversions with a ±3 x VREF bipolar input range (Table 6).
PAGE 26
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs V+ 1.0μF IN 4.096V SAR ADC REF REF OUT 1.0μF MAX6341 AVDD1 1x REFCAP MAX1032 MAX1033 GND 5kΩ VRCTH 4.096V BANDGAP REFERENCE AGND1 Figure 18. External Reference Operation Bridge Application Layout, Grounding, and Bypassing The MAX1032/MAX1033 convert 1kHz signals more accurately than a similar sigma-delta converter that might be considered in bridge applications.
PAGE 27
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs 4–20mA INPUT CH0 μC 250Ω MAX1032 4–20mA INPUT CH8 250Ω Figure 19. 4–20mA Application LOW-OFFSET DIFFERENTIAL AMPLIFIER CH0 μP CH1 MAX1032 MAX1033 REF BRIDGE Figure 20. Bridge Application Differential Nonlinearity (DNL) Channel-to-Channel Isolation DNL is the difference between an actual step width and the ideal value of 1 LSB.
PAGE 28
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Unipolar Offset Error -FSR to 0V When a zero-scale analog input voltage is applied to the converter inputs, the digital output is all ones (0x3FFF). Ideally, the transition from 0x3FFF to 0x3FFE occurs at AGND1 - 0.5 LSB. Unipolar offset error is the amount of deviation between the measured zero-scale transition point and the ideal zero-scale transition point, with all untested channels grounded.
PAGE 29
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Effective Number of Bits (ENOB) ENOB indicates the global accuracy of an ADC at a specific input frequency and sampling rate. With an input range equal to the ADC’s full-scale range, calculate the ENOB as follows: ⎛ SINAD − 1.76 ⎞ ENOB = ⎜ ⎟ ⎝ ⎠ 6.
PAGE 30
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Block Diagram CONTROL LOGIC AND REGISTERS CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 AGND1 SERIAL I/O DVDDO CS DIN SSTRB DOUT SCLK DGNDO AVDC2 CLOCK ANALOG INPUT MUX AND MULTIRANGE CIRCUITRY PGA IN SAR ADC DVDD FIFO OUT DGND AVDD1 AGND3 REF AGND2 4.
PAGE 31
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
PAGE 32
MAX1032/MAX1033 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs Revision History REVISION NUMBER REVISION DATE 0 2/05 Initial release 2 12/06 Updated the Electrical Characteristics and Package Information. Added Revision History. 1, 3–6, 30, 31 3 7/07 Updated Ordering Information, Electrical Characteristics, and Differential Common-Mode Range section.