Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TSSOP 24

General Description

The MAX1034/MAX1035 multirange, low-power, 14-bit,

successive-approximation, analog-to-digital converters

(ADCs) operate from a single +5V supply and achieve

throughput rates up to 115ksps. A separate digital sup-

ply allows digital interfacing with 2.7V to 5.25V systems

using the SPI-/QSPI™-/MICROWIRE

-compatible serial

interface. Partial power-down mode reduces the supply

current to 1.3mA (typ). Full power-down mode reduces

the power-supply current to 1µA (typ).

The MAX1034 provides eight (single-ended) or four (true

differential) analog input channels. The MAX1035 pro-

vides four (single-ended) or two (true differential) analog

input channels. Each analog input channel is indepen-

dently software programmable for seven single-ended

input ranges (0V to +V

REF

/2, -V

REF

/2 to 0V, 0V to +V

REF

-V

REF

to 0V, ±V

REF

/4, ±V

REF

/2, and ±V

REF

), and three

differential input ranges (±V

REF

/2, ±V

REF

, ±2 x V

REF

An on-chip +4.096V reference offers a small convenient

ADC solution. The MAX1034/MAX1035 also accept an

external reference voltage between 3.800V and 4.136V.

The MAX1034 is available in a 24-pin TSSOP package

and the MAX1035 is available in a 20-pin TSSOP pack-

age. Each device is specified for operation from -40°C

to +85°C.

Applications

Industrial Control Systems

Data-Acquisition Systems

Avionics

Robotics

Features

o Software-Programmable Input Range for Each

Channel

o Single-Ended Input Ranges

0V to +V

REF

/2, -V

REF

/2 to 0V, 0V to +V

REF

-V

REF

to 0V, ±V

REF

/4, ±V

REF

/2, and ±V

REF

o Differential Input Ranges

±V

REF

/2, ±V

REF

, and ±2 x V

REF

o Eight Single-Ended or Four Differential Analog

Inputs (MAX1034)

o Four Single-Ended or Two Differential Analog

Inputs (MAX1035)

o ±6V Overvoltage Tolerant Inputs

o Internal or External Reference

o 115ksps Maximum Sample Rate

o Single +5V Power Supply

o 20-/24-Pin TSSOP Package

MAX1034/MAX1035

8-/4-Channel, ±V

REF

Multirange Inputs,

Serial 14-Bit ADCs

________________________________________________________________

Maxim Integrated Products

Pin Configurations

Ordering Information

AGND1

AGND2

AVDD2

AGND3CH2

CH1

CH0

AVDD1

TOP VIEW

REF

REFCAP

DVDD

DVDDOCH6

CH5

CH4

CH3

DGND

DGNDO

DOUT

SCLKSSTRB

DIN

CH7

TSSOP

MAX1034

19-3574; Rev 2; 3/12

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

PART PIN-PACKAGE CHANNELS

MAX1034EUG+ 24 TSSOP 8

MAX1035EUP+ 20 TSSOP 4

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corp.

Pin Configurations continued at end of data sheet.

Note: All devices are specified over the -40°C to +85°C opera-

ting temperature range.

Denotes a lead(Pb)-free/RoHS-compliant package.

Summary of content (31 pages)

PAGE 1
9-3574; Rev 2; 3/12 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs The MAX1034/MAX1035 multirange, low-power, 14-bit, successive-approximation, analog-to-digital converters (ADCs) operate from a single +5V supply and achieve throughput rates up to 115ksps. A separate digital supply allows digital interfacing with 2.7V to 5.25V systems using the SPI-/QSPI™-/MICROWIRE®-compatible serial interface. Partial power-down mode reduces the supply current to 1.3mA (typ).
PAGE 2
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs ABSOLUTE MAXIMUM RATINGS AVDD1 to AGND1 ....................................................-0.3V to +6V AVDD2 to AGND2 ....................................................-0.3V to +6V DVDD to DGND ........................................................-0.3V to +6V DVDDO to DGNDO ..................................................-0.3V to +6V DVDD to DVDDO......................................................-0.
PAGE 3
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Preamplifier Supply Voltage VAVDD2 4.
PAGE 6
ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) Parameter tested at VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V.
PAGE 7
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs ANALOG SUPPLY CURRENT vs. ANALOG SUPPLY VOLTAGE DIGITAL I/O SUPPLY CURRENT vs. DIGITAL I/O SUPPLY VOLTAGE PARTIAL POWER-DOWN MODE 0.53 TA = +85°C TA = +85°C 0.20 IAVDD1 (mA) IDVDDO (mA) 0.24 MAX1034/35 toc05 EXTERNAL CLOCK MODE 0.26 0.22 0.55 MAX1034/35 toc04 0.28 TA = +25°C 0.18 0.51 TA = +25°C 0.49 TA = -40°C 0.16 TA = -40°C 0.14 0.47 0.12 0.45 0.10 4.75 4.85 4.95 5.05 5.15 4.85 4.95 5.05 5.
PAGE 8
Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, unless otherwise noted.) PREAMPLIFIER SUPPLY CURRENT vs. CONVERSION RATE ANALOG SUPPLY CURRENT vs. CONVERSION RATE PARTIAL POWER-DOWN MODE 1.5 1.0 fCLK = 7.
PAGE 9
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs 0.8 0.6 +VREF/2 BIPOLAR 0.02 0 -0.02 -0.04 0.13 0.12 ±VREF/4 BIPOLAR 3.85 3.90 3.95 4.00 4.05 4.10 0 -0.2 -0.4 -0.08 -0.8 ±VREF BIPOLAR -1.0 -40 -15 10 35 60 -40 85 -15 10 35 60 EXTERNAL REFERENCE VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) CHANNEL-TO-CHANNEL ISOLATION vs. INPUT FREQUENCY COMMON-MODE REJECTION RATIO vs. FREQUENCY INTEGRAL NONLINEARITY vs.
PAGE 10
Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, unless otherwise noted.) SNR, SINAD, ENOB vs. SAMPLE RATE SNR, SINAD, ENOB vs.
PAGE 11
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs ATTENUATION (dB) -10 -10 -15 -20 MAX1034/35 toc27 MAX1034/35 toc26 0 MAX1034/35 toc25 -5 -20 1V/div -30 -40 0V -50 -25 -60 -30 100 1 10,000 1000 10 100 1000 10,000 4ms/div FREQUENCY (kHz) FREQUENCY (kHz) NOISE HISTOGRAM (CODE EDGE) NOISE HISTOGRAM (CODE CENTER) 40,000 65,534 SAMPLES 70,000 35,000 25,000 20,000 15,000 65,534 SAMPLES 60,000 NUMBER OF HITS 30,000 MAX1034/35 toc29 10 MAX1034/35 toc28 1 NUMBER OF HITS
PAGE 12
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs Pin Description PIN NAME FUNCTION MAX1034 MAX1035 1 2 AVDD1 2 3 CH0 Analog Input Channel 0 3 4 CH1 Analog Input Channel 1 4 5 CH2 Analog Input Channel 2 5 6 CH3 Analog Input Channel 3 6 — CH4 Analog Input Channel 4 7 — CH5 Analog Input Channel 5 8 — CH6 Analog Input Channel 6 9 — CH7 Analog Input Channel 7 10 7 CS Active-Low Chip-Select Input.
PAGE 13
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs PIN NAME FUNCTION 18 AGND3 Analog Signal Ground 3. AGND3 is the ADC negative reference potential. Connect AGND3 to AGND1. DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together. 22 19 AVDD2 Analog Supply Voltage 2. Connect AVDD2 to a +4.75V to +5.25V power-supply voltage. Bypass AVDD2 to AGND2 with a 0.1µF capacitor. 23 20 AGND2 Analog Ground 2. This ground carries approximately five times more current than AGND1.
PAGE 14
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs AGND3, DGND, and DGNDO together as close to the device as possible. Bypass each supply to the corresponding ground using a 0.1µF capacitor (Table 1). If significant low-frequency noise is present, add a 10µF capacitor in parallel with the 0.1µF bypass capacitor. The MAX1034 has eight single-ended analog input channels or four differential channels (see the Block Diagram at the end of the data sheet).
PAGE 15
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs MAX1034/MAX1035 CS 31 32 30 BYTE 3 29 28 27 26 25 24 23 22 BYTE 2 21 20 19 18 17 16 15 14 13 BYTE 1 12 11 9 10 8 7 6 5 4 3 2 1 SCLK X X BYTE 4 SSTRB DIN S C2 C1 C0 0 0 0 0 fSAMPLE ≈ fSCLK / 32 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* DOUT HOLD TRACK HIGH IMPEDANCE HOLD B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 HIGH IMPEDANCE *TRACK AND HOLD TIMING IS CONTROLLED BY S
PAGE 16
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs CS SSTRB 31 32 30 BYTE 3 29 28 27 26 25 24 23 0 22 BYTE 2 21 20 19 0 18 0 17 C0 16 C1 15 C2 14 S 13 DIN 12 BYTE 1 11 9 10 8 7 6 5 4 3 2 1 SCLK X X BYTE 4 0 HIGH IMPEDANCE DOUT B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 fSAMPLE ≈ fSCLK / 32 + fINTCLK / 17 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* HOLD TRACK HOLD 100ns to 400ns 17 16 15 14 3 2 1
PAGE 17
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs MAX1034/MAX1035 CS SSTRB 23 24 0 22 BYTE 2 21 0 20 0 19 C0 18 C1 17 C2 16 S 15 DIN 14 BYTE 1 13 12 11 9 10 8 7 6 5 4 3 2 1 SCLK X X BYTE 3 0 HIGH IMPEDANCE DOUT B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 fSAMPLE ≈ fSCLK / 24 + fINTCLK / 28 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* TRACK HOLD HOLD 100ns to 400ns 28 27 26 25 14 13 12 11 10 3 2 1 INTCLK** fINTCLK ≈ 4
PAGE 18
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs Table 3. Input Data Word Formats DATA BIT OPERATION D7 (START) D6 D5 D4 D3 D2 D1 D0 Conversion-Start Byte (Tables 4 and 5) 1 C2 C1 C0 0 0 0 0 Analog-Input Configuration Byte (Table 2) 1 C2 C1 C0 DIF/SGL R2 R1 R0 Mode-Control Byte (Table 7) 1 M2 M1 M0 1 0 0 0 CH6 CH7 Table 4.
PAGE 19
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs +3/4 VREF +3/2 VREF FSR = VREF +VREF INPUT RANGE SELECTION BITS, R[2:0] EACH INPUT IS FAULT TOLERANT TO ±6V.
PAGE 20
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs Table 6.
PAGE 21
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs 6 6 4 4 COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) INPUT COMMON-MODE VOLTAGE RANGE vs. OUTPUT VOLTAGE (FSR = 2 x VREF) 2 0 -2 -4 2 0 -2 -4 VREF = 4.096V VREF = 4.096V -6 -6 -8 -6 -4 -2 0 2 4 6 8 INPUT VOLTAGE (V) -6 -4 -2 0 2 4 6 8 INPUT VOLTAGE (V) Figure 9. Common-Mode Voltage vs. Input Voltage (FSR = VREF) INPUT COMMON-MODE VOLTAGE RANGE vs.
PAGE 22
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs FSR FSR 3FFF 3FFE 3FFD 2001 2000 1FFF 2001 FSR BINARY OUTPUT CODE (LSB [hex]) 3FFE 3FFD FSR BINARY OUTPUT CODE (LSB [hex]) 3FFF 2000 1FFF 0003 0003 0002 1 LSB = 0001 0002 FSR x VREF 16,384 x 4.096V 1 LSB = 0001 FSR x VREF 16,384 x 4.096V 0000 0000 -8,192 -8,190 -1 0 +1 0 +8,189 +8,191 1 2 3 8,192 16,381 16,383 INPUT VOLTAGE (LSB [DECIMAL]) (AGND1) AGND1 (DIF/SGL = 0) 0V (DIF/SGL = 1) Figure 13.
PAGE 23
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs tCL SCLK tCH tCSH 1 8 tCP tDS DIN START SEL2 SEL1 SEL0 1 8 tDH DIF/SGL R2 R1 R0 START M2 M1 ANALOG INPUT CONFIGURATION BYTE tDV DOUT M0 1 0 0 0 MODE CONTROL BYTE tTR HIGH IMPEDANCE HIGH IMPEDANCE HIGH IMPEDANCE Figure 15.
PAGE 24
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs Table 8. Mode-Control Bits M[2:0] M2 M1 M0 0 0 0 External Clock (DEFAULT) MODE 0 0 1 External Acquisition 0 1 0 Internal Clock 0 1 1 Reserved 1 0 0 Reset 1 0 1 Reserved 1 1 0 Partial Power-Down 1 1 1 Full Power-Down For the external acquisition mode, CS must remain low for the first 15 clock cycles and then rise on or after the falling edge of the 16th clock cycle as shown in Figure 3.
PAGE 25
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs This prevents the MAX1034/MAX1035 from inadvertently exiting full power-down mode because of a CS glitch in a noisy digital environment. Power-On Reset Internal Reference The MAX1034/MAX1035 contain an internal 4.096V bandgap reference. This bandgap reference is connected to REFCAP through a nominal 5kΩ resistor (Figure 17). The voltage at REFCAP is buffered creating 4.096V at REF. When using the internal reference, bypass REFCAP with a 0.
PAGE 26
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs V+ 1.0µF IN 4.096V SAR ADC REF REF OUT 1.0µF MAX6341 AVDD1 1x REFCAP MAX1034 MAX1035 GND 5kΩ VRCTH 4.096V BANDGAP REFERENCE AGND1 Figure 18. External Reference Operation Bridge Application Layout, Grounding, and Bypassing The MAX1034/MAX1035 convert 1kHz signals more accurately than a similar sigma-delta converter that might be considered in bridge applications.
PAGE 27
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs MAX1034/MAX1035 4–20mA INPUT CH0 µC 200Ω MAX1034 4–20mA INPUT CH8 200Ω Figure 19. 4–20mA Application LOW-OFFSET DIFFERENTIAL AMPLIFIER CH0 µP CH1 MAX1034 MAX1035 REF BRIDGE Figure 20. Bridge Application Differential Nonlinearity (DNL) Channel-to-Channel Isolation DNL is the difference between an actual step width and the ideal value of 1 LSB.
PAGE 28
MAX1034/MAX1035 8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs Unipolar Offset Error -FSR to 0V When a zero-scale analog input voltage is applied to the converter inputs, the digital output is all ones (0x3FFF). Ideally, the transition from 0x3FFF to 0x3FFE occurs at AGND1 - 0.5 LSB. Unipolar offset error is the amount of deviation between the measured zero-scale transition point and the ideal zero-scale transition point, with all untested channels grounded.
PAGE 29
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs ⎛ SINAD − 1.76 ⎞ ENOB = ⎜ ⎟ ⎝ ⎠ 6.02 SCLK (MODE 0) 13 14 SCLK (MODE 1) 15 16 INTCLK (MODE 2) 10 11 MAX1034/MAX1035 Effective Number of Bits (ENOB) ENOB indicates the global accuracy of an ADC at a specific input frequency and sampling rate.
PAGE 30
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs MAX1034/MAX1035 Block Diagram SERIAL I/O CONTROL LOGIC AND REGISTERS CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 AGND1 DVDDO CS DIN SSTRB DOUT SCLK DGNDO AVDD2 CLOCK ANALOG INPUT MUX AND MULTIRANGE CIRCUITRY PGA IN SAR ADC DVDD OUT FIFO DGND AVDD1 AGND3 REF AGND2 4.
PAGE 31
8-/4-Channel, ±VREF Multirange Inputs, Serial 14-Bit ADCs REVISION NUMBER REVISION DATE DESCRIPTION 0 5/05 Initial release 1 12/06 Revised Electrical Characteristics and added note. 2 3/12 Released the MAX1034 and revised the Electrical Characteristics and the Typical Operating Characteristics. PAGES CHANGED — 1, 3–6, 30, 31 1–4, 10 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.