Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External uMAX 10

General Description

The MAX1062 low-power, 14-bit analog-to-digital con-

verter (ADC) features a successive approximation ADC,

automatic power-down, fast 1.1µs wake-up, and a high-

speed SPI™/QSPI™/MICROWIRE™-compatible inter-

face. The MAX1062 operates with a single +5V analog

supply and features a separate digital supply, allowing

direct interfacing with 2.7V to 5.25V digital logic.

At the maximum sampling rate of 200ksps, the

MAX1062 consumes typically 2.75mA. Power con-

sumption is typically 13.75mW (AV

= DV

= 5V) at

a 200ksps (max) sampling rate. AutoShutdown™

reduces supply current to 140µA at 10ksps and to less

than 10µA at reduced sampling rates.

Excellent dynamic performance and low power, com-

bined with ease of use and small package size (10-pin

µMAX

) make the MAX1062 ideal for battery-powered

and data-acquisition applications or for other circuits

with demanding power consumption and space

requirements.

Applications

Motor Control

Industrial Process Control

Industrial I/O Modules

Data-Acquisition Systems

Thermocouple Measurements

Accelerometer Measurements

Portable- and Battery-Powered Equipment

Features

♦ 14-Bit Resolution, 1LSB DNL

♦ +5V Single-Supply Operation

♦ Adjustable Logic Level (2.7V to 5.25V)

♦ Input Voltage Range: 0 to V

REF

♦ Internal Track/Hold, 4MHz Input Bandwidth

♦ SPI/QSPI/MICROWIRE-Compatible Serial Interface

♦ Small 10-Pin µMAX Package

♦ Low Power

2.75mA at 200ksps

140µA at 10ksps

0.1µA in Power-Down Mode

MAX1062

14-Bit, +5V, 200ksps ADC with 10µA Shutdown

________________________________________________________________

Maxim Integrated Products

AIN

AGND

DGNDCS

AGND

REF

MAX1062

µMAX

TOP VIEW

DOUTSCLK

Pin Configuration

Ordering Information

19-2203; Rev 1; 5/09

Functional Diagram appears at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com

PART

TEMP.

RANGE

PIN-

PACKAGE

INL

(LSB)

MAX1062ACUB 0°C to 70°C 10 µMAX ±1

MAX1062BCUB 0°C to 70°C 10 µMAX ±2

MAX1062CCUB 0°C to 70°C 10 µMAX ±3

MAX1062AEUB -40°C to 85°C 10 µMAX ±1

MAX1062BEUB -40°C to 85°C 10 µMAX ±2

MAX1062CEUB -40°C to 85°C 10 µMAX ±3

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

AutoShutdown is a trademark of Maxim Integrated Products, Inc.

µMAX is a registered trademark of Maxim Integrated Products, Inc.

Summary of content (18 pages)

PAGE 1
9-2203; Rev 1; 5/09 14-Bit, +5V, 200ksps ADC with 10µA Shutdown Features The MAX1062 low-power, 14-bit analog-to-digital converter (ADC) features a successive approximation ADC, automatic power-down, fast 1.1µs wake-up, and a highspeed SPI™/QSPI™/MICROWIRE™-compatible interface. The MAX1062 operates with a single +5V analog supply and features a separate digital supply, allowing direct interfacing with 2.7V to 5.25V digital logic.
PAGE 2
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown ABSOLUTE MAXIMUM RATINGS AVDD to AGND ........................................................-0.3V to +6V DVDD to DGND........................................................-0.3V to +6V DGND to AGND....................................................-0.3V to +0.3V AIN, REF to AGND ...................................-0.3V to (AVDD + 0.3V) SCLK, CS to DGND ..................................................-0.3V to +6V DOUT to DGND ........................
PAGE 3
14-Bit, +5V, 200ksps ADC with 10µA Shutdown (AVDD = DVDD = +4.75V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF = +4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG INPUT (AIN) Input Range VAIN Input Capacitance CAIN 0 VREF 40 V pF EXTERNAL REFERENCE Input Voltage Range Input Current VREF IREF 3.8 AVDD VREF = 4.096V, fSCLK = 4.8MHz 100 VREF = 4.096V, SCLK idle 0.
PAGE 4
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +4.75V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF = +4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Shutdown Supply Current Power-Supply Rejection Ratio (Note 5) SYMBOL IAVDD + IDVDD PSRR CONDITIONS MIN TYP MAX UNITS CS = DVDD, SCLK = idle 0.1 10 µA AVDD = DVDD = +4.75V to +5.
PAGE 5
14-Bit, +5V, 200ksps ADC with 10µA Shutdown INL vs. OUTPUT CODE DNL vs. OUTPUT CODE 0.6 0.4 0.2 0.2 DNL (LSB) 0.4 0 -0.2 0 -0.2 -0.4 -0.4 -0.6 -0.6 -0.8 -0.8 -1.0 -1.0 0 3276 6553 9830 13107 MAX1062 toc03 0.8 -20 -40 MAGNITUDE (dB) 0.6 MAX1062 FFT 0 MAX1062 toc02 0.8 INL (LSB) 1.0 MAX1062 toc01 1.0 -60 -80 -100 -120 16384 0 3276 6553 OUTPUT CODE 9830 13107 -140 16384 0 OUTPUT CODE 10 20 30 40 50 60 70 80 90 100 FREQUENCY (kHz) SFDR VS.
PAGE 6
Typical Operating Characteristics (continued) (AVDD = DVDD = +5V, fSCLK = 4.8MHz, CLOAD = 50pF, VREF = +4.096V, TA = 25°C, unless otherwise noted.) SHUTDOWN SUPPLY CURRENT VS. SUPPLY VOLTAGE SHUTDOWN SUPPLY CURRENT VS. TEMPERATURE 18 16 AVDD = DVDD = +5V 400 350 14 300 12 ISHDN (nA) ISHDN (nA) MAX1062 toc11 450 MAX1062 toc10 20 10 8 250 200 6 150 4 100 2 50 0 4.75 4.85 4.95 5.05 5.15 0 5.25 -40 -15 SUPPLY VOLTAGE (V) 10 35 60 85 TEMPERATURE (°C) OFFSET ERROR VS.
PAGE 7
14-Bit, +5V, 200ksps ADC with 10µA Shutdown PIN NAME FUNCTION 1 REF 2 AVDD Analog +5V Supply Voltage. Bypass to AGND (pin 3) with a 0.1µF capacitor. 3, 9 AGND Analog Ground. Connect pins 3 and 9 together. Place star ground at pin 3. 4 CS Active Low Chip Select Input. Forcing CS high places the MAX1062 in shutdown with a typical current of 0.1µA. A high-to-low transition on CS activates normal operating mode and initiates a conversion. 5 SCLK Serial Clock Input.
PAGE 8
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown VDD VDD 1mA DOUT 1mA DOUT 1mA DOUT CLOAD = 50pF CLOAD = 50pF DGND 1mA DGND a) VOL TO VOH DOUT CLOAD = 50pF CLOAD = 50pF DGND b) HIGH-Z TO VOL AND VOH TO VOL Figure 1. Load Circuits for DOUT Enable Time and SCLK to DOUT Delay Time DGND a) VOH TO HIGH-Z b) VOL TO HIGH-Z Figure 2. Load Circuits for DOUT Disable Time CS tCSW tCSS tCL tCH tCSH SCLK tCP tDV tDO tTR DOUT Figure 3.
PAGE 9
14-Bit, +5V, 200ksps ADC with 10µA Shutdown Initialization after Power-Up and Starting a Conversion MAX1062 Digital Interface REF The digital interface consists of two inputs, SCLK and CS, and one output, DOUT. A logic high on CS places the MAX1062 in shutdown (autoshutdown) and places DOUT in a high-impedance state. A logic low on CS places the MAX1062 in the fully powered mode. To start a conversion, pull CS low. A falling edge on CS initiates an acquisition.
PAGE 10
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown COMPLETE CONVERSION SEQUENCE CS DOUT CONVERSION 0 POWERED UP CONVERSION 1 POWERED DOWN POWERED UP Figure 7. Shutdown Sequence Output Coding and Transfer Function The data output from the MAX1062 is binary and Figure 8 depicts the nominal transfer function. Code transitions occur halfway between successive-integer LSB values (VREF = 4.096V and 1LSB = 250µV or 4.096V/16384). OUTPUT CODE FULL-SCALE TRANSITION 11 . . . 111 11 . . . 110 11 . . .
PAGE 11
14-Bit, +5V, 200ksps ADC with 10µA Shutdown IN2 A0 MAX1062 IN1 A1 4-TO-1 MUX MAX1062 IN3 AIN OUT IN4 CS CLK ACQUISITION CONVERSION CS A0 A1 CHANGE MUX INPUT HERE Figure 9. Change Multiplexer Input Near Beginning of Conversion to Allow Time for Slewing and Settling high-frequency components may be aliased into the frequency band of interest. Minimize noise by presenting a low impedance (at the frequencies contained in the noise signal) at the inputs.
PAGE 12
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown SPI and MICROWIRE Interfaces format. Observe the SCLK to DOUT valid timing characteristic. Clock data into the µP on SCLK’s rising edge. 3) Pull CS high at or after the 24th falling clock edge. If CS remains low, trailing zeros are clocked out after the 2 sub-bits, S1 and S0. 4) With CS high, wait at least 50ns (tCSW) before starting a new conversion by pulling CS low. A conversion can be aborted by pulling CS high before the conversion ends.
PAGE 13
14-Bit, +5V, 200ksps ADC with 10µA Shutdown QSPI MAX1062 CS CS SCK SCLK MISO DOUT VDD MAX1062 SS Figure 11a. QSPI Connections 1 SCLK CS 4 6 8 END OF ACQUISITION DOUT* 12 D13 D12 D11 D10 16 D9 D8 D7 D6 D5 D4 D3 D2 MSB *WHEN CS IS HIGH, DOUT = HIGH-Z 24 20 D1 D0 S1 S0 HIGH-Z LSB Figure 11b. QSPI Interface Timing Sequence (CPOL = CPHA = 0) PIC16 with SSP Module and PIC17 Interface VDD VDD SCLK SCK DOUT SDI CS I/O PIC16/17 MAX1062 GND Figure 12a.
PAGE 14
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown Table 2. Detailed SSPSTAT Register Contents CONTROL BIT MAX1062 SETTINGS SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPSTAT) SMP BIT7 0 SPI Data Input Sample Phase. Input data is sampled at the middle of the data output time. CKE BIT6 1 SPI Clock Edge Select Bit. Data will be transmitted on the rising edge of the serial clock.
PAGE 15
14-Bit, +5V, 200ksps ADC with 10µA Shutdown MAX1062 Fig13 12 EFFECTIVE BITS 10 scale range of the ADC, calculate the effective number of bits as follows: ENOB = (SINAD – 1.76) / 6.02 Figure 13 shows the effective number of bits as a function of the MAX1062’s input frequency. Total Harmonic Distortion 8 Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself.
PAGE 16
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown Functional Diagram Constraints on sequencing the power supplies and inputs are as follows: • Apply AGND before DGND. • Apply AIN and REF after AVDD and AGND are present. • DVDD is independent of the supply sequencing. Ensure that digital return currents do not pass through the analog ground and that return-current paths are low impedance. A 5mA current flowing through a PC board ground trace impedance of only 0.
PAGE 17
14-Bit, +5V, 200ksps ADC with 10µA Shutdown TRANSISTOR COUNT: 12,100 PROCESS: BiCMOS For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
PAGE 18
MAX1062 14-Bit, +5V, 200ksps ADC with 10µA Shutdown Revision History REVISION NUMBER REVISION DATE 0 10/01 Initial release 1 5/09 Updated some specifications DESCRIPTION PAGES CHANGED — 1, 3 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.