Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TSSOP 28

General Description

The MAX1065/MAX1066 14-bit, low-power successive

approximation analog-to-digital converters (ADCs) fea-

ture automatic power-down, a factory-trimmed internal

clock, and a high-speed, 14-bit-wide (MAX1065) or

byte-wide (MAX1066) parallel interface. The devices

operate from a single 4.75V to 5.25V analog supply and

a 2.7V to 5.25V digital supply.

The MAX1065/MAX1066 use an internal 4.096V refer-

ence or an external reference. The MAX1065/MAX1066

consume only 1.8mA at a sampling rate of 165ksps with

external reference and 2.7mA with internal reference.

AutoShutdown™ reduces supply current to 0.1mA at

10ksps.

The MAX1065/MAX1066 are ideal for high-performance,

battery-powered, data-acquisition applications.

Excellent dynamic performance and low-power con-

sumption in a small package make the MAX1065/

MAX1066 the best choice for circuits with demanding

power consumption and space requirements.

The 14-bit-wide MAX1065 is available in a 28-pin TSSOP

package, and the byte-wide MAX1066 is available in a

20-pin TSSOP package. Both devices are available in

either the 0°C to +70°C commercial, or the -40°C to

+85°C extended temperature range.

Applications

Features

o 14-Bit-Wide (MAX1065) and Byte-Wide (MAX1066)

Parallel Interface

o High Speed: 165ksps Sample Rate

o Accurate: ±1LSB DNL (max), ±1LSB INL (max)

o 4.096V, 35ppm/°C Internal Reference

o External Reference Range 3.8V to 5.25V

o Single 4.75V to 5.25V Analog Supply Voltage

o 2.7V to 5.25V Digital Supply Voltage

o Low Supply Current

1.8mA (External Reference)

2.7mA (Internal Reference)

0.1mA AutoShutdown Mode (10ksps, External

Reference)

o Small Footprint

28-Pin TSSOP Package (14-Bit Wide)

20-Pin TSSOP Package (Byte Wide)

MAX1065/MAX1066

Low-Power, 14-Bit Analog-to-Digital Converters

with Parallel Interface

________________________________________________________________

Maxim Integrated Products

Ordering Information

ANALOG INPUT

D0–D13

EOC

REFADJ

REF

DGNDAGND

RESET

R/C

AIN

MAX1065

0.1μF 0.1μF

5V ANALOG 5V DIGITAL

0.1μF1μF

μP DATA

BUS

Typical Operating Circuit

19-2466; Rev 1; 6/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Pin Configurations appear at end of data sheet.

AutoShutdown is a trademark of Maxim Integrated Products, Inc.

PART

TEMP RANGE

PIN-

PACKAGE

INL

MAX1065ACUI 0°C to 70°C

28 TSSOP

±1

MAX1065BCUI 0°C to 70°C

28 TSSOP

±2

MAX1065CCUI 0°C to 70°C

28 TSSOP

±3

MAX1065AEUI

-40°C to +85°C 28 TSSOP

±1

MAX1065BEUI

-40°C to +85°C 28 TSSOP

±2

MAX1065CEUI

-40°C to +85°C 28 TSSOP

±3

MAX1066ACUP

0°C to 70°C

20 TSSOP

±1

MAX1066BCUP

0°C to 70°C

20 TSSOP

±2

MAX1066CCUP

0°C to 70°C

20 TSSOP

±3

MAX1066AEUP

-40°C to +85°C 20 TSSOP

±1

MAX1066BEUP

-40°C to +85°C 20 TSSOP

±2

MAX1066CEUP

-40°C to +85°C 20 TSSOP

±3

Temperature

Sensor/Monitor

Industrial Process

Control

I/O Boards

Data-Acquisition

Systems

Cable/Harness Tester

Accelerometer

Measurements

Digital Signal Processing

Summary of content (14 pages)

PAGE 1
9-2466; Rev 1; 6/09 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface Features The MAX1065/MAX1066 14-bit, low-power successive approximation analog-to-digital converters (ADCs) feature automatic power-down, a factory-trimmed internal clock, and a high-speed, 14-bit-wide (MAX1065) or byte-wide (MAX1066) parallel interface. The devices operate from a single 4.75V to 5.25V analog supply and a 2.7V to 5.25V digital supply.
PAGE 2
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface ABSOLUTE MAXIMUM RATINGS AVDD to AGND .........................................................-0.3V to +6V DVDD to DGND.........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AIN, REF, REFADJ to AGND....................-0.3V to (AVDD + 0.3V) CS, HBEN, R/C, RESET to DGND ............................-0.
PAGE 3
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface (AVDD = DVDD = 5V, external reference = 4.096V, CREF = 1µF, CREFADJ = 0.1µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4.056 4.096 4.
PAGE 4
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 5V, external reference = 4.096V, CREF = 1µF, CREFADJ = 0.1µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface 0.4 1.0 INL (LSB) 0.2 1.5 0 -0.2 0.5 0 -0.5 -0.4 -1.0 -0.6 1 0.1 0.01 0.001 -1.5 -0.8 -1.0 -2.0 0 4096 8192 12288 16384 0.0001 0 4096 8192 12288 16384 1 10 IAVDD + IDVDD SUPPLY CURRENT vs. TEMPERATURE IAVDD + IDVDD SHUTDOWN CURRENT vs. TEMPERATURE INTERNAL REFERENCE vs. TEMPERATURE 1.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 20 40 60 -40 80 4.106 4.096 4.086 4.
PAGE 6
Typical Operating Characteristics (continued) (AVDD = DVDD = 5V, external reference = 4.096V, CREF = 1µF, CREFADJ = 0.1µF, TA = +25°C, unless otherwise noted.) SPURIOUS-FREE DYNAMIC RANGE vs. FREQUENCY -20 -30 90 80 SFDR (dB) -40 100 -50 -60 70 60 50 -70 40 -80 30 -90 20 -100 10 0.1 1 -40 -60 -80 -120 SAMPLE RATE = 165ksps 0.1 100 10 SAMPLE RATE = 165ksps -20 -100 0 -110 0 1.
PAGE 7
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface PIN NAME MAX1065 FUNCTION MAX1065 MAX1066 MAX1066 15 11 REFADJ Reference Buffer Output. Bypass REFADJ with a 0.1µF capacitor to AGND for internal reference mode. Connect REFADJ to AVDD to select external reference mode. 16 12 REF Reference Input/Output. Bypass REF with a 1µF capacitor to AGND for internal reference mode. External reference input when in external reference mode. 17 — RESET Reset Input.
PAGE 8
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface Detailed Description Converter Operation The MAX1065/MAX1066 use a successive-approximation (SAR) conversion technique with an inherent track-andhold (T/H) stage to convert an analog input into a 14-bit digital output. Parallel outputs provide a high-speed interface to most microprocessors (µPs). The Functional Diagram shows a simplified internal architecture of the MAX1065/MAX1066.
PAGE 9
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface where R IN = 800Ω, R S = the input signal’s source impedance, and t ACQ is never less than 1.1µs. A source impedance less than 1kΩ does not significantly affect the ADC’s performance. To improve the input-signal bandwidth under AC conditions, drive AIN with a wideband buffer (>4MHz) that can drive the ADC’s input capacitance and settle quickly.
PAGE 10
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface Internal and External Reference REF TRACK Internal Reference The internal reference of the MAX1065/MAX1066 is internally buffered to provide 4.096V (typ) output at REF. Bypass REF to AGND and REFADJ to AGND with 1µF and 0.1µF respectively. Fine adjustments can be made to the internal reference voltage by sinking or sourcing current at REFADJ. The input impedance at REFADJ is nominally 5kΩ.
PAGE 11
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface 68kΩ 100kΩ 11...110 11...101 REFADJ 150kΩ FULL-SCALE TRANSITION 11...111 MAX1065 MAX1066 0.22μF FS = VREF VREF 16384 1LSB = 00...011 00...010 00...001 Figure 7. MAX1065/MAX1066 Reference Adjust Circuit 00...000 0 Reading the Conversion Result EOC is provided to flag the microprocessor when a conversion is complete. The falling edge of EOC signals that the data is valid and ready to be output to the bus.
PAGE 12
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface Layout, Grounding, and Bypassing For best performance, use printed circuit boards. Do not run analog and digital lines parallel to each other, and do not lay out digital signal paths underneath the ADC package. Use separate analog and digital ground planes with only one point connecting the two ground systems (analog and digital) as close to the device as possible.
PAGE 13
Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface TOP VIEW 28 D5 D4/D12 1 20 D3/D11 27 D4 D5/D13 2 19 D2/D10 D8 3 26 D3 D6/0 3 D9 4 25 D2 D7/0 4 D10 5 24 D1 R/C 5 23 D0 EOC 6 D12 7 22 N.C. AVDD 7 14 CS D13 8 21 N.C.
PAGE 14
MAX1065/MAX1066 Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface Revision History REVISION NUMBER REVISION DATE 0 4/02 Initial release 1 6/09 Modified specifications to include reference buffer DESCRIPTION PAGES CHANGED — 3, 4 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.