9-3985; Rev 3; 11/08 KIT ATION EVALU E L B A IL AVA Automatic RF MESFET Amplifier Drain-Current Controllers The MAX11014/MAX11015 set and control bias conditions for dual MESFET power devices found in point-topoint communication and other microwave base stations. The MAX11014 integrates complete dual analog closed-loop drain-current controllers for Class A MESFET amplifier operation, while the MAX11015 targets Class AB operation.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers ABSOLUTE MAXIMUM RATINGS AVDD to AGND .........................................................-0.3V to +6V DVDD to DGND.........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AVSS to AGND ...........................................................-0.3V to -6V RCS1+, RCS1-, RCS2+, RCS2- to GATEVSS (MAX11014) .................................
Automatic RF MESFET Amplifier Drain-Current Controllers (VGATEVSS = VAVSS = -5.5V to -4.75V, VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to VAVDD, external VREFADC = +2.5V, external VREFDAC = +2.5V, CREFADC = CREFDAC = 0.1µF, VOPSAFE1 = VOPSAFE2 = 0, VRCS1+ = VRCS2+ = +5V, CFILT1 = CFILT3 = 1nF, CFILT2 = CFILT4 = 1nF, VAGND = VDGND = 0, VADCIN0 = VADCIN1 = 0, VACLAMP1 = VACLAMP2 = -5V, TJ = TMIN to TMAX, unless otherwise noted. All typical values are at TJ = +25°C.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers ELECTRICAL CHARACTERISTICS (continued) (VGATEVSS = VAVSS = -5.5V to -4.75V, VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to VAVDD, external VREFADC = +2.5V, external VREFDAC = +2.5V, CREFADC = CREFDAC = 0.1µF, VOPSAFE1 = VOPSAFE2 = 0, VRCS1+ = VRCS2+ = +5V, CFILT1 = CFILT3 = 1nF, CFILT2 = CFILT4 = 1nF, VAGND = VDGND = 0, VADCIN0 = VADCIN1 = 0, VACLAMP1 = VACLAMP2 = -5V, TJ = TMIN to TMAX, unless otherwise noted.
Automatic RF MESFET Amplifier Drain-Current Controllers (VGATEVSS = VAVSS = -5.5V to -4.75V, VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to VAVDD, external VREFADC = +2.5V, external VREFDAC = +2.5V, CREFADC = CREFDAC = 0.1µF, VOPSAFE1 = VOPSAFE2 = 0, VRCS1+ = VRCS2+ = +5V, CFILT1 = CFILT3 = 1nF, CFILT2 = CFILT4 = 1nF, VAGND = VDGND = 0, VADCIN0 = VADCIN1 = 0, VACLAMP1 = VACLAMP2 = -5V, TJ = TMIN to TMAX, unless otherwise noted. All typical values are at TJ = +25°C.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers SPI-INTERFACE TIMING CHARACTERISTICS (Note 9) (See Figure 1.
Automatic RF MESFET Amplifier Drain-Current Controllers (Note 9) (See Figure 3.) PARAMETER SYMBOL CONDITIONS CB = 100pF max CB = 400pF UNITS MIN MAX MIN MAX fSCL 0 3.4 0 1.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers MISCELLANEOUS TIMING CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Minimum Time to Wait After a Write Command Before Reading Back Data from the Same Location tRDBK (Note 16) CNVST Active-Low Pulse Width in ADC Clock Mode 01 tCNV01 (Note 3) 20 ns CNVST Active-Low Pulse Width in ADC Clock Mode 11 to Initiate a Temperature Conversion tCNV11 (Note 3) 20 ns CNVST Active-Low Pulse Width in ADC Clock Mode
Automatic RF MESFET Amplifier Drain-Current Controllers Note 1: All current-sense amplifier specifications are tested after a current-sense calibration (valid when drain current = 0mA). See RCS Error vs. GATE Current in the Typical Operating Characteristics. The calibration is valid only at one temperature and supply voltage and must be repeated if either the temperature or supply voltage changes. Note 2: The hardware configuration register’s CH_OCM1 and CH_OCM0 bits are set to 0. See Table 10a.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers tCSW CS tCSS tCSS tCL tCH tCP tCSH SCLK tDH tDS C6 C7 DIN D1 D0 tDO tTR tDV DOUT Figure 1. SPI Serial-Interface Timing Diagram SDA tLOW tF tSU;DAT tR tHD;STA tF tSP tBUF tR SCL tSU;STO tSU;STA tHD;STA tHD;DAT S tHIGH Sr P S S = START, Sr = REPEATED START, P = STOP Figure 2.
Automatic RF MESFET Amplifier Drain-Current Controllers ANALOG SUPPLY CURRENT vs. ANALOG SUPPLY VOLTAGE 2 0.2 2.43 2.42 2.5 3.0 3.5 4.0 4.5 5.0 -0.4 4.875 5.000 5.125 GATE VOLTAGE POWER-UP FILT1/FILT3 SETTLING TIME vs. FILT1/FILT3 CAPACITIVE LOAD tFALL 50 75 100 125 0.25 RCS ERROR (mV) SETTLING TIME (μs) 25 0.50 MAX11014 toc05 10% TO 90% 400 tRISE 300 200 0 SOURCING -0.25 -5V 0 RCS ERROR vs.
Typical Operating Characteristics (continued) (VGATEVSS = -5.5V; VAVDD = VDVDD = +5V, GATEVSS = AVSS = -5V, external VREFADC = +2.5V; external VREFDAC = +2.5V; CREF = 0.1µF; TA = TMIN to TMAX, unless otherwise noted.) ADC INTEGRAL NONLINEARITY vs. OUTPUT CODE 0.75 0.75 0 -0.25 0.25 0 -0.25 0.25 0 -0.25 -0.50 -0.50 -0.50 -0.75 -0.75 -0.75 -1.00 1024 2048 3072 4096 -1.00 0 1024 2048 3072 4096 0 1024 2048 3072 4096 OUTPUT CODE OUTPUT CODE OUTPUT CODE ADC SINAD vs.
Automatic RF MESFET Amplifier Drain-Current Controllers DAC INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE 2.5012 2.5010 4.750 2.50 VREFDAC 2.49 2.48 4.875 5.000 5.125 -50 5.250 -25 0 25 50 75 100 TEMPERATURE (°C) ADC OFFSET ERROR vs. TEMPERATURE ADC GAIN ERROR vs. ANALOG SUPPLY VOLTAGE 2.0 1.5 1.0 0.5 -50 -25 0 25 50 75 100 125 0 4.750 5.000 5.125 5.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 Pin Description PIN NAME FUNCTION 1 DIN/SDA Serial Data Input. Data is latched into the serial interface on the rising edge of SCLK in SPI mode. Connect a pullup resistor to SDA in I2C mode. 2 DOUT/A1 Serial Data Output in SPI Mode/Address Select 1 in I2C Mode. Data transitions on the falling edge of SCLK. DOUT is high impedance when CS is high. Connect A1 to DVDD or DGND to set the device address to I2C mode.
Automatic RF MESFET Amplifier Drain-Current Controllers PIN NAME FUNCTION 30 RCS2+ Channel 2 Current-Sense-Resistor Connection. Connect to the external supply powering channel 2’s MESFET drain, in the range of +0.5V to +11V (MAX11014) or +5V to +32V (MAX11015). Bypass with a 1µF and a 0.1µF capacitor in parallel to AGND. If unused, connect to RCS1+. 31 RCS2- Channel 2 Current-Sense-Resistor Connection. Connect to the channel 2 MESFET drain. Decouple as required by the application.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Detailed Description The MAX11014/MAX11015 set and monitor the bias conditions for dual MESFET power devices found in cellular base stations and point-to-point microwave links. The internal DAC sets the voltage across the current-sense resistor by controlling the GATE voltage.
PGAOUT1 PGAOUT2 SPI/I2C DOUT/A1 N.C.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Once the control loop has been set, the MAX11014 automatically maintains the drain-current value. Figure 5 details the amplifiers that bias the channel 1 and channel 2 control loops. The dual current-sense amplifiers amplify the voltage between RCS_+ and RCS_- by four and add an offset voltage (+12mV nominally). These current-sense amplifiers amplify sense voltages between 0 and 625mV when V REFDAC = +2.5V.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 PGAOUT1 +0.5V TO +11V RCS1+ CURRENT-SENSE AMPLIFIER CS/A0 CHANNEL 1 ADC RCS1- SCLK/SCL DIN/SDA FILT2 SERIAL INTERFACE DOUT/A1 CFILT2 N.C./A2 GATE1 100kΩ POWER MESFET GATE-DRIVE AMPLIFIER 580kΩ CHANNEL 1 DAC + CFILT1 FILT1 PGAOUT2 +0.5V TO +11V RCS2+ CURRENT-SENSE AMPLIFIER CHANNEL 2 ADC RCS2- FILT4 CFILT4 GATE2 100kΩ CHANNEL 2 DAC POWER MESFET GATE-DRIVE AMPLIFIER 580kΩ + CFILT3 FILT3 MAX11014 Figure 5.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers PGAOUT1 CS/A0 +5V TO +32V CHANNEL 1 ADC CURRENT-SENSE AMPLIFIER RCS1+ SCLK/SCL RCS1DIN/SDA DOUT/A1 SERIAL INTERFACE N.C./A2 GAIN = -2 GATE1 GATE-DRIVE AMPLIFIER 580kΩ FILT1 CHANNEL 1 DAC POWER MESFET CFILT1 FILT2 PGAOUT2 +5V TO +32V CHANNEL 2 ADC CURRENT-SENSE AMPLIFIER RCS2+ RCS2- GAIN = -2 GATE2 GATE-DRIVE AMPLIFIER 580kΩ CHANNEL 2 DAC CFILT3 FILT3 FILT4 MAX11015 Figure 6.
Automatic RF MESFET Amplifier Drain-Current Controllers GATE VOLTAGE USER ENTERED DAC CODE 0V FFFh FULLY ON ADC CODE RCS_+ TO READ RCS_- SENSE FROM VOLTAGE THE FIFO FFFh VREFDAC / 4 PGAOUT VOLTAGE GATE VOLTAGE ALARM THRESHOLDS 0V DEFAULT VH = FFFh MAX11014/MAX11015 MESFET TOO HIGH VGATE WITHIN THRESHOLDS NEW HIGH GATE VOLTAGE ALARM THRESHOLD NEW LOW GATE VOLTAGE ALARM THRESHOLD TOO LOW OFF -2 x VREFDAC 000h 000h 0mV VREFADC DEFAULT VL = 000h Figure 7.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers REFADC ACQ ADCIN1, ADCIN2 DAC AGND CIN+ COMPARATOR HOLD CIN- ACQ AGND HOLD ACQ HOLD AVDD / 2 Figure 8. ADC Equivalent Input Circuit filter that limits the analog-input bandwidth. Analog Input Protection Internal ESD protection diodes clamp ADCIN1/ADCIN2 to AV DD and AGND, allowing them to swing from (AGND - 0.3V) to (AV DD + 0.3V) without damage.
Automatic RF MESFET Amplifier Drain-Current Controllers The external temperature sensor drive current ratio has been optimized for a 2N3904 npn transistor with an ideality factor of 1.0065. The nonideality offset is removed internally by a preset digital coefficient. Using a transistor with a different ideality factor produces a proportionate difference in the absolute measured temperature.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers ADC/DAC References The MAX11014/MAX11015 provide an internal lownoise +2.5V reference for the ADCs, DACs, and temperature sensors. Set bits D3–D0 within the hardware configuration register to control the source of the DAC and ADC references. See Tables 10c and 10d. Connect a voltage source to REFADC between +1.0V and AVDD in external ADC reference mode. Connect a voltage source to REFDAC between +0.7V to +2.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 CS SCLK DIN 1 C7 (MSB) 2 C6 3 C5 4 C4 5 C3 6 C2 7 C1 8 9 C0 (LSB) D15 (MSB) THE COMMAND BYTE INITIALIZES THE INTERNAL REGISTERS. 10 23 D14 D1 24 D0 (LSB) THE NEXT 16 BITS ARE DATA BITS. Figure 9. MAX11014/MAX11015 Write Timing CS SCLK 1 DIN C7 (MSB) 2 C6 3 C5 4 C4 5 C3 6 C2 7 C1 THE COMMAND BYTE INITIALIZES THE INTERNAL REGISTERS.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers I2C Compatibility (SPI/I2C = DGND) START and STOP Conditions The master initiates a transmission with a START condition (S), a high-to-low transition on SDA while SCL is high. The master terminates a transmission with a STOP condition (P), a low-to-high transition on SDA while SCL is high (Figure 11).
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 NACK S SDA ACK SCL 1 2 8 S = START. ACK = ACKNOWLEDGE. NACK = NOT ACKNOWLEDGE. 9 Figure 12. Acknowledge Bits SLAVE ADDRESS S 0 1 0 1 A2 A1 A0 R/W ACK 6 7 8 9 SDA SCL 1 2 3 4 5 S = START. ACK = ACKNOWLEDGE. SLAVE ADDRESS BITS A2, A1, AND A0 CORRESPOND TO THE LOGIC STATE OF ADDRESS-SELECT INPUT PINS A2, A1, AND A0. Figure 13.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Transfer from F/S mode to HS mode by addressing all devices on the bus with the HS-mode master code 0000 1XXX (X = don’t care). After successfully receiving the HS-mode master code, the MAX11014/ MAX11015 issue a NACK, allowing SDA to be pulled high for one cycle. After the NACK, the MAX11014/MAX11015 operate in HS mode. Send a repeated START followed by a slave address to initiate HS-mode communication.
Automatic RF MESFET Amplifier Drain-Current Controllers Default Reads A standard I 2C read command involves writing the slave address, command byte, slave address byte again, and then reading the data at SDA. This is detailed in the 5-byte read cycle sequence in Figure 16. Read from the MAX11014/MAX11015 through the default read command to avoid writing a command byte and second slave address byte. See the default read sequence in Figure 16.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers SCL SDA A6 A5 A4 A3 A2 A1 A0 R/W R/W ACK C6 C5 C4 C3 C2 C1 C0 ACK S SDA DIRECTION IN OUT IN OUT SCL SDA D15 D14 D13 D12 D11 D10 D8 D9 D7 ACK D6 D5 D4 D3 D2 D1 D0 ACK P SDA DIRECTION IN OUT OUT IN IN S = START. ACK = ACKNOWLEDGE. P = STOP. Figure 17.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 SCL SDA A6 A5 A4 A3 A2 A1 A0 R/W R/W ACK C6 C5 C4 C3 C2 C1 C0 ACK S SDA DIRECTION IN OUT, DATA FROM LAST READ COMMAND BYTE REGISTER IN SCL D7 SDA D6 D5 D4 D3 D2 D1 D0 S = START. ACK = ACKNOWLEDGE. NACK = NOT ACKNOWLEDGE. P = STOP. NACK P OUT SDA DIRECTION IN Figure 19.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 2.
Automatic RF MESFET Amplifier Drain-Current Controllers BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RESET STATE X X X X 0 1 1 1 1 1 1 1 1 1 1 1 BIT VALUE (°C) X X X X MSB (sign) 128 64 32 16 8 4 2 1 0.5 0.25 LSB 0.125 X = Don’t care. Table 4. High/Low Temperature ALARM Threshold Examples TEMPERATURE SETTING DATA BITS D11–D0 (TWO’S COMPLEMENT) -40°C 1110 1100 0000 -1.625°C 1111 1111 0011 0°C 0000 0000 0000 +27.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 6. IH1 and IH2 (Read/Write) BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 1 1 1 1 1 1 1 1 1 1 1 1 BIT VALUE X X = Don’t care. X X X MSB — — — — — — — — — — LSB RESET STATE Table 7.
Automatic RF MESFET Amplifier Drain-Current Controllers D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RESET STATE BIT X X X X 0 0 0 0 0 0 0 0 0 0 0 0 BIT VALUE X X X X MSB — — — — — — — — — — LSB X = Don’t care. Table 10. HCFG (Read/Write) BIT NAME DATA BIT RESET STATE X D15–D12 X CH2OCM1 D11 0 CH2OCM0 D10 0 CH1OCM1 D9 0 CH1OCM0 D8 0 X D7 X Don’t care. ADC monitor bit. Set to 1 to load ADC results into the FIFO.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 10a. Maximum GATE_ Voltage Modes CH_OCM1 CH_OCM0 0 0 Maximum positive voltage at GATE_ = AGND. FUNCTION 0 1 Maximum positive voltage at GATE_ = AGND + 250mV. 1 0 Maximum positive voltage at GATE_ = AGND + 500mV. 1 1 Maximum positive voltage at GATE_ = AGND + 750mV. Table 10b. Clock Modes CKSEL1 CKSEL0 CONVERSION CLOCK 0 0 Internal Internally timed acquisitions and conversions. Default state.
Automatic RF MESFET Amplifier Drain-Current Controllers VDAC(CODE) = VSET(CODE) (1 + LUTK [K] x LUTTEMP [TEMP]) where VDAC(CODE) = The modified channel1/channel 2 12-bit DAC code. VSET(CODE) = The 12-bit DAC code written to the channel 1/channel 2 VSET registers. CHANNEL 1/CHANNEL 2 DAC INPUT REGISTERS: LUT K[K] = The interpolated, fractional 12-bit KLUT value. The KLUT data is derived from a variety of sources, including the VSET register value, the K parameter register value, or various ADC channels.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 11. SCFG (Read/Write) 38 BIT NAME DATA BIT RESET STATE X D15–D12 X Don’t care. Channel 2 load DAC. Set to 1 to load the new value of VDAC2(CODE), upon completion of a VDAC2(CODE) calculation, into both the channel 2 DAC input and output registers. When set to 1, BUSY pulses high after a new VDAC2 output is calculated.
Automatic RF MESFET Amplifier Drain-Current Controllers T_COMP1 T_COMP0 FUNCTION 0 0 A change in temperature does not trigger a VDAC(CODE) calculation. Any VDAC(CODE) calculation triggered in another way does not include the temperature lookup. This bit setting simplifies the VDAC(CODE) calculation to VDAC(CODE) = VSET(CODE) (1 + LUTK[K]). 0 1 A change in temperature does not trigger a VDAC(CODE) calculation.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 12. ALMHCFG (Read/Write) BIT NAME DATA BIT RESET STATE X D15–D12 X Don’t care. INTEMP D11 0 Internal temperature conversion bit. Set to 1 to cause ALARM comparisons for channel 2 to use the internal temperature conversion result. Set to 0 to cause ALARM comparisons for channel 2 to use the external temperature conversion result. ALMCMP D10 0 ALARM comparator bit.
Automatic RF MESFET Amplifier Drain-Current Controllers VGHYST1 0 0 VGHYST0 0 1 8 LSBs of hysteresis. 16 LSBs of hysteresis. FUNCTION 1 1 0 1 32 LSBs of hysteresis. 64 LSBs of hysteresis. Table 12b. Sense Voltage/Temperature Hysteresis Levels ITHYST1 ITHYST0 0 0 8 LSBs of hysteresis. FUNCTION 0 1 16 LSBs of hysteresis. 1 0 32 LSBs of hysteresis. 1 1 64 LSBs of hysteresis. Table 12c. ALARM Clamp Modes ALM_CLMP1 ALM_CLMP0 FUNCTION 0 0 Default state.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 13. ALMSCFG (Read/Write) BIT NAME DATA BIT RESET STATE X D15–D12 X Don’t care. VALARM2 D11 0 Channel 2 GATE voltage ALARM bit. Set to 1 to enable the ALARM functionality for GATE2 voltage measurements. Set to 0 to disable the ALARM functionality for GATE2 voltage measurements. VWIN2 D10 0 Channel 2 GATE voltage windowing bit. Set to 1 to monitor the GATE2 voltage with the ALARM comparator in windowing mode.
Automatic RF MESFET Amplifier Drain-Current Controllers BIT NAME DATA BIT RESET STATE X D15–D12 X VSET11–VSET0 D11–D0 0000 0000 0000 FUNCTION Don’t care. VSET11 is the MSB and VSET0 is the LSB. Data format is straight binary. Table 15. USRK1 and USRK2 (Write) BIT NAME DATA BIT RESET STATE X D15–D12 X K11–K0 D11–D0 N/A FUNCTION Don’t care. K11 is the MSB and K0 is the LSB. Data format is straight binary.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 16. IPDAC1 and IPDAC2 (Write) BIT NAME DATA BIT RESET STATE X D15–D12 X DAC11–DAC0 D11–D0 0000 0000 0000 FUNCTION Don’t care. DAC11 is the MSB and DAC0 is the LSB. Data format is straight binary. Table 17. THRUDAC1 and THRUDAC2 (Write) BIT NAME DATA BIT RESET STATE X D15–D12 X DAC11–DAC0 D11–D0 N/A FUNCTION Don’t care. DAC11 is the MSB and DAC0 is the LSB. Data format is straight binary. Table 18.
Automatic RF MESFET Amplifier Drain-Current Controllers Set the DOCAL bit, D1, to 1 to run a current-sense self-calibration routine in both channel 1 and channel 2. At the end of the calibration routine, DOCAL is set back to 0. Set the SELFTIME bit, D0, to 1 to perform a current-sense calibration on a periodic basis, typically every 15ms. Use the DOCAL bit in conjunction with the SELFTIME bit.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 19. ADCCON (Write) BIT NAME DATA BIT RESET STATE FUNCTION X D15–D12 X Don’t care. CONCONV D11 0 Set to 1 to command continuous ADC conversions. The ADCMON bit in the hardware configuration register must be to set to 1 to load ADC results into the FIFO. Continuous conversions are only applicable in clock modes 00 and 01.
Automatic RF MESFET Amplifier Drain-Current Controllers BIT NAME DATA BIT RESET STATE X D15–D12 X Don’t care. 1 Set to 1 to power down all internal blocks. FULLPD takes precedence over any of the other power-down control bits. All commands in progress are suspended and the DACs and ADC are disabled. The serial interface remains functional. FULLPD is set to 1 on power-up. Set the FULLPD bit to 0 after power-up and before writing any other commands to activate all internal blocks.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 22. SCLR (Write) BIT NAME DATA BIT RESET STATE X D15–D7 X FUNCTION Don’t care. Write the following sequence to perform a full reset and return all internal registers to their respective reset state: Write to the software clear register once with FULLRESET = 0 and ARMRESET = 1. Write a second word to the software clear register with FULLRESET = 1 and ARMRESET = 0.
Automatic RF MESFET Amplifier Drain-Current Controllers BIT NAME DATA BIT RESET STATE FUNCTION LUTDAT15– LUTDAT0 D15–D0 N/A The 16-bit data word written to the LUT data or configuration memory space. Table 25. FIFO DATA BITS CHANNEL TAG CONVERSION-DATA ORIGIN D11 D10–D1 D0 0 MSB — LSB 0 1 MSB — LSB Channel 1 external temperature sensor. 1 0 MSB — LSB Channel 1 sense voltage. 0 1 1 MSB — LSB Channel 1 DAC input register. 0 1 0 0 MSB — LSB Channel 1 GATE voltage.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 26. FLAG (Read) BIT NAME DATA BIT RESET X D15–D7 X Don’t care. RESTART D6 0 RESTART is set to 1 after either a watchdog timer reset or by commanding a software reset through the software clear register’s FULL RESET function. RESTART returns to 0 after a power-on reset or a flag register read command.
Automatic RF MESFET Amplifier Drain-Current Controllers BIT NAME DATA BIT RESET STATE FUNCTION X D15–D12 X Don’t care. HIGH-V2 D11 0 HIGH-V2 is set to 1 when the GATE2 voltage exceeds the high threshold setting. HIGH-V2 is reset to 0 by either a read of the ALARM flag register or a software clear command. LOW-V2 D10 0 LOW-V2 is set to 1 when the GATE2 voltage decreases below the low threshold setting.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers The ADCBUSY bit, D3, is set to 1 when the ADC is busy, an ALARM value is being checked, or the ADC results are being loaded into the FIFO. ADCBUSY returns to 0 after the ADC completes all of the conversions in the current scan. The VGBUSY bit, D2, is set to 1 when the ALU is performing a lookup and interpolation or VDAC(CODE) calculation for either channel. The FIFOEMP bit, D1, is set to 1 when the FIFO is empty and contains no data.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 FS = VREFADC 011....111 1 LSB = VREFADC / 4096 011....110 OUTPUT CODE OFFSET BINARY OUTPUT CODE (LSB) FULL-SCALE TRANSITION 111...111 111...110 111...101 000....010 000....001 000....000 111....111 111....110 111....101 000...011 000...010 000...001 000...000 100....001 100....000 -256°C 0 1 2 3 FS - 3/2 LSB FS 0 +255.5°C TEMPERATURE °C INPUT VOLTAGE (LSB) Figure 21.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers CNVST ADCBUSY (FLAG REGISTER BIT) ALUBUSY (FLAG REGISTER BIT) BUSY (OUTPUT) GATE1/2 OUTPUT BUSY TIMING: EXAMPLE 1 CNVST ADCBUSY (FLAG REGISTER BIT) ALUBUSY (FLAG REGISTER BIT) BUSY OUTPUT BUSY TIMING: EXAMPLE 2 Figure 23. BUSY Timing Write to the HVCAL_ bits in the PGA calibration control register to short circuit the current-sense amplifier inputs so that only the offset is apparent at the PGAOUT_ output and ADC input.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 1111 1111 1111 MOST POSITIVE VALUE (DEFAULT FOR HIGH THRESHOLD REGISTERS) ACTUAL MEASUREMENT VALUE; THEREFORE, ALARM TRIGGERS HIGH THRESHOLD REGISTER VALUE BUILT IN 8–64 LSBs OF HYSTERESIS WINDOW OF VALUES THAT DO N0T TRIGGER AN ALARM BUILT IN 8–64 LSBs OF HYSTERESIS LOW THRESHOLD REGISTER VALUE 0000 0000 0000 MOST NEGATIVE VALUE (DEFAULT FOR LOW THRESHOLD REGISTERS) Figure 24.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers 1111 1111 1111 MOST POSITIVE VALUE (DEFAULT FOR HIGH THRESHOLD REGISTERS) ACTUAL MEASUREMENT VALUE, THEREFORE ALARM TRIGGERS ALARM TRIGGERED WHEN EXCEEDING THIS LEVEL HIGH THRESHOLD REGISTER VALUE ALARM REMOVED AFTER CROSSING BACK BELOW THIS LEVEL LOW THRESHOLD REGISTER VALUE WINDOW OF VALUES THAT DO NOT TRIGGER AN ALARM 0000 0000 0000 MOST NEGATIVE VALUE (DEFAULT FOR LOW THRESHOLD REGISTERS) Figure 26.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 VOLTAGE OR TEMPERATURE MEASUREMENT VALUE HIGH THRESHOLD REGISTER LOW THRESHOLD REGISTER ALARM COMPARATOR (ACTIVE-LOW) ALARM INTERRUPT (ACTIVE-LOW) READ ALARM FLAG REGISTER READ ALARM FLAG REGISTER TIME Figure 27. ALARM Hysteresis-Mode Timing Example ALARM threshold register value. See Figure 26. If an ADC output value exceeds its respective ALARM high threshold register value, the ALARM output triggers.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers For a GATE_ voltage ALARM condition, GATE_ remains clamped and ALM_CLMP_ 10 mode functions the same as 11 mode. This exception breaks the feedback loop that would have otherwise been created by sampling the GATE_ voltage and then clamping that same voltage. • ALM_CLMP1/ALM_CLMP0 = 11 This mode provides semi-automatic clamping.
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 BIT 6 KLUT2BASE 0xC7 HARD ADDRESS VALUE KLUT1BASE 0xC6 HARD ADDRESS VALUE TLUT2BASE 0xC5 HARD ADDRESS VALUE TLUT1BASE 0xC4 HARD ADDRESS VALUE KLUT2CNFG 0xC3 HARD ADDRESS VALUE KLUT1CNFG 0xC2 HARD ADDRESS VALUE TLUT2CNFG 0xC1 HARD ADDRESS VALUE TLUT1CNFG 0xC0 HARD ADDRESS VALUE KLUT2 VALUE 48 0xBF KLUT2 VALUE 47 0xBE KLUT2 VALUE 1 0x91 KLUT2 VALUE 0 0x90 KLUT1 VALUE 47 0x8F
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers bit threshold. Using the temperature LUT as an example, if the HYS value is 101 (16 bits) and the latest temperature measurement differs from the last one by more than 2°C, a new TLUT operation is performed and a new TLUT value is calculated. Bits D3–D0 set the LUT step size. See Table 28c. The step size is based on the value of 2N, with N equaling the digital value of the STEP bits. Set the step size between 1 (20) and 512 (29).
Automatic RF MESFET Amplifier Drain-Current Controllers BIT NAME DATA BIT RESET SIZE5 D12 0 SIZE4 D11 0 SIZE3 D10 0 SIZE2 D9 0 SIZE1 D8 0 SIZE0 D7 0 HYS2 D6 0 HYS1 D5 0 HYS0 D4 0 STEP3 D3 0 STEP2 D2 0 STEP1 D1 0 STEP0 D0 0 FUNCTION The SIZE field is a straight binary representation of the size of the respective LUT. SIZE5 is the MSB of the 6 SIZE bits. SIZE0 is the LSB. Set the size of the LUT between eight entries (001000) and 48 entries (110000).
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Table 28d. LUT Base BIT NAME DATA BIT BASE11–BASE0 D11–D0 RESET STATE FUNCTION N/A The base value signifies the starting point for the LUT. The KLUT base value is stored in binary format, with the LSB equaling 1. The TLUT base value is stored in two’s-complement format, with the LSB equaling +0.125°C.
Automatic RF MESFET Amplifier Drain-Current Controllers 0xC7 KLUT1BASE = 0011 0011 0011 (819d) 0xC6 TLUT2BASE 0xC5 TLUT1BASE 0xC4 KLUT2CNFG 0xC3 KLUT1CNFG = 0 0100 1xxx 1000 0xC2 TLUT2CNFG 0xC1 T LUT1CNFG 0xC0 MAX11014/MAX11015 KLUT2BASE KLUT1 VALUE 9 = UNUSED 1.7499V KLUT1 VALUE 8 0x68 1.5936V KLUT1 VALUE 7 0x67 1.4374V KLUT1 VALUE 6 0x66 1.2811V KLUT1 VALUE 5 0x65 1.1249V KLUT1 VALUE 4 0x64 0.9686V KLUT1 VALUE 3 0x63 0.8124V KLUT1 VALUE 2 0x62 0.
tACQ11 tCNV11 tACQ11 CNVST TEMP CONVERSION IN 30μs WRITE TO THE ADC CONVERSION REGISTER TO SET UP THE SCAN IDLE, BUT REFERENCE AND TEMPERATURE SENSOR STAY POWERED UP CH0 (INTERNAL TEMPERATURE) RESULT LOADED INTO THE FIFO IDLE, BUT REFERENCE AND TEMPERATURE SENSOR STAY POWERED UP CH5 LOADED INTO THE FIFO 1.5μs ACQUISITION FOR CH10 3.5μs CONVERSION TIME FOR CH10 INT REFERENCE POWERS UP IN 45μs INTERNALLY* 1.5μs ACQUISITION FOR CH5 3.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 tCNV11 tPUINT tACQ11 CNVST CH5 LOADED INTO THE FIFO WRITE TO THE ADC CONVERSION REGISTER TO SET UP THE SCAN TEMPERATURE CONVERSION IN 30μs IDLE, BUT REFERENCE AND TEMPERATURE SENSOR STAY POWERED UP CH6 (EXTERNAL TEMPERATURE) RESULT LOADED INTO THE FIFO 1.5μs ACQUISITION FOR CH10 3.5μs CONVERSION TIME FOR CH10 IDLE, BUT REFERENCE STAYS POWERED UP TEMP SENSOR POWERS UP, ACQUIRES IN 5μs INT REFERENCE POWERS UP IN 45μs 3.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Applications Information Layout Considerations For the external temperature sensor to perform to specifications, care must be taken to place the MAX11014/ MAX11015 as close as is practical to the remote diode. Traces of DXP_ and DXN_ should not be routed across noisy lines and buses. DXP_ and DXN_ routes should be guarded by ground traces on either sides and should be routed over a quiet ground plane.
Automatic RF MESFET Amplifier Drain-Current Controllers AVSS RCS2- RCS1- RCS1+ N.C. N.C. N.C. TOP VIEW AGND Pin Configuration ADC Channel-to-Channel Crosstalk Bias the ON channel to midscale. Apply a full-scale sinewave test tone to all OFF channels. Perform an FFT on the ON channel. ADC channel-to-channel crosstalk is expressed in dB as the amplitude of the FFT spur at the frequency associated with the OFF channel test tone.
Automatic RF MESFET Amplifier Drain-Current Controllers MAX11014/MAX11015 Typical Operating Circuit +5V +5V DRAIN SUPPLY REFADC REFDAC SCLK/SCL AVDD DVDD EXTERNAL REFERENCE DIN/SDA RCS1+ CS/A0 N.C.
Automatic RF MESFET Amplifier Drain-Current Controllers Below is a sample startup code for the MAX11014. This code ensures clean startup of the part irrespective of power supply ramp speed and starts the device REGISTER MNEMONIC REGISTER ADDRESS (hex) CODE WRITTEN SHUT 0x64 0x0000 regulating to 312.5mV on both channels. Change the THRUDAC_ writes to change the voltage across the sense resistor. Note it should be ran after the power supplies have stabilized.
MAX11014/MAX11015 Automatic RF MESFET Amplifier Drain-Current Controllers Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 2 9/08 Added appendix for generic power-up sequence, added note to EC table, and changed DNL spec 3, 4, 32, 48, 69 3 11/08 Changed EC table and updated Appendix: Startup Code Example section 3, 69 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product.