Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TQFP 64 EP

General Description

The MAX11047/MAX11048/MAX11049 and MAX11057/

MAX11058/MAX11059 16-bit/14-bit ADCs offer 4, 6, or 8

independent input channels. Featuring independent track

and hold (T/H) and SAR circuitry, these parts provide

simultaneous sampling at 250ksps for each channel.

The devices accept a 0 to +5V input. All inputs are

overrange protected with internal ±20mA input clamps

providing overrange protection with a simple external

resistor. Other features include a 4MHz T/H input band-

width, internal clock, and internal or external reference.

A 20MHz, bidirectional, parallel interface provides the

conversion results and accepts digital configuration

inputs.

The devices operate with a 4.75V to 5.25V analog supply

and a separate flexible 2.7V to 5.25V digital supply for

interfacing with the host without a level shifter. The

MAX11047/MAX11048/MAX11049 are available in a 56-pin

TQFN and 64-pin TQFP packages while the MAX11057/

MAX11058/MAX11059 are available in TQFP only. All

devices operate over the extended -40°C to +85°C tem-

perature range.

Applications

Automatic Test Equipment

Power-Factor Monitoring and Correction

Power-Grid Protection

Multiphase Motor Control

Vibration and Waveform Analysis

Features

o 16-Bit ADC (MAX11047/MAX11048/MAX11049)

o 14-Bit ADC (MAX11057/MAX11058/MAX11059)

o 4-Channel ADC (MAX11047/MAX11057)

o 6-Channel ADC (MAX11048/MAX11058)

o 8-Channel ADC (MAX11049/MAX11059)

o Single Analog and Digital Supply

o High-Impedance Inputs Up to 1GΩ

o On-Chip T/H Circuit for Each Channel

o Fast 3µs Conversion Time

o High Throughput: 250ksps for Each Channel

o 16-/14-Bit, High-Speed, Parallel Interface

o Internal Clocked Conversions

o 10ns Aperture Delay

o 100ps Channel-to-Channel T/H Matching

o Low Drift, Accurate 4.096V Internal Reference

Providing an Input Range of 0 to 5V

o External Reference Range of 3.0V to 4.25V,

Allowing Full-Scale Input Ranges of +3.7V to

+5.2V

o 56-Pin TQFN (8mm x 8mm) and 64-Pin TQFP

(10mm x 10mm) Packages

o Evaluation Kit Available (MAX11046EVKIT+)

MAX11047–MAX11049/MAX11057–MAX11059

4-/6-/8-Channel, 16-/14-Bit,

Simultaneous-Sampling ADCs

________________________________________________________________

Maxim Integrated Products

Ordering Information

19-5106; Rev 2; 1/11

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART PIN-PACKAGE CHANNELS

MAX11047ETN+

56 TQFN-EP* 4

MAX11047ECB+

64 TQFP-EP* 4

MAX11048ETN+

56 TQFN-EP* 6

MAX11048ECB+

64 TQFP-EP* 6

MAX11049ETN+

56 TQFN-EP* 8

MAX11049ECB+

64 TQFP-EP* 8

MAX11057ECB+

64 TQFP-EP* 4

MAX11058ECB+

64 TQFP-EP* 6

MAX11059ECB+

64 TQFP-EP* 8

Note: All devices are specified over the -40°C to +85°C operating

temperature range.

Denotes a lead(Pb)-free/RoHS-compliant package.

EP = Exposed pad.

Functional Diagram

CLAMP

S/H

16-/14-BIT ADCs

CLAMP S/H

16-/14-BIT ADCs

REF

BUF

CONFIGURATION

REGISTERS

INTERFACE

AND

CONTROL

BANDGAP

REFERENCE

8 x 16-/14-BIT REGISTERS

BIDIRECTIONAL DRIVERS

CH0

AVDD

AGNDS

AGND

CH7

†

DB15**

DB0/CR0

DB3/CR3

DB4

EOCb

SHDN

CONVST

CSb

RDb

WRb

DGND

DVDD

RDC

RDC_SENSE*

REFIO

INT REF

10kΩ

EXT REF

*CONNECTED INTERNALLY ON THE TQFN PARTS

**MAX11047/MAX11048/MAX11049

†

MAX11049/MAX11059

MAX11047/MAX11048/MAX11049/

MAX11057/MAX11058/MAX11059

Summary of content (25 pages)

PAGE 1
9-5106; Rev 2; 1/11 KIT ATION EVALU E L B AVAILA 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs The MAX11047/MAX11048/MAX11049 and MAX11057/ MAX11058/MAX11059 16-bit/14-bit ADCs offer 4, 6, or 8 independent input channels. Featuring independent track and hold (T/H) and SAR circuitry, these parts provide simultaneous sampling at 250ksps for each channel. The devices accept a 0 to +5V input.
PAGE 2
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs ABSOLUTE MAXIMUM RATINGS AVDD to AGND ........................................................-0.3V to +6V DVDD to AGND and DGND .....................................-0.3V to +6V DGND to AGND.....................................................-0.3V to +0.3V AGNDS to AGND...................................................-0.3V to +0.3V CH0–CH7 to AGND ...............................................-2.5V to +7.
PAGE 3
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs VAVDD = 4.75V to 5.25V, VDVDD = +2.7V to 5.25V, VAGNDS = VAGND = VDGND = 0V, VREFIO = internal reference, CRDC = 4 x 33µF, CREFIO = 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDD or DGND, unless otherwise noted. TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs ELECTRICAL CHARACTERISTICS (continued) VAVDD = 4.75V to 5.25V, VDVDD = +2.7V to 5.25V, VAGNDS = VAGND = VDGND = 0V, VREFIO = internal reference, CRDC = 4 x 33µF, CREFIO = 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDD or DGND, unless otherwise noted. TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs VAVDD = 4.75V to 5.25V, VDVDD = +2.7V to 5.25V, VAGNDS = VAGND = VDGND = 0V, VREFIO = internal reference, CRDC = 4 x 33µF, CREFIO = 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDD or DGND, unless otherwise noted. TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 6
Typical Operating Characteristics (continued) (VAVDD = 5V, VDVDD = 3.3V, TA = +25°C, fSAMPLE = 250ksps, internal reference, unless otherwise noted.) VDVDD = 3.3V fSAMPLE = 250ksps TA = +25°C VRDC = 4.096V MIN DNL -1.5 4.85 4.95 5.05 5.15 MAX11049 STATIC MAX DNL MIN INL 5.25 MAX11048 STATIC -40 -15 10 35 22 20 MAX11047 STATIC 18 4.75 85 60 4.85 4.95 5.15 DIGITAL SUPPLY CURRENT vs. SUPPLY VOLTAGE DIGITAL SUPPLY CURRENT vs.
PAGE 7
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs 4.108 0.006 UPPER TYPICAL LIMIT 0.010 MAX11047 toc12 VAVDD = 5.0V fSAMPLE = 250ksps TA = +25°C VRDC = 4.096V fSAMPLE = 250ksps VAVDD = 5.0V VREFIO = 4.096V 0.006 OFFSET ERROR MATCHING 4.100 4.096 4.092 ERRORS (%FS) OFFSET ERROR MATCHING ERRORS (%FS) VREFIO (V) 0.010 MAX11047 toc11 4.112 4.104 OFFSET ERROR AND OFFSET ERROR MATCHING vs. TEMPERATURE OFFSET ERROR AND OFFSET ERROR MATCHING vs. SUPPLY VOLTAGE 0.002 -0.002 0.002 -0.
PAGE 8
Typical Operating Characteristics (continued) (VAVDD = 5V, VDVDD = 3.3V, TA = +25°C, fSAMPLE = 250ksps, internal reference, unless otherwise noted.) THD vs. ANALOG SUPPLY VOLTAGE FOR MAX1104_ -108.5 SNR 92.0 94 MAX11047 toc22 fIN = 10kHz fSAMPLE = 250ksps TA = +25°C VRDC = 4.096V VIN = -0.025dB FROM FS 93 92 SINAD (dB) -109.0 SINAD 91 90 VAVDD = 5.0V fSAMPLE = 250ksps TA = +25°C VRDC = 4.096V VIN = -0.025dB FROM FS -109.5 91.5 89 -110.0 91.0 4.95 5.05 5.15 4.95 5.05 5.15 5.25 10.
PAGE 9
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs RDC 54 AGNDS 48 23 AGNDS 22 RDC AGND 56 21 DGND AVDD 57 16 DB0/CR0 CS 62 15 DB1/CR1 RD 63 RDC CH1*/CH0†/I.C.‡ AVDD CH2*/CH1†/CH0‡ AGND RDC CH1*/CH0†/I.C.
PAGE 10
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Pin Description PIN MAX11047 (TQFN-EP) MAX11048 (TQFN-EP) MAX11049 (TQFN-EP) NAME FUNCTION 1 1 1 DB13 16-Bit Parallel Data Bus Digital Output Bit 13 2 2 2 DB12 16-Bit Parallel Data Bus Digital Output Bit 12 3 3 3 DB11 16-Bit Parallel Data Bus Digital Output Bit 11 4 4 4 DB10 16-Bit Parallel Data Bus Digital Output Bit 10 5 5 5 DB9 16-Bit Parallel Data Bus Digital Output Bit 9 6 6 6 D
PAGE 11
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs PIN MAX11047 (TQFN-EP) MAX11048 (TQFN-EP) MAX11049 (TQFN-EP) NAME FUNCTION 37 34 32 CH2 Channel 2 Analog Input 39 37 34 CH3 Channel 3 Analog Input — 39 37 CH4 Channel 4 Analog Input — 42 39 CH5 Channel 5 Analog Input — — 42 CH6 Channel 6 Analog Input — — 45 CH7 Channel 7 Analog Input 52 52 52 WR Active-Low Write Input. Drive WR low to write to the ADC. Configuration registers are loaded on the rising edge of WR.
PAGE 12
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Pin Description (continued) PIN MAX11047 (TQFP-EP) MAX11048 (TQFP-EP) MAX11049 (TQFP-EP) NAME 18 18 18 EOC 19 19 19 CONVST 20 20 20 SHDN 23, 28, 32, 38, 43, 49, 53, 58 23, 28, 32, 38, 43, 49, 53, 58 23, 28, 32, 38, 43, 49, 53, 58 AGNDS 24, 29, 35, 46, 52, 57 24, 29, 35, 46, 52, 57 24, 29, 35, 46, 52, 57 AVDD Analog Supply Input. Bypass AVDD to AGND with a 0.1µF capacitor at each AVDD input.
PAGE 13
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs PIN MAX11057 (TQFP-EP) MAX11058 (TQFP-EP) MAX11059 (TQFP-EP) NAME FUNCTION 1 1 1 DB12 14-Bit Parallel Data Bus Digital Output Bit 12 2 2 2 DB11 14-Bit Parallel Data Bus Digital Output Bit 11 3 3 3 DB10 14-Bit Parallel Data Bus Digital Output Bit 10 4 4 4 DB9 14-Bit Parallel Data Bus Digital Output Bit 9 5 5 5 DB8 14-Bit Parallel Data Bus Digital Output Bit 8 6 6 6 DB7 14-Bit Parallel Data Bus Digital Output Bit 7 7 7
PAGE 14
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Pin Description (continued) PIN MAX11057 (TQFP-EP) MAX11058 (TQFP-EP) MAX11059 (TQFP-EP) NAME FUNCTION 41 41 41 REFIO 42 39 37 CH2 Channel 2 Analog Input 44 42 39 CH3 Channel 3 Analog Input — 44 42 CH4 Channel 4 Analog Input — 47 44 CH5 Channel 5 Analog Input — — 47 CH6 Channel 6 Analog Input — — 50 CH7 Channel 7 Analog Input 61 61 61 WR Active-Low Write Input.
PAGE 15
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs 0 to + VREFIO x 5.0 4.096 In external reference mode, drive VREFIO with a 3.0V to 4.25V source, resulting in a full-scale input range of 3.662V to 5.188V, respectively. All analog inputs are fault-protected up to ±20mA. The devices include an input clamping circuit that activates when the input voltage at the analog input is above (VAVDD + 300mV) or below -300mV.
PAGE 16
25 25 RS = 1170I VAVDD = 5.0V 20 15 AT CH_ INPUT 5 0 AT CH_ INPUT 10 ICLAMP (mA) 10 AT SOURCE -5 AT SOURCE 5 0 -5 -10 -10 -15 -15 -20 -20 -25 -25 -30 -20 -10 0 10 20 30 -4 40 -2 0 2 4 6 8 SIGNAL VOLTAGE AT SOURCE AND CH_ INPUT (V) SIGNAL VOLTAGE AT SOURCE AND CH_ INPUT (V) Figure 3. Input Clamp Characteristics (Zoom In) Figure 2. Input Clamp Characteristics Figures 2 and 3 illustrate the clamp circuit voltage-current characteristics for a source impedance R S = 1280Ω.
PAGE 17
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Reading Conversion Results The CS and RD are active-low, digital inputs that control the readout through the 16-/14-bit, parallel, 20MHz data bus (D0–D15/13). After EOC transitions low, read the conversion data by driving CS and RD low. Each low period of RD presents the next channel’s result. When CS or RD are high, the data bus is high impedance.
PAGE 18
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Bypass AVDD and DVDD to the ground plane with 0.1µF ceramic chip capacitors on each pin as close as possible to the device to minimize parasitic inductance. Add at least one bulk 10µF decoupling capacitor to AVDD and DVDD per PCB. Interconnect all of the AVDD inputs and DVDD inputs using two solid power planes.
PAGE 19
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs MAX11047–MAX11049/MAX11057–MAX11059 SAMPLE tCON tACQ CONVST t1 EOC tO tQ CS RD DB0–DB15 S0 S1 S6 S7 Figure 6. Conversion Timing Diagram (CR0 = 0) SAMPLE tCON tACQ CONVST t2 EOC tO tQ CS RD DB0–DB15 S0 S1 S6 S7 Figure 7.
PAGE 20
7FFF VLSB = FS 65536 FULL-SCALE TRANSITION 1FFF OUTPUT CODE (hex) OUTPUT CODE (hex) VLSB = FS 16384 0001 0000 FFFF 0001 0000 3FFF FFFE 3FFE 8001 2001 8000 2000 0 FS/2 0 +FS FS/2 OUTPUT CODE = VIN x 65536 - 32768, 5 VREFIO x 4.096 FS = 5 x VREF 4.096 Figure 8a. Two’s Complement Transfer Function for 16-Bit Devices FFFF VLSB = FS 65536 +FS INPUT VOLTAGE (LSB) INPUT VOLTAGE (LSB) OUTPUT CODE = VIN x 16384 - 8192, 5 VREFIO x 4.096 FS = 5 x VREF 4.096 Figure 8b.
PAGE 21
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Power-Grid Protection Figure 10 shows a typical power-grid protection application. DSP Motor Control Figure 11 shows a typical DSP motor control application. VOLTAGE TRANSFORMER PHASE 1 OPT 2.5V ADC OPT CURRENT TRANSFORMER ADC 2.5V VN ADC IN NEUTRAL ADC LOAD 1 MAX11049 MAX11059 LOAD 2 LOAD 3 I3 V3 I2 ADC ADC PHASE 2 V2 ADC ADC PHASE 3 Figure 10.
PAGE 22
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs DSP-BASED DIGITAL PROCESSING ENGINE MAX1104x MAX1105x 16-/14-BIT ADCs IGBT CURRENT DRIVERS 16-/14-BIT ADCs 16-/14-BIT ADCs 16-/14-BIT ADCs 16-/14-BIT ADCs IPHASE1 IPHASE3 IPHASE2 3-PHASE ELECTRIC MOTOR POSITION ENCODER Figure 11.
PAGE 23
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Integral Nonlinearity (INL) INL is the deviation of the values on an actual transfer function from a straight line. For these devices, this straight line is a line drawn between the end points of the transfer function, once offset and gain errors have been nullified. Differential Nonlinearity (DNL) DNL is the difference between an actual step width and the ideal value of 1 LSB.
PAGE 24
MAX11047–MAX11049/MAX11057–MAX11059 4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs Spurious-Free Dynamic Range (SFDR) SFDR is the ratio of the RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest frequency component. Aperture Delay Aperture delay (tAD) is the time delay from the sampling clock edge to the instant when an actual sample is taken. Aperture Jitter Aperture Jitter (tAJ) is the sample-to-sample variation in aperture delay.
PAGE 25
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs REVISION NUMBER REVISION DATE 0 12/09 Initial release 1 6/10 Released MAX11047, MAX11048, and MAX11049 in TQFP packages 1–20 2 1/11 Released MAX11057, MAX11058, and MAX11059. Updated Electrical Characteristics and Typical Operating Characteristics. 1–8 DESCRIPTION PAGES CHANGED — Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.