Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) Internal SOT 23 6

2Msps/3Msps, Low-Power,

Serial 12-/10-/8-Bit ADCs

MAX11102/03/05/06/10/11/15/16/17

EVALUATION KIT AVAILABLE

General Description

The

MAX11102/MAX11103/MAX11105/MAX11106/

MAX11110/MAX11111/MAX11115/MAX11116/

MAX11117 are 12-/10-/8-bit, compact, high-speed, low-

power, successive approximation analog-to-digital con-

verters (ADCs). These high-performance ADCs include a

high-dynamic range sample-and-hold and a high-speed

serial interface. These ADCs accept a full-scale input

from 0V to the power supply or to the reference voltage.

The MAX11102/MAX11103/MAX11106/MAX11111 fea-

ture dual, single-ended analog inputs connected to the

ADC core using a 2:1 MUX. The devices also include a

separate supply input for data interface and a dedicated

input for reference voltage. In contrast, the single-chan-

nel devices generate the reference voltage internally

from the power supply.

These ADCs operate from a 2.2V to 3.6V supply and

consume only 5.2mW at 3Msps and 3.7mW at 2Msps.

The devices include full power-down mode and fast

wake-up for optimal power management and a high-

speed 3-wire serial interface. The 3-wire serial interface

directly connects to SPI, QSPIK, and MICROWIRE

devices without external logic.

Excellent dynamic performance, low voltage, low power,

ease of use, and small package size make these con-

verters ideal for portable battery-powered data-acquisi-

tion applications, and for other applications that demand

low-power consumption and minimal space.

These ADCs are available in a 10-pin TDFN package,

10-pin FMAX

package, and a 6-pin SOT23 package.

These devices operate over the -40NC to +125NC tem-

perature range.

Features

S 2Msps/3Msps Conversion Rate, No Pipeline Delay

12-/10-/8-Bit Resolution

1-/2-Channel, Single-Ended Analog Inputs

Low-Noise 73dB SNR

Variable I/O: 1.5V to 3.6V (Dual-Channel Only)

Allows the Serial Interface to Connect Directly

to 1.5V, 1.8V, 2.5V, or 3V Digital Systems

S 2.2V to 3.6V Supply Voltage

Low Power

3.7mW at 2Msps

5.2mW at 3Msps

Very Low Power Consumption at 2.5µA/ksps

External Reference Input (Dual-Channel Devices Only)

1.3µA Power-Down Current

SPI-/QSPI-/MICROWIRE-Compatible Serial

Interface

S 10-Pin, 3mm x 3mm TDFN Package

10-Pin, 3mm x 5mm µMAX Package

6-Pin, 2.8mm x 2.9mm SOT23 Package

Wide -40NC to +125NC Operation

Applications

Data Acquisition

Portable Data Logging

Medical Instrumentation

Battery-Operated Systems

Communication Systems

Automotive Systems

19-5245; Rev 8; 7/13

Note: All devices are specified over the -40°C to +125°C operating temperature range.

+Denotes a lead(Pb)-free/RoHS-compliant package.

*EP = Exposed pad.

Ordering Information continued at end of data sheet.

Ordering Information

QSPI is a trademark of Motorola, Inc. MICROWIRE is a registered trademark of National Semiconductor Corp.

µMAX is a registered trademark of Maxim Integrated Products, Inc.

PART PIN-PACKAGE BITS SPEED (Msps) NO. OF CHANNELS TOP MARK

MAX11102AUB+ 10 FMAX-EP* 12 2 2 +ABBA

MAX11102AUB/V+ 10 FMAX-EP* 12 2 2 +ABBR

MAX11102ATB+ 10 TDFN-EP* 12 2 2 +AWI

MAX11103AUB+ 10 FMAX-EP* 12 3 2 +AAAU

MAX11103ATB+ 10 TDFN-EP* 12 3 2 +AWV

For pricing, delivery, and ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.

Summary of content (30 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs General Description The MAX11102/MAX11103/MAX11105/MAX11106/ MAX11110/MAX11111/MAX11115/MAX11116/ MAX11117 are 12-/10-/8-bit, compact, high-speed, lowpower, successive approximation analog-to-digital converters (ADCs). These high-performance ADCs include a high-dynamic range sample-and-hold and a high-speed serial interface.
PAGE 2
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ABSOLUTE MAXIMUM RATINGS VDD to GND.............................................................-0.3V to +4V REF, OVDD, AIN1, AIN2, AIN to GND.........-0.3V to the lower of (VDD + 0.3V) and +4V CS, SCLK, CHSEL, DOUT TO GND.............-0.3V to the lower of (VOVDD + 0.3V) and +4V AGND to GND.......................................................-0.3V to +0.3V Input/Output Current (all pins).....................................
PAGE 3
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11102/MAX11103) (continued) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD. MAX11102: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11103: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CONVERSION RATE Throughput Conversion Time Acquisition Time MAX11103 0.
PAGE 4
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11102/MAX11103) (continued) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD. MAX11102: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11103: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.
PAGE 5
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11105) (continued) (VDD = 2.2V to 3.6V, fSCLK = 32MHz, 50% duty cycle, 2Msps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS Total Harmonic Distortion THD fAIN = 500kHz Spurious-Free Dynamic Range SFDR fAIN = 500kHz MIN 77 TYP MAX -85 -76 85 UNITS dB dB f1 = 500.15 kHz, f2 = 499.
PAGE 6
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11105) (continued) (VDD = 2.2V to 3.6V, fSCLK = 32MHz, 50% duty cycle, 2Msps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Positive Supply Current (FullPower Mode), No Clock SYMBOL CONDITIONS MIN IPD Line Rejection MAX 1.48 IVDD Power-Down Current TYP Leakage only 1.3 VDD = +2.2V to +3.6V 0.
PAGE 7
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11106) (continued) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 48MHz, 50% duty cycle, 3Msps; CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Intermodulation Distortion SYMBOL IMD CONDITIONS MIN TYP MAX UNITS f1 = 1.0003MHz, f2 = 0.
PAGE 8
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11106) (continued) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 48MHz, 50% duty cycle, 3Msps; CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.
PAGE 9
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11110/MAX11117) (continued) (VDD = 2.2V to 3.6V. MAX11110: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11117: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX11117 59 61.5 MAX11110 60.5 61.5 MAX11117 59 61.5 MAX11110 60.5 61.
PAGE 10
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11110/MAX11117) (continued) (VDD = 2.2V to 3.6V. MAX11110: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11117: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.
PAGE 11
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11111) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 48MHz, 50% duty cycle, 3Msps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Q0.
PAGE 12
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11111) (continued) (VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 48MHz, 50% duty cycle, 3Msps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (SCLK, CS) Digital Input High Voltage VIH Digital Input Low Voltage VIL Digital Input Hysteresis 0.75 x VOVDD 0.25 x VOVDD 0.
PAGE 13
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11115/MAX11116) (VDD = 2.2V to 3.6V. MAX11115: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11116: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Q0.25 LSB Q0.25 LSB Q0.45 Q0.75 LSB Q0.04 Q0.
PAGE 14
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ELECTRICAL CHARACTERISTICS (MAX11115/MAX11116) (continued) (VDD = 2.2V to 3.6V. MAX11115: fSCLK = 32MHz, 50% duty cycle, 2Msps. MAX11116: fSCLK = 48MHz, 50% duty cycle, 3Msps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL Digital Input Low Voltage Digital Input Hysteresis CONDITIONS MIN TYP VIL IIL Digital Input Capacitance CIN UNITS 0.
PAGE 15
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs SAMPLE SAMPLE t1 t6 CS t5 t2 SCLK DOUT 16 1 2 0 HIGH IMPEDANCE 3 D11 4 D10 5 D9 6 D8 7 D7 8 D6 9 D5 10 D4 11 D3 12 D2 13 D1 14 D0 15 0 16 0 HIGH IMPEDANCE (MSB) t3 t4 t7 1 t8 tQUIET tCONVERT tACQ 1/fSAMPLE Figure 1. Interface Signals for Maximum Throughput, 12-Bit Devices t7 t4 SCLK SCLK VIH DOUT OLD DATA NEW DATA VIL VIH DOUT OLD DATA NEW DATA VIL Figure 3.
PAGE 16
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs µMAX Typical Operating Characteristics (MAX11103AUB+, TA = +25°C, unless otherwise noted.) OFFSET ERROR vs. TEMPERATURE DNL (LSB) -0.5 0 MAX11102 toc03 fS = 3.0Msps 0.5 0 3 2 OFFSET ERROR (LSB) fS = 3.0Msps 0.5 INL (LSB) 1.0 MAX11102 toc01 1.0 DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE MAX11102 toc02 INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE 1 0 -1 -0.5 -2 -1.0 -1.
PAGE 17
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs µMAX Typical Operating Characteristics (continued) (MAX11103AUB+, TA = +25°C, unless otherwise noted.) THD vs. INPUT RESISTANCE MAX11102 toc08 -70 fS = 3Msps 120 THD (dB) 100 -85 90 -90 80 -95 -100 0 300 600 900 1200 1500 20 40 60 80 RIN (I) 1MHz SINE-WAVE INPUT (16,834-POINT FFT PLOT) REFERENCE CURRENT vs. SAMPLING RATE fS = 3.0Msps fIN = 1.
PAGE 18
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs SOT Typical Operating Characteristics (MAX11105AUB+, TA = +25°C, unless otherwise noted.) INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE fS = 2.0Msps 0.5 DNL (LSB) 0.5 0 -0.5 0 -0.5 -1.0 -1.0 1000 0 2000 3000 4000 0 1000 DIGITAL OUTPUT CODE OFFSET ERROR vs. TEMPERATURE 3000 4000 GAIN ERROR vs.
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MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs SOT Typical Operating Characteristics (continued) (MAX11105AUB+, TA = +25°C, unless otherwise noted.) THD vs. ANALOG INPUT FREQUENCY SFDR vs. ANALOG INPUT FREQUENCY fS = 2.0Msps -85 fS = 2.0Msps 105 100 SFDR (dB) -95 -100 90 -105 85 -110 80 400 600 800 1000 0 200 400 THD vs. INPUT RESISTANCE 500kHz SINE-WAVE INPUT (16,834-POINT FFT PLOT) fS = 2.0Msps fIN = 500.
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MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Pin Configurations TOP VIEW AIN1 1 AIN2 2 AGND 3 REF 4 VDD 5 TOP VIEW + MAX11102 MAX11103 MAX11106 MAX11111 EP* AIN1 1 AIN2 2 DOUT AGND 3 8 OVDD REF 4 7 CHSEL VDD 5 6 CS 10 SCLK 9 TOP VIEW + MAX11102 MAX11103 EP* 10 SCLK 9 DOUT 8 OVDD 7 CHSEL 6 CS VDD 1 + GND 2 MAX11105 MAX11110 MAX11115 MAX11116 MAX11117 AIN 3 6 CS 5 DOUT 4 SCLK SOT23 µMAX TDFN *CONNECT EXPOSED PAD TO G
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MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Functional Diagrams VDD CS SCLK CONTROL LOGIC SAR OVDD VDD MAX11102/MAX11103/ MAX11106/MAX11111 OUTPUT BUFFER CS SCLK DOUT CONTROL LOGIC MAX11105/MAX11110/ MAX11115/MAX11116/ MAX11117 OUTPUT BUFFER SAR DOUT CHSEL AIN1 AIN2 AIN MUX CDAC CDAC VREF = VDD REF AGND GND (EP) GND Typical Operating Circuit VDD OVDD VOVDD +3V AIN1 ANALOG INPUTS AIN2 MAX11102 MAX11103 MAX11106 MAX11111 AGND SCK CPU DOUT R
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MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Detailed Description These ADCs include a power-down feature allowing minimized power consumption at 2.5FA/ksps for lower throughput rates. The wake-up and power-down feature is controlled by using the SPI interface as described in the Operating Modes section. The MAX11102/MAX11103/MAX11105/MAX11106/MAX11110/ MAX11111/MAX11115/MAX11116/MAX11117 are fast, 12-/10-/8-bit, low-power, single-supply ADCs.
PAGE 23
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs To sustain the maximum sample rate, all devices have to be resampled immediately after the 16th clock cycle. For lower sample rates, the CS falling edge can be delayed leaving DOUT in a high-impedance condition. Pull CS high after the 10th SCLK falling edge (see the Operating Modes section). The source impedance of the external driving stage in conjunction with the sampling switch resistance affects the settling performance.
PAGE 24
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs PULL CS HIGH AFTER THE 2ND AND BEFORE THE 10TH SCLK FALLING EDGE CS SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DOUT HIGH IMPEDANCE INVALID DATA INVALID DATA OR HIGH IMPEDANCE HIGH IMPEDANCE Figure 8.
PAGE 25
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Supply Current vs. Sampling Rate For applications requiring lower throughput rates, the user can reduce the clock frequency (fSCLK) to lower the sample rate. Figure 11 shows the typical supply current (IVDD) as a function of sample rate (fS) for the 3Msps devices. The part operates in normal mode and is never powered down. Figure 13 pertains to the 2Msps devices.
PAGE 26
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Applications Information Dual-Channel Operation The MAX11102/MAX11103/MAX11106/MAX11111 feature dual-input channels. These devices use a channelselect (CHSEL) input to select between analog input AIN1 (CHSEL = 0) or AIN2 (CHSEL = 1). As shown in Figure 15, the CHSEL signal is required to change between the 2nd and 12th clock cycle within a regular conversion to guarantee proper switching between channels.
PAGE 27
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs and stays within a given error band centered on the resulting steady-state amplifier output level. The ADC input sampling capacitor charges during the sampling cycle, referred to as the acquisition period. During this acquisition period, the settling time is affected by the input resistance and the input sampling capacitance.
PAGE 28
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Definitions Integral Nonlinearity Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. For these devices, the straight line is a line drawn between the end points of the transfer function after offset and gain errors are nulled. Differential Nonlinearity Differential nonlinearity (DNL) is the difference between an actual step width and the ideal value of 1 LSB.
PAGE 29
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Ordering Information (continued) PIN-PACKAGE BITS SPEED (Msps) NO.
PAGE 30
MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Revision History REVISION NUMBER REVISION DATE 0 4/10 Initial release of the MAX11102/MAX11103/MAX11105/MAX11110/MAX11115/ MAX11116/MAX11117 1 7/10 Initial release of the MAX11106/MAX11111. 2 9/10 Corrected the package code of the µMAX package in the Package Information section. 3 10/10 Changed the typical power consumption to 2.2V in the General Description, Features, and Detailed Description sections.