Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) Internal TDFN 12

MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with

Internal Reference in TDFN

General Description

The MAX11166/MAX11167 16-bit, 500ksps/250ksps,

SAR ADCs offer excellent AC and DC performance with

true bipolar input range, small size, and internal reference.

The MAX11166/MAX11167 measure a Q5V (10V

P-P

) input

range while operating from a single 5V supply. A patented

charge-pump architecture allows direct sampling of high-

impedance sources. The MAX11166/MAX11167 integrate

an optional 6ppm/NC reference with internal buffer, saving

the cost and space of an external reference.

These ADCs achieve 92.6dB SNR and -105dB THD. The

MAX11166/MAX11167 guarantee 16-bit no-missing codes

and Q0.5 LSB INL (typ)].

The MAX11166/MAX11167 communicate using an SPI-

compatible serial interface at 2.5V, 3V, 3.3V, or 5V logic.

The serial interface can be used to daisy-chain multiple

ADCs in parallel for multichannel applications and pro-

vides a busy indicator option for simplified system syn-

chronization and timing.

The MAX11166/MAX11167 are offered in 12-pin, 3mm x

3mm, TDFN packages and are specified over the -40NC

to +85NC temperature range.

Applications

● Data Acquisition Systems

● Industrial Control Systems/Process Control

● Medical Instrumentation

● Automatic Test Equipment

Benets and Features

● IntegratedChargePumpReducesPowerSupply

Cost Without Sacrificing Performance

• ±5V Bipolar Analog Input

• 5V Analog Supply

• 2.3V to 5V Digital Supply

• 26.4mW Power Consumption at 500ksps

• 1μAShutdownModeAvailable

● HighlyIntegratedADCSavesCostandSpace

• Internal Reference (±6ppm/°C) and Reference Buffer

• 12-Pin 3mm x 3mm TDFN Package

• Flexible SPI/QSPI™ MICROWIRE®/DSP-Compatible

Serial Interface Saves I/O Pins

● High DC and AC Accuracy Provides Measurement

Over a Wide Dynamic Range

• 16-Bit Resolution with No Missing Codes

• 500ksps (MAX11166)/ 250ksps (MAX11167)

Throughput Rates Without Pipeline Delay/Latency

• 92.6dB SNR at 10kHz

• -105dB THD at 10kHz

• ±0.5 LSB INL (typ)

• ±0.2 LSB DNL (typ)

19-6445; Rev 2; 12/14

Typical Operating Circuit

Selector Guide and Ordering Information appear at end of

data sheet.

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corporation.

EVALUATION KIT AVAILABLE

MAX9632

AGNDS

16-BIT ADC

REF

BUF

CONFIGURATION REGISTER

INTERNAL REFERENCE

AIN+

AIN-

REF

CNVST

GND

REFIO

DOUT

DIN

SCLK

1µF1µF

(5V)

OVDD

(2.3V TO 5V)

INTERFACE

AND CONTROL

HOST

CONTROLLER

±5V

Ω

500pF

10µF

MAX11166

MAX11167

0.1µF

Summary of content (35 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN General Description Benefits and Features The MAX11166/MAX11167 16-bit, 500ksps/250ksps, SAR ADCs offer excellent AC and DC performance with true bipolar input range, small size, and internal reference. The MAX11166/MAX11167 measure a Q5V (10VP-P) input range while operating from a single 5V supply. A patented charge-pump architecture allows direct sampling of highimpedance sources.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Absolute Maximum Ratings VDD to GND.............................................................-0.3V to +6V OVDD to GND........ -0.3V to the lower of (VDD + 0.3V) and +6V AIN+ to GND......................................................................... Q7V AIN-, REF, REFIO, AGNDS to GND................ -0.3V to the lower of (VDD + 0.3V) and +6V SCLK, DIN, DOUT, CNVST to GND................ -0.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Electrical Characteristics (continued) (VDD = 4.75V to 5.25V, VOVDD = 2.3V to 5.25V, fSAMPLE = 500kHz or 250kHz, VREF = 4.096V; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP Negative Full-Scale Error Analog Input CMRR Power-Supply Rejection (Note 5) MAX UNITS ±13 LSB CMRR -77 dB PSR ±3.0 LSB 0.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Electrical Characteristics (continued) (VDD = 4.75V to 5.25V, VOVDD = 2.3V to 5.25V, fSAMPLE = 500kHz or 250kHz, VREF = 4.096V; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SAMPLING DYNAMICS Throughput Sample Rate Transient Response MAX11166 0.01 500 MAX11167 0.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Electrical Characteristics (continued) (VDD = 4.75V to 5.25V, VOVDD = 2.3V to 5.25V, fSAMPLE = 500kHz or 250kHz, VREF = 4.096V; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 MAX11166 toc01 2.0 OFFSET ERROR (mV) 0 0 -0.5 -1.0 -1.0 fSAMPLE = 500ksps VREF = 4.096V VDD = 5.0V VOVDD = 3.3V -40 -15 10 35 60 85 GAIN ERROR (LSB) 0.2 -0.2 -0.2 fSAMPLE = 500ksps VREF = 4.096V VOVDD = 3.3V TA = +25°C -1.0 4.75 4.85 0.2 0 -0.2 0.2 0 -0.1 -0.6 -0.3 -0.8 -0.4 16384 8192 32768 24576 49152 40960 OUTPUT CODE (DECIMAL) www.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 (continued) 0.6 0.2 -0.2 -0.6 -1.0 -1.4 1.0 fSAMPLE = 500ksps VREF = 4.096V VDD = 5.0V VOVDD = 3.3V -40 -15 10 MAX DNL MIN INL MIN DNL 0.6 0.2 -0.2 -0.6 fSAMPLE = 500ksps VREF = 4.096V VOVDD = 3.3V TA = +25°C -1.0 35 60 -1.4 85 4.75 4.85 4.95 5.05 5.15 100k 50k 0 5.25 INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE (REF PIN) 4.09604 MAX11166 toc08 4.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 (continued) -100 -60 -80 -100 50 100 150 200 -140 250 5 7 FREQUENCY (kHz) SIGNAL-TO-NOISE RATIO AND SIGNAL-TO-NOISE AND DISTORTION RATIO vs. TEMPERATURE SNR 93.0 fSAMPLE = 500ksps fIN = 10kHz VIN = -0.1dBFS REF MODE = 3 VREF = 4.096V VVDD = 5.0V VOVDD = 3.3V 92.0 91.5 -40 -15 10 11 13 35 fSAMPLE = 500ksps fIN = 10kHz VIN = -0.1dBFS REF MODE = 3 VREF = 4.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 (continued) MAX11166 toc16 90 fSAMPLE = 500ksps VIN = -0.1dBFS TA = +25°C REF MODE = 3 VREF = 4.096V VDD = 5.0V VOVDD = 3.3V 86 84 1.0 0.1 14.6 fSAMPLE = 500ksps VIN = -0.1dBFS TA = +25°C REF MODE = 3 VREF = 4.096V VDD = 5.0V VOVDD = 3.3V 14.2 13.8 10 13.4 100 0.1 FREQUENCY (kHz) THD vs.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 (continued) 5.0 ANALOG AND DIGITAL SHUTDOWN CURRENT vs. TEMPERATURE 4.0 3.5 3.0 2.5 2.0 1.5 TA = +25°C VDD = 5.0V CDOUT = 65pF 1.0 0.5 2.25 2.75 3.25 3.75 VOVDD (V) www.maximintegrated.com 4.25 4.75 5.25 8 4.85 6 5 4 3 2 VDD = 5.0V VOVDD = 3.3V CDOUT = 65pF 0 -40 -15 10 35 60 85 VDD AND OVDD SHUTDOWN CURRENT vs.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11166 (continued) 1.0 0.5 0 0 fSAMPLE = 250ksps VREF = 4.096V VDD = 5.0V VOVDD = 3.3V -0.5 -40 10 60 85 0.2 0.2 -0.2 -0.2 -1.0 0.5 0.4 0.3 0.1 DNL (LSB) 0.2 0 fSAMPLE = 250ksps VREF = 4.096V VDD = 5.0V VOVDD = 3.3V TA = +25°C -0.8 -1.0 0 4.95 5.05 5.15 5.25 DIFFERENTIAL NONLINEARITY vs. CODE 0.2 -0.6 4.85 INTEGRAL NONLINEARITY vs. CODE 0.4 -0.4 4.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11167 (continued) 0.2 -0.2 -0.6 fSAMPLE = 250ksps VREF = 4.096V VDD = 5.0V VOVDD = 3.3V -1.0 -1.4 -40 -15 10 0.6 0.2 -0.2 -0.6 fSAMPLE = 250ksps VREF = 4.096V VOVDD = 3.3V TA = +25°C -1.0 35 60 -1.4 85 4.75 4.85 4.95 5.05 5.15 50k 4.09604 MAX11166 toc33 4.098 32765 32771 32767 32769 32772 32766 32768 32770 OUTPUT CODE (DECIMAL) INTERNAL REFERENCE VOLTAGE vs.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11167 (continued) -80 -100 -80 -100 50 75 100 -140 125 5.0 7.0 SNR AND SINAD vs. VDD SUPPLY VOLTAGE -102 92.5 92.3 fSAMPLE = 250ksps fIN = 10kHz VIN = -0.1dBFS TA = +25°C REF MODE = 3 VREF = 4.096V VOVDD = 3.3V 92.0 91.8 4.75 4.85 4.95 5.05 VDD (V) www.maximintegrated.com 5.15 5.25 THD (dB) SNR AND SINAD (dB) -100 MAX11166 toc38 SNR SINAD 92.8 91.5 11.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11167 (continued) MAX11166 toc41 90 88 82 1 0.1 14.6 14.2 13.8 10 13.4 100 fSAMPLE = 250ksps VIN = -0.1dBFS TA = +25°C REF MODE = 3 VREF = 4.096V VDD = 5.0V VOVDD = 3.3V 0.1 -90 -95 -100 fSAMPLE = 250ksps VIN = -0.1dBFS TA = +25°C REF MODE = 3 VREF = 4.096V VDD = 5.0V VOVDD = 3.3V -105 -110 10 100 -50 -60 CMRR vs.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Typical Operating Characteristics—MAX11167 (continued) 7 IVDD (mA) 4 5 1.0 -15 10 35 60 2 85 4.75 4.85 4.95 TA = +25°C VDD = 5.0V CDOUT = 65pF 250ksps 10ksps 3.5 3.0 2.5 2.0 1.5 1.0 8 5.15 2.25 2.75 3.25 3.75 VOVDD (V) www.maximintegrated.com 4.25 4.75 5.25 -15 10 35 60 ANALOG AND DIGITAL SHUTDOWN CURRENT vs. TEMPERATURE VDD AND OVDD SHUTDOWN CURRENT vs. SUPPY VOLTAGE VDD = 5.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Pin Configuration TOP VIEW REF 2 VDD 3 AIN+ 4 AIN- 5 GND 6 12 AGNDS + REFIO 1 MAX11166 MAX11167 EP 11 OVDD 10 DIN 9 SCLK 8 DOUT 7 CNVST TDFN Pin Description PIN NAME I/O FUNCTION 1 REFIO I/O External Reference Input/Internal Reference Output. Place a 0.1µF capacitor from REFIO to AGNDS. 2 REF I/O External Reference Input/Reference Buffer Decoupling.
PAGE 17
MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Functional Diagram DIN AIN+ AIN- INTERFACE AND CONTROL 16-BIT ADC MAX11166 MAX11167 AGNDS SCLK DOUT CNVST CONFIGURATION REGISTER CONFIGURATION REGISTER VDD OVDD SW2 SW1 INTERNAL REFERENCE 10kΩ REF BUF GND REF B5 0 0 1 1 B4 0 1 0 1 REFERENCE MODE 0 1 2 3 REFERENCE SWITCH STATE SW2 CLOSED CLOSED OPEN OPEN SW1 CLOSED OPEN CLOSED OPEN REFIO Detailed Description The MAX11166/MAX11167 are 16-bit single-chan
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Overvoltage Input Clamps The MAX11166/MAX11167 include an input clamping circuit that activates when the input voltage at AIN+ is above (VDD + 300mV) or below -(VDD + 300mV). The clamp circuit remains high impedance while the input signal is within the range of Q(VDD + 100mV) and draws little to no current. However, when the input signal exceeds this range the clamps begin to turn on.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Reference Mode 11: The internal bandgap reference source as well as the internal reference buffer are both in a shutdown state. The REF pin is in a high-impedance state. This mode would typically be used when an external reference source and external reference buffer is used to drive all MAX11166/MAX11167 parts in a system. sampling capacitor charges during the acquisition period.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN degraded significantly. It is recommended to insert an external RC filter at the MAX11166/MAX11167 AIN+ input to attenuate out-of-band input noise and preserve the ADCs SNR. The effective RMS noise at the MAX11166/MAX11167 AIN+ input is 64FV, thus additional noise from a buffer circuit should be significantly lower in order to achieve the maximum SNR performance.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Input Configuration Interface Configuring in CS Mode An SPI interface clocked at up to 50MHz controls the MAX11166/MAX11167. Input configuration data is clocked into the configuration register on the falling edge of SCLK through the DIN pin. The data on DIN is used to program the ADC configuration register. The construct of this register is illustrated in Table 4.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN CNVST tHSCKCNF tSSCKCNF SCLK 0 1 2 3 4 tSDINSCK DIN 5 6 7 0 1 2 3 4 5 6 7 B0 B7 B6 B5 B4 B3 B2 B1 B0 tHDINSCK B7 B6 B5 B4 B3 B2 DATA LOADED TO PART B SHIFTED THROUGH PART A B1 DATA LOADED TO PART A Figure 5.
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MAX11166/MAX11167 In all interface modes, it is recommended that the SCLK be idled low to avoid triggering an input configuration write on the falling edge of CNVST. If at anytime the device detects a high SCLK state on a falling edge of CNVST, it will enter the input configuration write mode and will write the state of DIN on the next 8 falling SCLK edges to the input configuration register.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN CS with Busy Indicator Mode A rising edge on CNVST completes the acquisition, initiates the conversion and forces DOUT to high impedance. The conversion continues to completion irrespective of the state of CNVST allowing CNVST to be used as a select line for other devices on the board.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN tCNVPW CNVST tCYC DIN ACQUISITION tCONV tACQ CONVERSION ACQUISITION tSCLK tSSCKCNF tSCLKL tHSCKCNF SCLK 1 2 3 4 15 tDDO DOUT BUSY BIT D15 D14 D13 16 17 tSCLKH tDIS D1 D0 Figure 9. CS With Busy Indicator Mode Timing When the conversion is complete, DOUT transitions from high impedance to a low logic level, signaling to the digital host through the interrupt input that data readback can commence.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Multichannel CS Configuration, Asynchronous or Simultaneous Sampling The multichannel CS configuration is generally used when multiple MAX11166/MAX11167 ADCs are connected to an SPI-compatible digital host. Figure 10 shows the connection diagram example using two MAX11166/MAX11167 devices. Figure 11 shows the corresponding timing. Asynchronous or simultaneous sampling is possible by controlling the CS1 and CS2 edges.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN tCNVPW tCNVPW CNVSTA(CS1) tCYC CNVSTB(CS2) DIN tACQ tCONV ACQUISITION CONVERSION tSSCKCNF ACQUISITION SCLK 1 2 tEN DOUT tSCLK tSCLKL tHSCKCNF 3 15 tDDO D15 D14 16 tSCLKH D13 17 18 19 31 tEN tDIS tDIS D1 D0 D15 32 D14 D13 D1 D0 Figure 11.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN A rising edge on CNVST completes the acquisition and initiates the conversion. Once a conversion is initiated, it continues to completion irrespective of the state of CNVST. When a conversion is complete, the busy indicator is presented onto each DOUT and the MAX11166/MAX11167 return to the acquisition phase. The busy indicator for the last ADC in the chain can be connected to an interrupt input on the digital host.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN CONFIG CONVERT CNVST DIN MAX11166 MAX11167 CNVST DA DOUT DIN CNVST MAX11166 MAX11167 DOUT DB DIN DC MAX11166 DOUT MAX11167 DEVICE A DEVICE B DEVICE C SCLK SCLK SCLK DIGITAL HOST DATA IN IRQ CLK Figure 14.
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MAX11166/MAX11167 In daisy-chain mode, the maximum conversion rate is reduced due to the increased readback time. For instance, with a 6ns or less digital host setup time and 3V interface, up to four MAX11166/MAX11167 devices running at a conversion rate of 217ksps (MAX11167) or 322ksps (MAX11166) can be daisy-chained on a 3-wire port. Layout, Grounding, and Bypassing For best performance, use PCBs with ground planes. Ensure that digital and analog signal lines are separated from each other.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Effective Number of Bits Aperture Delay The effective number of bits (ENOB) indicates the global accuracy of an ADC at a specific input frequency and sampling rate. An ideal ADC’s error consists of quantization noise only. With an input range equal to the full-scale range of the ADC, calculate the ENOB as follows: SINAD − 1.76 ENOB = 6.
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Selector Guide PART BITS INPUT RANGE (V) REFERENCE MAX11160 16 0 to 5 Internal µMAX-10 500 MAX11161 16 0 to 5 Internal µMAX-10 250 MAX11162 16 0 to 5 External µMAX-10 500 MAX11163 16 0 to 5 External µMAX-10 250 MAX11164 16 0 to 5 Internal/External 3mm x 3mm TDFN-12 500 MAX11165 16 0 to 5 Internal/External 3mm x 3mm TDFN-12 250 MAX11166 16 ±5 Internal/External 3mm x 3mm TDFN-1
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MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN Revision History REVISION NUMBER REVISION DATE PAGES CHANGED 0 8/12 Initial release 1 12/12 Released the MAX11166, updated the Electrical Characteristics, Typical Operating Characteristics, Table 2, and the Input Amplifier section 2 12/14 Updated Benefits and Features section DESCRIPTION — 1–9, 11–14, 26 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or v
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MAX11166/MAX11167 www.maximintegrated.
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MAX11166/MAX11167 www.maximintegrated.