Datasheet

12 _____________________________________________________________________________________
MAX11205
16-Bit, Single-Channel, Ultra-Low Power,
Delta-Sigma ADC with 2-Wire Serial Interface
Figure 4. Timing Diagram for Data Read Followed by Sleep Mode Activation; Single-Conversion Timing
Figure 5. Timing Diagram for Sleep Mode Activation Followed by Self-Calibration at Wake-Up
SLEEP
MODE
1 2 1 23
24
CONVERSION IS DONE
DATA IS AVAILABLE
t
9
t
11
t
10
DEVICE ENTERS
SLEEP MODE
DEVICE EXITS OUT
SLEEP MODE
0
RDY/DOUT
D15
D14
D15 D14
SCLK
CONVERSION IS DONE
DATA IS AVAILABLE
SLEEP
MODE
1 2 1 23
24 25 26
CONVERSION IS DONE
DATA IS AVAILABLE
t
12
t
10
DEVICE ENTERS
SLEEP MODE
DEVICE EXITS OUT SLEEP MODE
AND STARTS CALIBRATION
0
RDY/DOUT
D15
D14
D15 D14
SCLK
CONVERSION IS DONE
DATA IS AVAILABLE AFTER CALIBRATION
25TH SCLK PULLS RDY/DOUT HIGH