MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor General Description Features The MAX11359A smart data-acquisition systems (DAS) is based on a 16-bit, sigma-delta analog-to-digital converter (ADC) and system-support functionality for a microprocessor (µP)-based system.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ABSOLUTE MAXIMUM RATINGS Continuous Current Into Any Pin.........................................50mA Continuous Power Dissipation (TA = +70°C) 40-Pin TQFN (derate 25.6mW/°C above +70°C) ....2051.3mW Operating Temperature Range MAX11358_ _CTL+ .............................................0°C to +70°C MAX11358_ _ETL+ ..........................................-40°C to +85°C Junction Temperature ..............
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Long-Term Stability CONDITIONS MIN (Note 9) TYP MAX UNITS ppm/ 1000hrs 35 f = 0.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Power-Supply Rejection Ratio PSRR VAVDD = +1.8V to +3.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN DVDD Monitor Turn-On Time TYP MAX 5 CPOUT Monitor Supply Voltage Range 1.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN DVDD supply voltage 0.7 x VDVDD CPOUT supply voltage 0.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Table 1. Output Noise (Notes 12, 13, and 14) RATE (sps) OUTPUT NOISE (µVRMS) GAIN = 1 GAIN = 2 GAIN = 4 GAIN = 8 10 1.684 1.684 1.684 1.684 40 3.178 3.178 3.178 3.178 50 3.234 3.234 3.234 3.234 60 3.307 3.307 3.307 3.307 200 55.336 55.336 55.336 55.336 240 104.596 104.596 104.596 104.596 400 587.138 587.138 587.138 587.138 512 983.979 983.979 983.979 983.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor TIMING CHARACTERISTICS (Figures 1 and 20) (VAVDD = VAVDD = +1.8V to +3.6V, external VREF = +1.25V, CLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor CS tCSH tCH tCYC tCSH tCSS tCL SCLK tDS tDH DIN tDV tDO tTR DOUT Figure 1. Detailed Serial-Interface Timing DVDD 6kΩ DOUT DOUT 6kΩ CLOAD = 50pF CLOAD = 50pF a) FOR ENABLE, HIGH IMPEDANCE b) FOR ENABLE, HIGH IMPEDANCE TO VOH AND VOL TO VOH TO VOL AND VOH TO VOL FOR DISABLE, VOH TO HIGH IMPEDANCE FOR DISABLE, VOL TO HIGH IMPEDANCE Figure 2.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) VDVDD = 3.0V VDVDD = 1.8V 300 VDVDD = 3.0V 1.5 1.0 VDVDD = 1.8V 0.8 -15 10 35 60 0.6 VDVDD = 1.8V 0.4 0 -40 85 VDVDD = 3.0V 0.2 0 -15 10 35 60 -40 85 -15 10 35 60 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) AVDD SUPPLY CURRENT vs.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) B A 2.3 2.2 CLK = 2.4576MHz 2.1 2.45 FLL ENABLED 2.40 2.35 2.30 2.25 -15 10 35 60 85 REFERENCE OUTPUT VOLTAGE vs. OUTPUT CURRENT 2.1 2.4 3.0 3.3 1.5 A 1.8 2.1 2.4 2.7 3.0 3.3 3.6 VAVDD (V) REFERENCE OUTPUT VOLTAGE vs.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) REFERENCE VOLTAGE OUTPUT NOISE vs. FREQUENCY VREF = 1.25V 10,000 NOISE (nV/√Hz) 50µV/div NOISE (nV/√Hz) 10,000 MAX11359A toc23 REFERENCE VOLTAGE OUTPUT NOISE vs. FREQUENCY MAX11359A toc22 1000 VREF = 2.048V MAX11359A toc24 REFERENCE VOLTAGE OUTPUT NOISE (0.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) 0.10 0 -0.05 0 -0.05 -0.10 -0.10 VAVDD = 2.5V VREF = 2.048V CODE = 3FF hex VAVDD = 1.8V, 3.0V -0.20 200 400 600 800 1000 1.240 0 200 400 600 800 1000 0 OUTPUT CODE SOURCE CURRENT (mA) DAC OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT DAC OUTPUT VOLTAGE vs.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) DAC LARGE-SIGNAL OUTPUT STEP RESPONSE OP-AMP INPUT OFFSET VOLTAGE vs. TEMPERATURE MAX11359A toc40 MAX11359A toc41 7.5 CS 2V/div OUT_ 1V/div INPUT OFFSET VOLTAGE (mV) VCM = 0.5V 7.2 VAVDD = 3.0V 6.9 6.6 VAVDD = 1.8V 6.3 VREF = +1.25V VAVDD = +3.0V 6.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) OP-AMP OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT 1.75 UNITY GAIN, VIN_+ = 0.5V RL = 10kΩ 500.8 1.70 1.65 VAVDD = 3.0V 500.6 500.4 VAVDD = 1.8V 500.2 UNITY GAIN, VIN_+ = VAVDD VAVDD = 1.8V 1.60 500.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) SPDT ON-RESISTANCE vs. TEMPERATURE SPST ON-RESISTANCE vs. TEMPERATURE ICOM = 1mA 42 MAX11359A toc53 100 MAX11359A toc52 45 VAVDD = 1.8V, 3.0V ICOM = 1mA 97 RON (Ω) RON (Ω) 94 39 VAVDD = 3.0V 91 36 88 33 85 VAVDD = 1.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Typical Operating Characteristics (continued) (VDVDD = VAVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) CHARGE-PUMP OUTPUT VOLTAGE vs. OUTPUT CURRENT VOLTAGE SUPERVISOR THRESHOLD vs. TEMPERATURE 0 -0.05 -0.10 3.5 CPOUT VOLTAGE (V) DVDD SUPERVISOR CPOUT SUPERVISOR MAX11359A toc59 0.05 % DEVIATION 3.6 MAX11359A toc58 0.10 3.4 3.3 3.2 -0.15 3.1 -0.20 3.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Pin Description PIN NAME 1 CLK 2 UPIO2 User-Programmable Input/Output 2. See the UPIO2_CTRL Register section for functionality. 3 UPIO3 User-Programmable Input/Output 3. See the UPIO3_CTRL Register section for functionality. 4 UPIO4 User-Programmable Input/Output 4. See the UPIO4_CTRL Register section for functionality. 5 DOUT Serial-Data Output. Data is clocked out on SCLK’s falling edge.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Pin Description (continued) PIN NAME 25 OUTA DACA Force-Sense Output. Analog input to mux. FUNCTION 26 AGND Analog Ground 27 AVDD Analog Supply Voltage. Also ADC reference voltage during AVDD measurement. Bypass to AGND with 10µF and 0.1µF capacitors in parallel as close to the pin as possible. 28 IN2+ Amplifier 2 Noninverting Input 29 IN2- Amplifier 2 Inverting Input. Analog input to mux.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Detailed Description The MAX11359A DAS features a multiplexed differential 16-bit ADC, 10-bit force-sense DACs, an RTC with an alarm, a selectable bandgap voltage reference, a signaldetect comparator, 1.8V and 2.7V voltage monitors, and wake-up control circuitry, all controlled by a 4-wire serial interface (See Figure 3 for the functional diagram). 32.768kHz OSCILLATOR CS SCLK DIN CLK INT 4.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor and dynamic range constraints. The force-sense DAC provides 10-bit resolution for precise sensor applications. The ADC and DACs both utilize a low-drift 1.25V internal bandgap reference for conversions and fullscale range setting. The RTC has a 138-year range and provides an alarm function that can be used to wake up the system or cause an interrupt at a predefined time.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Digital Filtering Force-Sense DAC The MAX11359A contains an on-chip digital lowpass filter that processes the data stream from the modulator using a SINC4 (sinx/x)4 response. The SINC4 filter has a settling time of four output data periods (4 x 200ms). The MAX11359A incorporates a 10-bit force-sensing DAC. The DACs reference voltage sets the full-scale range.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor DVDD LDOE CPE CPOUT 1.22V OP M32K 1.65V REG NONOVERLAP CLOCK GENERATOR CF+ REG CF- LDOE CHARGE-PUMP DOUBLER LINEAR 1.65V VOLTAGE REGULATOR Figure 5. Linear-Regulator Block Diagram Voltage Supervisors The MAX11359A provides voltage supervisors to monitor DVDD and CPOUT. The first supervisor monitors the DVDD supply voltage.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor WDTO DVDD HYSE POR LSDE 1.8VTH ANALOG 2:1 MUX CMP 2.0VTH RSTE RESET CONTROL LOGIC 1.25V LDVD LSDE DVDD (1.8V) VOLTAGE MONITOR Figure 7. DVDD Voltage-Supervisor Block Diagram as the C-002RX32-E from Epson Crystal.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Watchdog Enable the watchdog timer by writing a 1 to the WDE bit in the CLK_CTRL register. After enabling the watchdog timer, the device asserts RESET for 250ms, if the watchdog address register is not written every 500ms. Due to the asynchronous nature of the watchdog timer, the watchdog timeout period varies between 500ms and 750ms. Write a 0 to the WDE bit to disable the watchdog timer.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor 32.768kHz CKSEL2 CKSEL<1:0> HFCE FLLE M32K FREQUENCY COMPARE FREQ ERROR FREQUENCY INTEGRATOR TUNE<8:0> DIGITALLY CONTROLLED OSCILLATOR CLKE 0 2:1 MUX 1, 2, 4, 8 DIVIDER CLK 1 4.9152MHz HFCLK CRDY 4.9152MHz HF OSCILLATOR AND FLL Figure 12.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Two-Current Method For the two-current method, currents I 1 and I 2 are passed through a p-n junction. This requires two VBE measurements. Temperature measurements can be performed using I1 and I2. TMEAS = q(VBE2 − VBE1) ⎛I ⎞ nk ln⎜ 2 ⎟ ⎝ I1 ⎠ where k is Boltzman’s constant and q is the absolute value of the charge on electron.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor TA = g x TMEAS + b where g and b are the gain and offset calibration values, respectively. These calibration values are available for reading from the TEMP_CAL register. Voltage Reference and Buffer An internal 1.25V bandgap reference has a buffer with a selectable 1.0V/V, 1.638V/V, or 2.0V/V gain, resulting in nominally 1.25V, 2.048V, or 2.5V reference voltage at REF.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor CS SCLK X DIN 1 0 A5 A4 A3 A2 A1 A0 DN DN -1 DN-2 DN-3 D2 D1 D0 X DOUT X = DON’T CARE. Figure 14. Serial-Interface Register Write with 8-Bit Control Word, Followed by a Variable Length Data Write CS SCLK X DIN 1 1 A5 A4 A3 A2 A1 A0 DOUT X X X X X X X DN DN-1 DN-2 DN-3 D2 D1 D0 X X = DON’T CARE. Figure 15.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Register Definitions Table 4.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Register Bit Descriptions ADC Register (Power-On State: 0000 0000 0000 00XX) MSB ADCE LSB STRT BIP RATE<2:0> The ADC register configures the ADC and starts a conversion. ADCE: ADC power-enable bit. ADCE = 1 powers up the ADC, and ADCE = 0 powers down the ADC. STRT: ADC start bit. STRT = 1 resets the registers inside the ADC filter and initiates a conversion or calibration.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Table 6a. Setting the ADC Conversion Rate* CONTINUOUS CONVERSION RATE (sps) SINGLE CONVERSION RATE (sps) RATE2 RATE1 RATE0 10 2.5 0 0 0 40 10 0 0 1 50 12.5 0 1 0 60 15 0 1 1 200 50 1 0 0 240 60 1 0 1 400 100 1 1 0 512 128 1 1 1 Table 6b. Actual ADC Conversion Rates NOMINAL CONTINUOUS CONVERSION RATE (sps) 10 1096 ACTUAL CONTINUOUS CONVERSION RATE (sps) 10.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor MUX Register (Power-On State: 0000 0000) MSB S (ADR0) LSB MUXP3 MUXP2 MUXP1 MUXP0 The MUX register configures the positive and negative mux inputs and can start an ADC conversion. S (ADR0): Conversion start bit. The S bit is the LSB of the MUX register address byte. S = 1 resets the registers inside the ADC filter and initiates a conversion or calibration.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor DATA Register (Power-On State: 0000 0000 0000 0000) MSB ADC15 ADC14 ADC13 ADC12 ADC11 ADC10 ADC9 ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC8 LSB ADC<15:0> Analog-to-digital conversion data bits. These 16 bits are the results from the most recently completed conversion. The data format is unsigned; ADC0 binary for unipolar mode, and two’s complement for bipolar mode.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor DACA_OP Register (Power-On State: 000X XX00 0000 0000) MSB DAE DBE OP1E X X X DACA9 DACA8 DACA7 DACA6 DACA5 DACA4 DACA3 DACA2 DACA1 DACA0 LSB DACA_OP Register Writing to the DACA_OP output register updates DACA on the rising SCLK edge of the LSB data bit. The output voltage can be calculated as follows: VOUTA = VREF x N/210 where: VREF is the reference voltage for the DAC.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor AON: ADC and DAC/op-amp power-on bit. This bit provides a method of turning on several analog functions with a single write. Setting AON = 1 asserts the ADCE bit in the ADC register and DAE/OP3E, OP2E, and OP1E bits in the DACA_OP register, powering up these blocks. Setting AON = 0 has no effect. The AON bit has priority when both AON and AOFF bits are asserted. TSEL<2:0>: Threshold-select bits.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor CLK_CTRL Register (Power-On State: 00X0 1111 0010 1110) MSB AWE ADE X RWE RTCE OSCE FLLE HFCE CKSEL2 CKSEL1 CKSEL0 IO32E CK32E CLKE INTP WDE LSB The CLK_CTR register contains the control bits for the RTC alarms and clocks. AWE: Alarm write-enable bit. Set AWE = 1 to write data to the AL_DAY register as well as the ADE bit in this register.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor HFCE: High-frequency-clock enable bit. Set HFCE = 1 to enable the internal high-frequency clock source, and set HFCE = 0 to disable the high-frequency clock source. If HFCE = 1 and CLKE = 1, the internal high-frequency oscillator is enabled and is present at CLK. The poweron default state is 1. CKSEL<2:0>: Clock selection bits.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor RTC Register (Power-On State: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000) MSB SEC31 SEC30 SEC29 SEC28 SEC27 SEC26 SEC25 SEC24 SEC23 SEC22 SEC21 SEC20 SEC19 SEC18 SEC17 SEC16 SEC15 SEC14 SEC13 SEC12 SEC11 SEC10 SEC9 SEC8 SEC7 SEC6 SEC5 SEC4 SEC3 SEC2 SEC1 SEC0 LSB SUB7 SUB6 SUB5 SUB4 The RTC register stores the 40-bit second and subsecond count of the respective tim
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor PWM_CTRL Register (Power-On State: 0000 0000 00XX XXXX) MSB PWME FSEL2 FSEL1 FSEL0 SWAH SWAL X X LSB SPD1 SPD2 X X The PWM_CTRL register contains control bits for the 8bit PWM. PWME: PWM-enable bit. Set PWME = 1 to enable the internal PWM, and set PWME = 0 to disable the internal PWM. Enable the high-frequency clock before enabling the PWM when using input clock frequencies above 32.768kHz.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor PWM_THTP Register (Power-On State: 0000 0000 0000 0000) MSB PWMTH7 PWMTH6 PWMTH5 PWMTH4 PWMTH3 PWMTH2 PWMTH1 PWMTH0 PWMTP7 PWMTP6 PWMTP5 PWMTP4 PWMTP3 PWMTP2 PWMTP1 PWMTP0 LSB The PWM_THTP register contains the bits that set the PWM on-time and period. PWMTH<7:0>: PWM time high bits.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Table 15.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor SLEEP_CFG Register (Power-On State: 1100 XXXX) MSB SLP (ADR0) LSB SOSCE SCK32E SPWME SHDN The SLEEP_CFG register allows users to program specific behavior for the 32kHz oscillator, buffer, and PWM in sleep mode. It also contains a sleep-control bit (SLP) to enable sleep mode. SLP (ADR0): Sleep bit. The SLP bit is the LSB in the SLEEP_CFG address control byte.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor UPIO4_CTRL Register (Power-On State: 0000 1000) MSB UP4MD3 LSB UP4MD2 UP4MD1 UP4MD0 UPIO4_CTRL register. This register configures the UPIO4 pin functionality. UP4MD<3:0>: UPIO4-mode selection bits. These bits configure the mode for the UPIO4 pin. See Table 16 for a detailed description. The power-on default is 0 hex. PUP4: Pullup UPIO4 control bit.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor UPIO2_CTRL Register (Power-On State: 0000 1000) MSB UP2MD3 LSB UP2MD2 UP2MD1 UP2MD0 UPIO2_CTRL register. This register configures the UPIO2 pin functionality. UP2MD<3:0>: UPIO2-mode selection bits. These bits configure the mode for the UPIO2 pin. See Table 16 for a detailed description. The power-on default is 0 hex. PUP2: Pullup UPIO2 control bit.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Table 16. UPIO Mode Configuration UP4MD<3:0>, UP3MD<3:0>, UP2MD<3:0>, UP1MD<3:0> MODE MAX11359A DESCRIPTION 0 0 0 0 GPI General-purpose digital input. Active edges detected by UPR_ or UPF_ status register bits. ALH_ has no effect with this setting. 0 0 0 1 GPO General-purpose digital output. Logic level set by LL_ bit. ALH_ has no effect with this setting.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor UPIO_SPI Register (Power-On State: 0000 XXXX) MSB LSB UP4S UP3S UP2S UP1S X UPIO_SPI pass-through control register. These bits map the serial interface signals to the UPIO pins, allowing the DAS to drive other devices at CPOUT or DVDD voltage levels, depending on the SV_ bit setting found in the UPIO_CTRL register.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor SW_CTRL Register (Power-On State: 0000 00XX) MSB SWA LSB X SPDT11 SPDT10 The switch-control register controls the two SPDT switches (SPDT1 and SPDT2) and the DACA output buffer SPST switch (SWA). Control this switch by the serial bits in this register, by any of the UPIO pins that are enabled for that function, or by the PWM. SWA: DACA output buffer SPST-switch A control bit.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor TEMP_CTRL Register (Power-On State: 0000 XXXX) MSB IMUX1 LSB IMUX0 IVAL1 IVAL0 X X X X The temperature-sensor control register controls the internal and external temperature measurement. IMUX<1:0>: Internal current-source MUX bits. Selects the pin to be driven by the internal current sources as shown in Table 20. The power-on default is 00. IVAL<1:0>: Internal current-source value bits.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor IMSK Register (Power-On State: 1111 011X 1111 1111) MSB MLDVD MLCPD MADO MSDC MCRDY MADD MALD X LSB MUPR4 MUPR3 MUPR2 MUPR1 The IMSK register determines which bits of the STATUS register generate an interrupt on INT. The bits in this register do not mask output signals routed to UPIO since the output signals are masked by disabling that UPIO function. MLDVD: LDVD status bit mask.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor hysteresis helps eliminate chatter when running directly off unregulated batteries. If DVDD falls below +1.3V (typ), the power-on reset circuitry is enabled and the HYSE bit is deasserted setting the hysteresis back to +20mV. The power-on default is 0. RSTE: RESET output enable bit. Set RSTE = 1 to enable RESET to be controlled by the +1.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor ALD: Alarm (day) status bit. ALD = 1 when the value programmed in ASEC<19:0> in the AL_DAY register matches SEC<19:0> in the RTC register. Clear the ALD bit by reading the STATUS register or by disabling the day alarm (ADE = 0). The power-on default is 0. UPR<4:1>: User-programmable I/O rising-edge status bits. UPR_ = 1 indicates a rising edge on the respective UPIO_ pin has occurred.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor 2 AVDD INITIAL POWER, WAKE-UP, AND SLEEP XTAL B/W 32KIN AND 32KOUT PIN 1.8V 1 0V 2 DVDD 1.8V 1 0V POR HI LO OSCE = 1 SOSCE = 1 OSCE = 1 XIN, XOUT HI (32kHz) LO CK32E = 1 RESET HI (OPEN-DRAIN) LO INTERNAL EXTERNAL OUTPUT DISABLED, BUT PULLED LOW HI INTERNAL LOW DVDD DETECTOR LO CK32E = 1 SCK32E = 0 BUFFER DISABLED HI CK32K (32kHz) LO OUTPUT ENABLED UPIO(WU) HI (INT.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor VREF/GAIN 1111 1111 1111 1111 VREF/GAIN VREF/GAIN 0111 1111 1111 1111 FULL-SCALE TRANSITION 1111 1111 1111 1110 1111 1111 1111 1101 VREF/GAIN 0111 1111 1111 1110 1 LSB = VREF x2 (GAIN x 65,536) 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 VREF/GAIN VREF/GAIN BINARY OUTPUT CODE VREF 1 LSB = (GAIN x 65,536) BINARY OUTPUT CODE 0111 1111 1111 1101 1111 1111 1111 1100 0000 0000 00
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor VREF R1 R2 +3.3V FB_ MAX11359A FBA 10kΩ VOUT DAC_ 10kΩ OUT_ OUTA DAC A -3.3V R2 = R1 VREF = 1.25V MAX11359A Figure 24. DAC Bipolar Output Circuit VREF = 1.25V Figure 23. DAC Unipolar Rail-to-Rail Output Circuit Power Supplies AVDD and DVDD provide power to the MAX11359A. The AVDD powers up the analog section, while the DVDD powers up the digital section.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Clocking with a CMOS Signal A CMOS signal can be used to drive 32KIN if it is divided down. Figure 25 is an example circuit, which works well. directly across the external transimpedance resistor, RF, eliminating any errors due to voltages drifting over time, temperature, or supply voltage. Input Multiplexer Temperature Measurement with Two Remote Sensors The mux inputs can range between AGND to AVDD.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor VCP SERIAL-PORT INTERFACE TXD RXD VSS VSS µC VBAT EEPROM VSS MOSI SI MISO SO SCK SCK CS1 CS VCC GND VSS MAX11359A VCP BDOUT UPIO2 DIN LCD MODULE BDIN UPIO1 BSCLK UPIO3 DOUT BCS2 UPIO4 SCLK CS2 MEM UP DOWN INPUT RESET INPUT INPUT INPUT X2IN 32KIN CS2 VSS CS IN2- RESET IN2+ INT HIGH-FREQUENCY MICRO CLOCK 32kHz MICRO CLOCK CLK IN1- CLK32K VSS VBAT VDD OUT2 AVDD IN1+
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor The calibration works as follows: ADC = (RAW - OFFSET) x Gain x PGA where ADC is the conversion result in the DATA register, RAW is the output of the decimation filter internal to the MAX11359A, OFFSET is the value stored in the OFFSET CAL register, Gain is the value stored in the GAIN CAL register, and PGA is the selected PGA gain found in the ADC register as GAIN<1:0>.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor AIN1 MUX PGA 16-BIT ADC REF AGND 2N3904 AV = 1, 2, 4, 8 AIN2 MAX11359A MUX AGND AV = 1, 1.638, 2 2N3904 TEMP SENSOR 1.25V REF CREF REF Figure 28. Temperature Measurement with Two Remote Sensors VIN+ IN1+ OUT1 VOUT IN1R3 SNO1 SCM1 IN2+ R2 INL R1 Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX11359A DVDD CPOUT SV_ CPOUT MUX 100kΩ UPIO_ PWM 200kΩ 0.01µF EN_ µC (1.8V TO 2.6V) 100kΩ SEG ALH_ LCD DRIVERS 100kΩ n LCD COM m 100kΩ Figure 30. LCD Contrast-Adjustment Application Common-Mode Rejection Common-mode rejection (CMR) is the ability of a device to reject a signal that is common to both input terminals.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor VDD AVDD DVDD MAX11359A DVDD CPOUT < 10µA MUX VBATT 10MΩ VDD VOUT VIN SV_ 100µF POWER SUPPLY µC UPIO_ PWM SHDN PSCTL ON-TIME <100ms TYP 10s PERIOD TYP PSCTL EN_ +3.3V VDD +2.3V ALH_ Figure 32. Power-Supply Sleep-Mode Duty-Cycle Control DVDD CPOUT MAX11359A SV_ MUX CPOUT(+3.2V) 0V UPIO_ 1kHz TO 8kHz TYP 1kΩ PWM ~10,000pF ALH_ Figure 33.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor DVDD CPOUT MAX11359A CPOUT(+3.2V) MUX SV_ 0V UPIO_ PWM 1kHz TO 8kHz TYP 1kΩ ~10,000pF ALH_ DVDD CPOUT SV_ CPOUT + 6.4V DIFF -CPOUT MUX UPIO_ 1kΩ CPOUT(~+3.2V) 0V 1kHz TO 8kHz TYP ALH_ Figure 34. Differential Piezoelectric Buzzer Drive Chip Information PROCESS: BiCMOS 66 Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.
MAX11359A 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor Revision History REVISION NUMBER REVISION DATE 0 5/09 1 1/12 DESCRIPTION Initial release PAGES CHANGED — Updated package information and style updates. 1–10, 12–29, 31, 32, 35, 45, 46, 48–51, 54-61, 64–66 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied.
