Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External uMAX 10

General Description

The MAX1162 low-power, 16-bit analog-to-digital con-

verter (ADC) features a successive-approximation ADC,

automatic power-down, fast 1.1µs wakeup, and a high-

speed SPI™/QSPI™/MICROWIRE™-compatible inter-

face. The MAX1162 operates with a single +5V analog

supply and features a separate digital supply, allowing

direct interfacing with +2.7V to +5.25V digital logic.

At the maximum sampling rate of 200ksps, the

MAX1162 consumes typically 2.75mA. Power con-

sumption is typically 13.75mA (AV

= DV

= +5V) at

a 200ksps (max) sampling rate. AutoShutdown™

reduces supply current to 140µA at 10ksps and to less

than 10µA at reduced sampling rates.

Excellent dynamic performance and low power, com-

bined with ease of use and small package size (10-pin

µMAX

and 10-pin DFN) make the MAX1162 ideal for

battery-powered and data-acquisition applications or

for other circuits with demanding power consumption

and space requirements.

Applications

Motor Control

Industrial Process Control

Industrial I/O Modules

Data-Acquisition Systems

Thermocouple Measurements

Accelerometer Measurements

Portable- and Battery-Powered Equipment

Features

o 16-Bit Resolution, No Missing Codes

o +5V Single-Supply Operation

o Adjustable Logic Level (+2.7V to +5.25V)

o Input-Voltage Range: 0 to V

REF

o Internal Track/Hold, 4MHz Input Bandwidth

o SPI/QSPI/MICROWIRE-Compatible Serial Interface

o Small 10-Pin µMAX or 10-Pin DFN Package

o Low Power

2.75mA at 200ksps

140µA at 10ksps

0.1µA in Power-Down Mode

MAX1162

16-Bit, +5V, 200ksps ADC with 10µA

Shutdown

________________________________________________________________

Maxim Integrated Products

AIN

AGND

DGNDCS

AGND

REF

MAX1162

µMAX/DFN

TOP VIEW

DOUTSCLK

Pin Configuration

Ordering Information

19-2525; Rev 1; 4/10

Functional Diagram appears at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

PART

TEMP

RANGE

PIN-

PACKAGE

INL

(LSB)

MAX1162BCUB+ 0°C to +70°C 10 µMAX ±2

MAX1162BC_B* 0°C to +70°C 10 DFN ±2

MAX1162CCUB+ 0°C to +70°C 10 µMAX ±4

MAX1162CC_B* 0°C to +70°C 10 DFN ±4

MAX1162BEUB+ -40°C to +85°C 10 µMAX ±2.5

MAX1162BE_B* -40°C to +85°C 10 DFN ±2.5

MAX1162CEUB+ -40°C to +85°C 10 µMAX ±4

MAX1162CE_B* -40°C to +85°C 10 DFN ±4

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

AutoShutdown is a trademark of Maxim Integrated Products, Inc.

µMAX is a registered trademark of Maxim Integrated Products, Inc.

Future product—contact factory for DFN package availability.

Denotes a lead(Pb)-free/RoHS-compliant package.

EVALUATION KIT

AVAILABLE

Summary of content (18 pages)

PAGE 1
9-2525; Rev 1; 4/10 KIT ATION EVALU E L B AVAILA 16-Bit, +5V, 200ksps ADC with 10µA Shutdown Features The MAX1162 low-power, 16-bit analog-to-digital converter (ADC) features a successive-approximation ADC, automatic power-down, fast 1.1µs wakeup, and a highspeed SPI™/QSPI™/MICROWIRE™-compatible interface. The MAX1162 operates with a single +5V analog supply and features a separate digital supply, allowing direct interfacing with +2.7V to +5.25V digital logic.
PAGE 2
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown ABSOLUTE MAXIMUM RATINGS AVDD to AGND .........................................................-0.3V to +6V DVDD to DGND.........................................................-0.3V to +6V DGND to AGND.....................................................-0.3V to +0.3V AIN, REF to AGND ...................................-0.3V to (AVDD + 0.3V) SCLK, CS to DGND ..................................................-0.3V to +6V DOUT to DGND .....................
PAGE 3
16-Bit, +5V, 200ksps ADC with 10µA Shutdown (AVDD = DVDD = +4.75V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF = +4.096V, CREF = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SINAD 86 89.5 dB SNR 87 90 dB 92 103 dB DYNAMIC SPECIFICATIONS (1kHz sine wave, 4.
PAGE 4
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +4.75V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF = +4.096V, CREF = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Analog Supply AVDD 4.75 5.25 V Digital Supply DVDD 2.7 5.
PAGE 5
16-Bit, +5V, 200ksps ADC with 10µA Shutdown (AVDD = +4.75V to +5.25V, DVDD = +2.7V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF = +4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX tACQ SCLK to DOUT Valid tDO CDOUT = 50pF 100 ns CS Fall to DOUT Enable tDV CDOUT = 50pF 100 ns tTR CDOUT = 50pF CS Rise to DOUT Disable 1.
PAGE 6
Typical Operating Characteristics (continued) (AVDD = DVDD = +5V, fSCLK = 4.8MHz, CLOAD = 50pF, CREF = 4.7µF, VREF = +4.096V, TA = +25°C, unless otherwise noted.) 90 70 50 40 30 THD (dB) SFDR (dB) 80 60 70 60 50 40 20 10 0 10 0 0.1 1 -120 0.1 100 10 1 0.1 100 10 10 100 FREQUENCY (kHz) FREQUENCY (kHz) SUPPLY CURRENT vs. CONVERSION RATE SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT (mA) 0.01 2.5 2.0 1.5 1.0 0.5 0.1 1 10 100 1000 2.5 2.0 1.5 1.
PAGE 7
16-Bit, +5V, 200ksps ADC with 10µA Shutdown OFFSET ERROR vs. ANALOG SUPPLY VOLTAGE 800 600 OFFSET ERROR (µV) 600 400 200 0 -200 400 200 0 -200 -400 -400 -600 -600 -800 -800 -1000 -1000 4.75 4.85 4.95 5.05 5.15 MAX1162 toc13 800 OFFSET ERROR (µV) OFFSET ERROR VS. TEMPERATURE 1000 MAX1162 toc12 1000 -40 5.25 -15 GAIN ERROR vs. ANALOG SUPPLY VOLTAGE 35 60 85 GAIN ERROR vs. TEMPERATURE 0.015 MAX1162 toc15 0.020 MAX1162 toc14 0.020 0.015 0.010 GAIN ERROR (%) 0.
PAGE 8
16-Bit, +5V, 200ksps ADC with 10µA Shutdown MAX1162 Pin Description PIN NAME FUNCTION 1 REF 2 AVDD Analog +5V Supply Voltage. Bypass to AGND (pin 3) with a 0.1µF capacitor. 3, 9 AGND Analog Ground. Connect pins 3 and 9 together. Place star ground at pin 3. 4 CS Active-Low Chip-Select Input. Forcing CS high places the MAX1162 in shutdown with a typical current of 0.1µA. A high-to-low transition on CS activates normal operating mode and initiates a conversion. 5 SCLK Serial Clock Input.
PAGE 9
16-Bit, +5V, 200ksps ADC with 10µA Shutdown 1mA 1mA DOUT DOUT DOUT 1mA CLOAD = 50pF CLOAD = 50pF CLOAD = 50pF DGND DGND a) VOL TO VOH DOUT 1mA CLOAD = 50pF DGND MAX1162 VDD VDD DGND a) VOH TO HIGH-Z b) HIGH-Z TO VOL AND VOH TO VOL Figure 1. Load Circuits for DOUT Enable Time and SCLK to DOUT Delay Time b) VOL TO HIGH-Z Figure 2. Load Circuits for DOUT Disable Time CS tCSW tCSS tCH tCL tCSH SCLK tCP tDV tDO tTR DOUT TIMING NOT TO SCALE. Figure 3.
PAGE 10
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown Digital Interface Initialization after Power-Up and Starting a Conversion REF The digital interface consists of two inputs, SCLK and CS, and one output, DOUT. A logic high on CS places the MAX1162 in shutdown (AutoShutdown) and places DOUT in a high-impedance state. A logic low on CS places the MAX1162 in the fully powered mode. To start a conversion, pull CS low. A falling edge on CS initiates an acquisition.
PAGE 11
16-Bit, +5V, 200ksps ADC with 10µA Shutdown MAX1162 COMPLETE CONVERSION SEQUENCE CS DOUT CONVERSION 0 POWERED UP CONVERSION 1 POWERED DOWN POWERED UP TIMING NOT TO SCALE. Figure 7. Shutdown Sequence Output Coding and Transfer Function The data output from the MAX1162 is binary and Figure 8 depicts the nominal transfer function. Code transitions occur halfway between successive-integer LSB values (VREF = 4.096V and 1LSB = 63µV or 4.096V/65536). OUTPUT CODE FULL-SCALE TRANSITION 11 . . . 111 11 . .
PAGE 12
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown IN1 IN2 A0 A1 4-TO-1 MUX MAX1162 IN3 AIN OUT IN4 CS CLK ACQUISITION CONVERSION CS A0 A1 TIMING NOT TO SCALE. CHANGE MUX INPUT HERE Figure 9. Change Multiplexer Input Near Beginning of Conversion to Allow Time for Slewing and Settling quency band of interest. Minimize noise by presenting a low impedance (at the frequencies contained in the noise signal) at the inputs.
PAGE 13
16-Bit, +5V, 200ksps ADC with 10µA Shutdown I/O SCK MISO When using the SPI (Figure 10a) or MICROWIRE (Figure 10b) interfaces, set CPOL = 0 and CPHA = 0. Conversion begins with a falling edge on CS (Figure 10c). Three consecutive 8-bit readings are necessary to obtain the entire 16-bit result from the ADC. DOUT data transitions on the serial clock’s falling edge. The first 8-bit data stream contains all leading zeros. The second 8-bit data stream contains the MSB through D8.
PAGE 14
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown CS CS SCK QSPI SCLK MISO DOUT VDD MAX1162 SS Figure 11a. QSPI Connections 1 SCLK CS 4 6 8 END OF ACQUISITION DOUT* 12 D15 D14 D13 D12 16 D11 D10 D9 D8 24 20 D7 D6 D5 D4 D3 D2 D1 MSB *WHEN CS IS HIGH, DOUT = HIGH-Z D0 HIGH-Z LSB Figure 11b. QSPI Interface Timing Sequence (CPOL = CPHA = 0) PIC16 with SSP Module and PIC17 Interface VDD VDD SCLK SCK DOUT SDI CS I/O PIC16/17 MAX1162 GND Figure 12a.
PAGE 15
16-Bit, +5V, 200ksps ADC with 10µA Shutdown MAX1162 Table 2. Detailed SSPSTAT Register Contents MAX1162 SETTINGS CONTROL BIT SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPSTAT) SMP BIT7 0 SPI Data Input Sample Phase. Input data is sampled at the middle of the data output time. CKE BIT6 1 SPI Clock Edge Select Bit. Data is transmitted on the rising edge of the serial clock.
PAGE 16
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown ENOB = (SINAD - 1.76) / 6.02 ENOB vs. INPUT FREQUENCY Figure 13 shows the effective number of bits as a function of the MAX1162’s input frequency. 16 14 Total Harmonic Distortion EFFECTIVE BITS 12 Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself. This is expressed as: 10 8 6 ⎡ V22 + V32 + V4 2 + V52 THD = 20 × log⎢⎢ V1 ⎢⎣ 4 2 0 0.
PAGE 17
16-Bit, +5V, 200ksps ADC with 10µA Shutdown • Apply AGND before DGND. • Apply AIN and REF after AVDD and AGND are present. • DVDD is independent of the supply sequencing. Ensure that digital return currents do not pass through the analog ground and that return-current paths are low impedance. A 5mA current flowing through a PC board ground trace impedance of only 0.05Ω creates an error voltage of about 250µV, 4LSB error with a +4V fullscale system.
PAGE 18
MAX1162 16-Bit, +5V, 200ksps ADC with 10µA Shutdown Revision History REVISION NUMBER REVISION DATE 0 7/02 Initial release 1 4/10 Changed analog supply current and added lead-free information DESCRIPTION PAGES CHANGED — 1, 3, 5 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.