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MAX1169

58.6ksps, 16-Bit,

2-Wire Serial ADC in a 14-Pin TSSOP

________________________________________________________________

Maxim Integrated Products

19-2654; Rev 2; 12/10

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

General Description

The MAX1169 is a low-power, 16-bit successive-

approximation analog-to-digital converter (ADC). The

device features automatic power-down, an on-chip

4MHz clock, a +4.096V internal reference, and an

C-compatible 2-wire serial interface capable of both

fast and high-speed modes.

The MAX1169 operates from a single supply and con-

sumes 5mW at the maximum conversion rate of

58.6ksps. AutoShutdown™ powers down the device

between conversions, reducing supply current to less

than 50µA at a 1ksps throughput rate. The option of a

separate digital supply voltage allows direct interfacing

with +2.7V to +5.5V digital logic.

The MAX1169 performs a unipolar conversion on its

single analog input using its internal 4MHz clock. The

full-scale analog input range is determined by the inter-

nal reference or by an externally applied reference volt-

age ranging from 1V to V

The four address select inputs (ADD0 to ADD3) allow

up to 16 MAX1169 devices on the same bus.

The MAX1169 is packaged in a 14-pin TSSOP and

operates over an extended temperature range. Refer to

the MAX1069 data sheet for a 14-bit device in a pin-

compatible package.

Applications

Hand-Held Portable Applications

Medical Instruments

Battery-Powered Test Equipment

Solar-Powered Remote Systems

Received-Signal-Strength Indicators

System Supervision

Features

o High-Speed I

C-Compatible Serial Interface

400kHz Fast Mode

1.7MHz High-Speed Mode

o +4.75V to +5.25V Single Supply

o +2.7V to +5.5V Adjustable Logic Level

o Internal +4.096V Reference

o External Reference: 1V to V

o Internal 4MHz Conversion Clock

o 58.6ksps Sampling Rate

o AutoShutdown Between Conversions

o Low Power

5.0mW at 58.6ksps

4.2mW at 50ksps

2.0mW at 10ksps

0.23mW at 1ksps

3µW in Shutdown

o Small 14-Pin TSSOP Package

Ordering Information

PART TEMP RANGE

PIN-

PACKAGE

INL

(LSB)

MAX1169BEUD+ -40°C to +85°C 14 TSSOP ±2

ADD3

REF

REFADJ

AGNDSADD2

SDA

SCL

DGND

TOP VIEW

MAX1169

AIN

AGND

AVDDDVDD

ADD0

ADD1

TSSOP

Pin Configuration

AutoShutdown is a trademark of Maxim Integrated Products, Inc.

Denotes a lead(Pb)-free/RoHS-compliant package.

EVALUATION KIT

AVAILABLE

Summary of content (20 pages)

PAGE 1
9-2654; Rev 2; 12/10 KIT ATION EVALU E L B A AVAIL 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP Features The MAX1169 is a low-power, 16-bit successiveapproximation analog-to-digital converter (ADC). The device features automatic power-down, an on-chip 4MHz clock, a +4.096V internal reference, and an I2C-compatible 2-wire serial interface capable of both fast and high-speed modes. o High-Speed Serial Interface 400kHz Fast Mode 1.
PAGE 2
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP ABSOLUTE MAXIMUM RATINGS AVDD to AGND.........................................................-0.3V to +6V DVDD to DGND ........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AGNDS to AGND...................................................-0.3V to +0.3V AIN, REF, REFADJ to AGND ..................-0.3V to (VAVDD + 0.3V) SCL, SDA, ADD_ to DGND............
PAGE 3
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP (VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to +5.5V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP ELECTRICAL CHARACTERISTICS (continued) (VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to +5.5V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
8.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP (VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to +5.5V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.
PAGE 6
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP ELECTRICAL CHARACTERISTICS (continued) (VAVDD = +4.75V to +5.25V, VDVDD = +2.7V to +5.5V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 7
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP 1.73 VDVDD = 3V 820 500 800 790 TA = +85°C TA = +70°C TA = +25°C TA = 0°C TA = -40°C 1.67 1.65 IAVDD (nA) IAVDD (μA) 1.69 TA = +85°C TA = +70°C TA = +25°C TA = 0°C TA = -40°C 780 770 1.63 400 300 4.95 5.05 5.15 5.25 100 0 4.75 4.85 VAVDD (V) 4.95 5.05 5.15 4.85 4.95 240 5.15 5.25 DIGITAL SHUTDOWN CURRENT vs. DIGITAL SUPPLY VOLTAGE 350 MAX1169 toc04 VAVDD = 5V 5.05 VAVDD (V) VAVDD (V) 280 260 4.75 5.
PAGE 8
Typical Operating Characteristics (continued) (VDVDD = +3.0V, VAVDD = +5.0V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10μF, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. CONVERSION RATE (HIGH-SPEED MODE, EXTERNAL REFERENCE) SUPPLY CURRENT vs.
PAGE 9
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP INTERNAL REFERENCE VOLTAGE vs. REF LOAD INTERNAL +4.096V REFERENCE VOLTAGE vs. ANALOG SUPPLY VOLTAGE TA = +85°C 4.090 TA = +70°C MAX1169 toc13 VDVDD = 3V 4.095 4.20 MAX1169 toc12 4.100 fSCL = 0 INTERNAL REFERENCE MODE LOAD APPLIED TO REF 4.15 VREF (V) VREF (V) 4.10 TA = +25°C 4.05 4.085 TA = 0°C 4.00 4.080 3.95 TA = -40°C 3.90 4.075 4.85 4.95 5.05 5.15 1 2 3 4 5 6 VAVDD (V) IREF (mA) EXTERNAL REFERENCE CURRENT vs.
PAGE 10
Typical Operating Characteristics (continued) (VDVDD = +3.0V, VAVDD = +5.0V, fSCL = 1.7MHz (33% duty cycle), fSAMPLE = 58.6ksps, VREF = +4.096V, external reference applied to REF, REFADJ = AVDD, CREF = 10μF, TA = +25°C, unless otherwise noted.) SPURIOUS-FREE DYNAMIC RANGE vs. FREQUENCY 100 100 1.5 90 80 70 60 50 70 60 50 40 30 40 30 20 10 0 20 10 0 10 -2.0 -2.5 10 100 0 16,384 32,768 FREQUENCY (kHz) DIGITAL OUTPUT CODE TOTAL HARMONIC DISTORTION vs. FREQUENCY SINAD vs.
PAGE 11
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP PIN NAME 1 DGND FUNCTION Digital Ground 2 SCL 3 SDA Clock Input 4 ADD2 Address Select Input 2 5 ADD1 Address Select Input 1 6 ADD0 Address Select Input 0 7 DVDD Digital Power Input. Bypass to DGND with a 0.1μF capacitor. Data Input/Output 8 AVDD Analog Power Input. Bypass to AGND with a 0.1μF capacitor. 9 AGND Analog Ground 10 AIN 11 AGNDS Analog Signal Ground. Negative reference for analog input. Connect to AGND.
PAGE 12
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP 6 5 4 14 3 2 CONTROL LOGIC AVDD AGND AIN AGNDS 8 7 DVDD 1 DGND 4MHz INTERNAL OSCILLATOR 9 ADD0 ADD1 ADD2 ADD3 SDA SCL CLOCK 10 T/H 11 IN OUTPUT SHIFT REGISTER SAR ADC OUT REF AV = 1.0 5kΩ +4.096V REFERENCE MAX1169 12 REFADJ 13 REF Figure 3. MAX1169 Simplified Functional Diagram 5.0V 8 0.1μF 13 REF 10μF 12 μC 3.0V 7 DVDD 6 ADD0 5 ADD1 4 ADD2 SDA 3 2 SCL AVDD REFADJ VDD 0.1μF RP RP SDA SCL 0.
PAGE 13
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP To improve the input-signal bandwidth under AC conditions, drive AIN with a wideband buffer (>4MHz) that can drive the ADC’s input capacitance and settle quickly (see the Input Buffer section). An RC filter at AIN reduces the input track-and-hold switching transient by providing charge for CT/H. Analog Input Bandwidth The MAX1169 features input-tracking circuitry with a 4MHz small-signal bandwidth.
PAGE 14
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP S Sr P SDA SCL Figure 7. START and STOP Conditions S NOT ACKNOWLEDGE SDA ACKNOWLEDGE SCL 1 2 8 9 Figure 8. Acknowledge Bits Acknowledge Bits Successful data transfers are acknowledged with an acknowledge bit (A) or a not-acknowledge bit (A). Both the master and the MAX1169 (slave) generate acknowledge bits.
PAGE 15
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP MAX1169 S 0 SDA 1 ADD3 1 ADD2 ADD1 ADD0 R/W A ACKNOWLEDGE 1 SCL 2 3 4 5 6 7 8 9 Figure 9. MAX1169 Slave Address Byte Sr S SDA 0 0 0 0 1 X X X A 1 2 3 4 5 6 7 8 9 F/S MODE HS MODE Figure 10. F/S-Mode to HS-Mode Transfer MAX1169 is in HS mode. The master must then send a repeated START followed by a slave address to initiate HS mode communication.
PAGE 16
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP MASTER TO SLAVE SLAVE TO MASTER A. SINGLE CONVERSION 1 7 1 1 S SLAVE ADDRESS R A CLOCK STRETCH 8 1 8 RESULT A RESULT NUMBER OF BITS 1 1 A P OR Sr (MOST SIGNIFICANT BYTE) (LEAST SIGNIFICANT BYTE) tCONV tACQ B.
PAGE 17
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP MAX1169 Internal Reference The MAX1169 contains an internal 4.096V bandgap reference. This bandgap reference is connected to REFADJ through a 5kΩ resistor. Bypass REFADJ with a 0.1μF capacitor to AGND. The MAX1169 reference buffer has a unity gain to provide +4.096V at REF. Bypass REF with a 10μF capacitor to AGND when the internal reference is used (Figure 12). REF 13 4.096V SAR REF ADC 10μF AV = 1.
PAGE 18
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP 1...111 1...110 1...101 1...100 VREF BINARY OUTPUT CODE (LSB) VREF V 1LSB = REF 65536 0...011 0...010 0...001 0...000 0 1 2 3 grounds to the star analog ground. Connect the digital grounds to the star digital ground. Connect the digital ground plane to the analog ground plane at one point. For lowest noise operation, make the ground return to the star ground’s power supply low impedance and as short as possible.
PAGE 19
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the input signal’s first five harmonics to the fundamental itself, expressed as: ⎛ Signal RMS ⎞ SINAD(db) = 20 × log ⎜ ⎟ ⎝ Noise RMS ⎠ Effective Number of Bits Effective number of bits (ENOB) indicates the global accuracy of an ADC at a specific input frequency and sampling rate. An ideal ADC’s error consists of quantization noise only.
PAGE 20
MAX1169 58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 10/02 Initial release 1 12/09 Updated Ordering Information and Electrical Characteristics 1, 2 — 2 12/10 Removed commercial temperature range 1, 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.