Datasheet

Figure 3. Conversion Frame, SAR Conversion, Track and Read Operation
Figure 2. Simplified Model of Input Sampling Circuit
R
ON
= 260Ω
AIN+
REFVDD
C
IN
= 30pF
D1
D2
V
DC
R
ON
= 260Ω
AIN-
REFVDD
D1
D2
C
IN
= 30pF
CNVST
SCLK
DOUT
Track
Read Data
Sample 1
SAR Conversion
1/Sample Rate
Sample 2
MSB
MSB-1
LSB+1 LSB
MSB MSB-1
LSB+1 LSB
Track
Read Data
SAR Conversion
1/Sample Rate
Reading sample1 during track Reading sample 2 during track
Sample 1 Sample 2
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Maxim Integrated │ 15
MAX11901 16-Bit, 1.6Msps, Low-Power,
Fully Differential SAR ADC