Datasheet

REFVDD, REF, REFIN, OVDD to GND ..................-0.3V to +4V
AVDD, DVDD to GND .............................................-0.3V to +2V
DGND to AGND, REFGND ..................................-0.3V to +0.3V
AIN+, AIN- to GND ...... -0.3V to the lower of (V
REF
+ 0.3V) and
+4V or ±130mA
SCLK, DIN, DOUT, CNVST, to GND ........... -0.3V to the lower of
(V
OVDD
+ 0.3V) and +4V
Maximum Current into Any Pin...........................................50mA
Continuous Power Dissipation (T
A
= +70°C)
TQFN (derate 30.30mW/°C above +70°C).............2424.2mW
Operating Temperature Range ........................... -40°C to +85°C
Junction Temperature ...................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) ....................................... +260°C
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
).... ......33°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ....... ........ 2°C/W
(Note 1)
(f
SAMPLE
= 1.6Msps, V
AVDD
= 1.8V, V
DVDD
= 1.8V, V
OVDD
= 1.5V to 3.6V, V
REFVDD
= 3.6V, V
REF
= 3.3V, Internal Ref Buffers On,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ANALOG INPUT
Input Voltage Range (Note 3) (AIN+) - (AIN-) -V
REF
+V
REF
V
Absolute Input Voltage Range AIN+, AIN- relative to AGND -0.1
V
REF
+
0.1
V
Common-Mode Input Range [(AIN+) + (AIN-)]/2
V
REF
/2 -
0.1
V
REF
/2
V
REF
/2
+ 0.1
V
Input Leakage Current Acquisition phase -1 0.001 +1 µA
Input Capacitance 32 pF
STATIC PERFORMANCE (Note 4)
Resolution N 16 Bits
Resolution LSB V
REF
= 3.3V 100.7 µV
No Missing Codes 16 Bits
Offset Error (Note 4) -1 ±0.1 +1 LSB
Offset Temperature Coefcient ±0.001 LSB/°C
Gain Error Referred to REFIN reference input -12 ±2 +12 LSB
Gain Error Temperature
Coefcient (Note 5)
Referred to REFIN reference input ±0.02 LSB/°C
Gain Error Referred to REF pins -3 ±1 +3 LSB
Gain Error Temperature
Coefcient (Note 5)
Referred to REF pins ±0.01 LSB/°C
Integral Nonlinearity INL -0.5 ±0.1 +0.5 LSB
www.maximintegrated.com
Maxim Integrated │ 4
MAX11901 16-Bit, 1.6Msps, Low-Power,
Fully Differential SAR ADC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
Electrical Characteristics