Datasheet

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Table Of Contents

General Description

The MAX11905 is a 20-bit, 1.6Msps, single-channel, fully

differential SAR ADC with internal reference buffers. The

MAX11905 provides excellent static and dynamic perfor-

mance with best-in-class power consumption that directly

scales with throughput. The device has a unipolar differ-

ential ±V

REF

input range. Supplies include a 3.3V supply

for the reference buffers, a 1.8V analog supply, a 1.8V

digital supply, and a 1.5V to 3.6V digital interface supply.

This ADC achieves 98.3dB SNR and -123dB THD, guar-

antees 20-bit resolution with no-missing codes and 6 LSB

INL (max).

The MAX11905 communicates data using a SPI-

compatible serial interface. The MAX11905 is offered in a

20-pin, 4mm x 4mm, TQFN package and is specified over

the -40°C to +85°C operating temperature range.

Applications

● Test and Measurement

● Automatic Test Equipment

● Medical Instrumentation

● Process Control and Industrial Automation

● Data Acquisition Systems

● Telecommunications

● Battery-Powered Equipment

Benets and Features

● High DC/AC Accuracy Provides Better Measurement

Quality

• 20-Bit Resolution with No Missing Codes

• ±6 LSB INL and ±1 LSB DNL Maximum at 16 Bits

• 98.3dB SNR and 98.1dB SINAD at f

= 10kHz

• -123dB THD at f

= 10kHz

● High Sampling Rate SAR Architecture Enables Fast

Settling and Acquisition

• 1.6Msps Throughput with No Pipeline Delay

● Integration Simplifies Design

• Integrated Reference Buffers, V

REF

= 2.5V to 3.6V

• ±V

REF

Unipolar Differential Analog Input Range

● Scalable Ultra-Low Power Supply Reduces Power

Consumption

• 9mW at 1.6Msps

● Flexible Low-Voltage Supplies Save Cost

• 1.8V Analog and Digital Core Supply

• 1.5V to 3.6V Digital Interface Supply

• 3.3V REFVDD Reference Buffer Supply

● Flexible, Industry-Standard Serial Interface and Small

Package Reduce Size

• SPI-/QSPI™-/MICROWIRE®/DSP-Compatible

• 20-Pin, 4mm x 4mm, TQFN Package

Ordering Information and Selector Guide appears at end of

data sheet.

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/MAX11905.related.

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corporation.

16-Bit to 20-Bit SAR ADC Family

1nF

COG

MAX11905

CNVST

DOUT

SCLK

DIN

AVDD

DVDD

OVDD

REFIN

REFVDD

AIN+

AIN-

4-WIRE

SPI

INTERFACE

3.3V

3.6V 1.8V 1.8V

1.5 TO

3.6V

7.5Ω

3.3V TO 0V

0 TO 3.3V

REFGND

REF

DGND

AGND

10µF

3.3V

16-BIT 18-BIT 20-BIT

1.6Msps MAX11901* MAX11903* MAX11905

1Msps MAX11900* MAX11902* MAX11904*

*Future Product

MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential

SAR ADC

19-6860; Rev 1; 12/14

Application Diagram

EVALUATION KIT AVAILABLE

Summary of content (29 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC General Description The MAX11905 is a 20-bit, 1.6Msps, single-channel, fully differential SAR ADC with internal reference buffers. The MAX11905 provides excellent static and dynamic performance with best-in-class power consumption that directly scales with throughput. The device has a unipolar differential ±VREF input range. Supplies include a 3.3V supply for the reference buffers, a 1.8V analog supply, a 1.
PAGE 2
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC TABLE OF CONTENTS General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features and Benefits . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC TABLE OF CONTENTS (continued) Effective Number of Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Spurious-Free Dynamic Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Absolute Maximum Ratings REFVDD, REF, REFIN, OVDD to GND...................-0.3V to +4V AVDD, DVDD to GND..............................................-0.3V to +2V DGND to AGND, REFGND...................................-0.3V to +0.3V AIN+, AIN- to GND....... -0.3V to the lower of (VREF + 0.3V) and +4V or ±130mA SCLK, DIN, DOUT, CNVST, to GND............ -0.3V to the lower of (VOVDD + 0.3V) and +4V Maximum Current into Any Pin.................
PAGE 5
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) Differential Nonlinearity (Note 6) DNL Analog Input CMR CMR DC 16 LSB/V Power-Supply Rejection (Note 7) PSR PSR vs. AVDD 2 LSB/V Power-Supply Rejection (Note 7) PSR PSR vs.
PAGE 6
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Analog Supply Voltage AVDD 1.7 1.8 1.9 V Digital Supply Voltage DVDD 1.7 1.8 1.
PAGE 7
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 8
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) toc1 DNL vs. TEMPERATURE INL vs. TEMPERATURE toc3 4 MAX INL (LSB) 2 1.0 1 0.5 0 -0.5 -2 -1.0 -3 -1.5 -40 -25 -10 5 20 35 50 65 TEMPERATURE (oC) 80 95 110 INL vs. AVDD SUPPLY VOLTAGE -2.
PAGE 9
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (continued) (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) INL vs. VREFVDD SUPPLY VOLTAGE DNL vs. VREFVDD SUPPLY VOLTAGE toc7 10 VAVDD = 1.8V VREF = 2.5V MAX INL (LSB) 8 MIN INL (LSB) 6 1.5 DNL (LSB) INL (LSB) 2 0 -2 VAVDD = 1.8V VREF = 2.
PAGE 10
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (continued) (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) SFDR AND THD vs. TEMPERATURE SNR AND SINAD vs.
PAGE 11
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (continued) (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) CURRENT vs. TEMPERATURE 4.0 SHUTDOWN CURRENT vs. TEMPERATURE toc19 SHUTDOWN CURRENT (µA) 3.5 CURRENT (mA) 3.0 2.5 2.0 IOVDD 1.5 IREFVDD (BUFFER OFF) IREFVDD 1.0 IDVDD IAVDD 0.5 0.
PAGE 12
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Pin Configuration REFGND 4 AIN- 5 19 18 17 16 MAX11905 8 9 10 OVDD DOUT DGND AIN+ 7 AGND 6 15 DGND 14 DIN 13 CNVST 12 SCLK 11 3 REFVDD REFGND AGND 2 AGND REF AVDD 1 20 + REF REFIN TOP VIEW DVDD TQFN 4mm × 4mm EXPOSED PAD IS GROUND. IT MUST BE SOLDERED TO PCB. Pin Description PIN NAME I/O FUNCTION Reference.
PAGE 13
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Pin Description (continued) PIN NAME I/O FUNCTION 16 REFVDD I Reference Buffer Supply. Nominally at 3V. Bypass to AGND with a 10µF capacitor in parallel with a 0.1µF capacitor (10µF || 100nF). 17, 18 AGND I Analog Ground. Bypass to AGND with a 10µF capacitor in parallel with a 0.1µF capacitor (10µF || 100nF). 19 AVDD I Analog Supply. Nominally at 1.8V. 20 REFIN I Input for the Internal Reference Buffer.
PAGE 14
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Detailed Description The MAX11905 is a 20-bit, 1.6Msps maximum sampling rate, fully differential input, single-channel SAR ADC with SPI interface. This part features industry-leading sample rate and resolution, while consuming very low power. The MAX11905 has an integrated reference buffer to minimize board space, component count, and system cost.
PAGE 15
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC REFVDD D1 RON = 260Ω AIN+ CIN = 30pF D2 VDC REFVDD D1 RON = 260Ω AINCIN = 30pF D2 Figure 2. Simplified Model of Input Sampling Circuit SAR Conversion 1/Sample Rate SAR Conversion Track Read Data 1/Sample Rate Track Read Data Sample 2 Sample 1 CNVST SCLK Sample 1 DOUT MSB MSB-1 Sample 2 LSB+1 LSB Reading sample1 during track MSB MSB-1 LSB+1 LSB Reading sample 2 during track Figure 3.
PAGE 16
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Input Settling capacitor, PCB parasitic capacitor), and tTRACK is the track time. During track phase (Figure 3), the sample switches are closed and the analog inputs are directly connected to the sample capacitors. The charging of the sample capacitor to the input voltage is determined by the source resistance and sampling capacitor size. The rising edge of CNVST is the sampling instant for the ADC.
PAGE 17
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Voltage Reference Configurations The MAX11905 features internal reference buffers, helping to reduce component count and board space. Alternatively, the user may drive the reference nodes REF with an external reference. To use the internal reference buffers, drive the REFIN pin with an external reference voltage source. It will appear on the REF pin as a buffered reference output.
PAGE 18
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC OUTPUT CODE (OFFSET BINARY) OUTPUT CODE (TWO'S COMPLEMENT) FS - 1.5 x LSB FS - 1.5 x LSB 111...111 011...111 111...110 011...110 111...101 011...101 000...010 100...010 000...001 000...000 19 19 -2 -2 +1-219+2 19 19 2 -2 2 -1 2 19 VIN = (AIN+) - (AIN-) DIFFERENTIAL ANALOG INPUT (LSB) 100...001 100...
PAGE 19
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Digital Interface The MAX11905 has three different modes to read the data: The MAX11905 has a SPI interface with CNVST controlling the sampling, and SCLK, DOUT, DIN forming the standard SPI signals. The SAR conversion begins with the rising edge of CNVST. The minimum CNVST high time is 20ns and CNVST should be brought low before DOUT goes low, which signals the completion of a SAR conversion.
PAGE 20
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC In the split reading mode, the data is read during the track phase and the following SAR conversion phase. Figure 7 shows the descriptive timing diagram. SPI Timing Diagram At higher sampling rates, the track time may not be long enough to allow reading all 20 bits of data. In this case, the data read can be started in track mode, and then continued in the subsequent SAR conversion phase.
PAGE 21
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC t1 0.7 x OVDD SCLK t2 DIN 0.7 x OVDD 0.3 x OVDD Figure 9. DIN Timing for Register Write Operations t13 t12 t11 0.7 x OVDD 0.7 x OVDD CNVST t10 SCLK t6 t9 t8 t7 0.7 x OVDD 0.7 x OVDD 0.3 x OVDD t3 DOUT t5 t4 MSB MSB-1 MSB-2 0.7 x OVDD 0.3 x OVDD Figure 10. Timing Diagram for Data Out Reading After Conversion www.maximintegrated.
PAGE 22
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Register Write All SPI operations start with a command word. The structure of the command word is shown below. If there is no start bit, i.e. DIN is low, the part will output the conversion result and then go idle (see Figures 5, 6, and 7). The 16-bit mode register is the only register that can be written to. Figure 11 shows the waveform for a mode register write operation.
PAGE 23
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Register Map FUNCTION ADDRESS R/W BITS DATA WIDTH Read or Write Mode Register 0001 1 or 0 16 Mode Register Read Conversion Result* 0010 1 20 Conversion Result Read Chip ID Reserved, Do Not Use DATA 0100 1 8 Chip ID All other — — Reserved, Do Not Use *Conversion result can also be read as shown in Figures 5, 6, and 7. Mode Register The reset state is: 0x0000.
PAGE 24
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Conversion Result Register A 20-bit read-only register, can be read directly or via a command read sequence. Chip ID Register This register holds a 4-bit code that can be used to verify the silicon revision. The ID = 1001b. BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 — — — — ID3 ID2 ID1 ID0 Typical Application Circuit Real-world signals usually require conditioning before they can be digitized by an ADC.
PAGE 25
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC 2.5V TO VREFVDD - 0.2V RS VREF 0.5 x VREF R 0V R 1.8V 1.5V TO 3.6V 1.8V REFVDD AVDD DVDD OVDD MAX11905 SCLK REFIN AIN+ DIN CS COG DOUT RS VREF 2 2.7V TO 3.6V DSP SPI INTERFACE CNVST AIN- REF REFGND AGND DGND + - 10µF Figure 13. Unipolar Single-Ended Input R 2.5V TO VREFVDD - 0.2V R RS R +2 x VREF 4R 0V -2 x VREF R VREF 2 + - VREF 2 + - 4R 1.8V REFVDD AVDD REFIN AIN+ CS COG RS 2.7V TO 3.6V 1.5V TO 3.
PAGE 26
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Figure 15. Top Layer Sample Layout www.maximintegrated.
PAGE 27
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Definitions Integral Nonlinearity Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. For these devices, this straight line is a line drawn between the end points of the transfer function, once offset and gain errors have been nullified. Differential Nonlinearity Differential nonlinearity (DNL) is the difference between an actual step width and the ideal value of 1 LSB.
PAGE 28
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Selector Guide BITS SPEED (ksps) FULLY DIFFERENTIAL INPUT (MAX) (V) REFERENCE BUFFERS PACKAGE MAX11900* 16 1000 ±3.6 Internal/External 4mm x 4mm TQFN-20 MAX11901* 16 1600 ±3.6 Internal/External 4mm x 4mm TQFN-20 MAX11902* 18 1000 ±3.6 Internal/External 4mm x 4mm TQFN-20 MAX11903* 18 1600 ±3.6 Internal/External 4mm x 4mm TQFN-20 MAX11904* 20 1000 ±3.
PAGE 29
MAX11905 20-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 2/14 Initial release — 1 12/14 Updated Benefits and Features section 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.