Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TQFP 48 EP

General Description

The MAX1196 is a 3V, dual 8-bit analog-to-digital con-

verter (ADC) featuring fully differential wideband track-

and-hold (T/H) inputs, driving two ADCs. The MAX1196

is optimized for low power, small size, and high-dynamic

performance for applications in imaging, instrumenta-

tion, and digital communications. This ADC operates

from a single 2.7V to 3.6V supply, consuming only

87mW while delivering a typical signal-to-noise and dis-

tortion (SINAD) of 48.4dB at an input frequency of

20MHz and a sampling rate of 40Msps. The T/H driven

input stages incorporate 400MHz (-3dB) input ampli-

fiers. The converters can also be operated with single-

ended inputs. In addition to low operating power, the

MAX1196 features a 3mA sleep mode as well as a

0.1µA power-down mode to conserve power during idle

periods.

An internal 2.048V precision bandgap reference sets

the full-scale range of the ADC. A flexible reference

structure allows the use of this internal or an externally

applied reference, if desired for applications requiring

increased accuracy or a different input voltage range.

The MAX1196 features parallel, multiplexed, CMOS-

compatible three-state outputs. The digital output format

can be set to two’s complement or straight offset binary

through a single control pin. The device provides for a

separate output power supply of 1.7V to 3.6V for flexible

interfacing. The MAX1196 is available in a 7mm × 7mm,

48-pin TQFP package, and is specified for the extended

industrial (-40°C to +85°C) temperature range.

Pin-compatible, nonmultiplexed higher speed versions of

the MAX1196 are also available. Refer to the MAX1198

data sheet for 100Msps, the MAX1197 data sheet for

60Msps, and the MAX1195 data sheet for 40Msps.

For a 10-bit, pin-compatible upgrade, refer to the

MAX1186 data sheet. With the N.C. pins of the

MAX1196 internally pulled down to ground, this ADC

becomes a drop-in replacement for the MAX1186.

Applications

Baseband I/Q Sampling

Multichannel IF Sampling

Ultrasound and Medical Imaging

Battery-Powered Instrumentation

WLAN, WWAN, WLL, MMDS Modems

Set-Top Boxes

VSAT Terminals

Features

♦ Single 2.7V to 3.6V Operation

♦ Excellent Dynamic Performance

48.4dB/44.7dB SINAD at f

= 20MHz/200MHz

68.9dB/53dBc SFDR at f

= 20MHz/200MHz

♦ -72dB Interchannel Crosstalk at f

= 20MHz

♦ Low Power

87mW (Normal Operation)

9mW (Sleep Mode)

0.3µW (Shutdown Mode)

♦ 0.05dB Gain and ±0.05° Phase Matching

♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz -3dB Input Bandwidth

♦ On-Chip 2.048V Precision Bandgap Reference

♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ Pin-Compatible 8-Bit and 10-Bit Upgrades

Available

MAX1196

Dual 8-Bit, 40Msps, 3V, Low-Power ADC with

Internal Reference and Multiplexed Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

N.C.

OGND

A/B

N.C.

COM

GND

INA+

INA-

GND

INB-

INB+

GND

CLK

TQFP-EP

MAX1196

GND

T/B

SLEEP

N.C.

REFN

REFP

REFIN

REFOUT

D7A/B

D6A/B

D5A/B

D4A/B

D3A/B

D2A/B

D1A/B

D0A/B

PART TEMP RANGE PIN-PACKAGE

MAX1196ECM -40°C to +85°C 48 TQFP-EP*

Pin Configuration

Ordering Information

19-2600; Rev 0; 9/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

*EP = Exposed pad.

Functional Diagram appears at end of data sheet.

Summary of content (23 pages)

PAGE 1
9-2600; Rev 0; 9/02 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs ♦ On-Chip 2.048V Precision Bandgap Reference ♦ User-Selectable Output Format—Two’s Complement or Offset Binary ♦ Pin-Compatible 8-Bit and 10-Bit Upgrades Available Ordering Information PART TEMP RANGE MAX1196ECM -40°C to +85°C *EP = Exposed pad.
PAGE 2
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs ABSOLUTE MAXIMUM RATINGS VDD, OVDD to GND .............................................. -0.3V to +3.6V OGND to GND...................................................... -0.3V to +0.3V INA+, INA-, INB+, INB- to GND ...............................-0.3V to VDD REFIN, REFOUT, REFP, REFN, COM, CLK to GND............................................-0.3V to (VDD + 0.
PAGE 3
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at TA = +25°C.
PAGE 4
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
PAGE 5
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at TA = +25°C.
PAGE 6
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
PAGE 7
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs FFT PLOT CHA FFT PLOT CHB FFT PLOT CHA (DIFFERENTIAL INPUT, 8192-POINT DATA RECORD) (DIFFERENTIAL INPUT, 8192-POINT DATA RECORD) (DIFFERENTIAL INPUT, 8192-POINT DATA RECORD) AMPLITUDE (dB) -30 -20 -40 -50 HD3 HD2 fINB -60 fINB -30 HD3 fINA -60 HD2 -40 -50 -60 -70 -70 -80 -80 -80 -90 0 2 4 6 10 12 14 16 18 20 8 fCLK = 40.0005678MHz fINA = 7.534287MHz fINB = 1.
PAGE 8
Typical Operating Characteristics (continued) (VDD = OVDD = 3V, VREFIN = 2.048V, differential input at -1dB FS, fCLK = 40MHz, CL ≈ 10pF, TA = +25°C, unless otherwise noted.) CHB 49 47 fIN2 -60 46 45 -80 -90 8 7 9 10 11 12 43 0 ANALOG INPUT FREQUENCY (MHz) TOTAL HARMONIC DISTORTION vs.
PAGE 9
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs SFDR (dBc) 62 -60 57 -65 52 -70 47 -75 -16 -12 -8 -4 0 THD 60 SNR 50 INPUT POWER (dB FS) -16 -12 -8 -4 MAX1196-22 0.1 DNL (LSB) -0.1 56 0 -0.2 -0.3 -0.3 -0.4 -0.4 -0.5 -0.5 128 160 192 224 256 0 32 64 96 128 160 192 224 256 DIGITAL OUTPUT CODE DIGITAL OUTPUT CODE GAIN ERROR vs. TEMPERATURE, EXTERNAL REFERENCE VREFIN = 2.048V OFFSET ERROR vs.
PAGE 10
Typical Operating Characteristics (continued) (VDD = OVDD = 3V, VREFIN = 2.048V, differential input at -1dB FS, fCLK = 40MHz, CL ≈ 10pF, TA = +25°C, unless otherwise noted.) ANALOG SUPPLY CURRENT vs. TEMPERATURE DIGITAL SUPPLY CURRENT vs. ANALOG INPUT FREQUENCY 2.0320 7 31 MAX1196-28 2.0324 MAX1196-27 32 INTERNAL REFERENCE VOLTAGE vs. ANALOG SUPPLY VOLTAGE 8 MAX1196-26 33 29 28 VREFOUT (V) 2.0316 30 IOVDD (mA) IVDD (mA) 6 5 2.0312 2.0308 27 4 2.0304 26 2.
PAGE 11
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs PIN NAME 17 T/B 18 SLEEP 19 PD High-Active Power-Down Input. High: Power-down mode Low: Normal operation 20 OE Low-Active Output Enable Input. High: Digital outputs disabled Low: Digital outputs enabled 21–29, 35, 36 N.C. No Connection. Do not connect. 30 A/B A/B Data Indicator. This digital output indicates CHA data (A/B = 1) or CHB data (A/B = 0) to be present on the output.
PAGE 12
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs 2-BIT FLASH ADC STAGE 1 STAGE 2 STAGE 6 2-BIT FLASH ADC STAGE 7 STAGE 1 DIGITAL ALIGNMENT LOGIC T/H STAGE 2 STAGE 6 STAGE 7 DIGITAL ALIGNMENT LOGIC T/H 8 VINA 8 VINB OUTPUT MULTIPLEXER 8 D0A/B–D7A/B Figure 1.
PAGE 13
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs MAX1196 INTERNAL BIAS COM S5a S2a C1a S3a S4a INA+ OUT C2a S4c S1 OUT INAS4b C2b C1b S3b S5b S2b INTERNAL BIAS COM HOLD INTERNAL BIAS TRACK COM CLK HOLD TRACK INTERNAL NONOVERLAPPING CLOCK SIGNALS S5a S2a C1a S3a S4a INB+ OUT C2a S4c S1 MAX1196 OUT INBS4b C2b C1b S3b S5b S2b INTERNAL BIAS COM Figure 2.
PAGE 14
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs and REFN are outputs. REFOUT can be left open or connected to REFIN through a >10kΩ resistor. In unbuffered external reference mode, connect REFIN to GND. This deactivates the on-chip reference buffers for REFP, COM, and REFN. With their buffers shut down, these nodes become high-impedance inputs and can be driven through separate, external reference sources.
PAGE 15
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs All digital outputs, D0A/B–D7A/B (CHA or CHB data) and A/B are TTL/CMOS-logic compatible. The output coding can be chosen to be either offset binary or two’s complement (Table 1) controlled by a single pin (T/B). Pull T/B low to select offset binary and high to activate two’s complement output coding.
PAGE 16
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs +5V 0.1µF LOWPASS FILTER INA- MAX4108 RIS0 50Ω 0.1µF 300Ω CIN 22pF 0.1µF -5V 600Ω 600Ω 300Ω +5V COM 0.1µF +5V 0.1µF 600Ω INPUT 0.1µF LOWPASS FILTER MAX4108 300Ω -5V 0.1µF INA+ MAX4108 RIS0 50Ω 300Ω CIN 22pF 0.1µF -5V 300Ω 300Ω +5V 600Ω MAX1196 0.1µF LOWPASS FILTER INB- MAX4108 RIS0 50Ω 0.1µF 300Ω 0.1µF -5V +5V CIN 22pF 600Ω 600Ω 300Ω 0.1µF +5V 0.
PAGE 17
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs Single-Ended AC-Coupled Input Signal Figure 7 shows an AC-coupled, single-ended application. Amplifiers like the MAX4108 provide high speed, high bandwidth, low noise, and low distortion to maintain the integrity of the input signal. Buffered External Reference Drives Multiple ADCs Multiple-converter systems based on the MAX1196 are well suited for use with a common reference voltage.
PAGE 18
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs 3.3V 3.3V 0.1µF 2.048V 0.1µF N.C. 31 1 32 0.1µF MAX6062 2 16.2kΩ 3 2 162Ω 1 4 10Hz LOWPASS FILTER 1 5 MAX4250 1µF 3 29 REFOUT REFIN REFP REFN COM N=1 MAX1196 100µF 2 0.1µF 0.1µF 0.1µF 10Hz LOWPASS FILTER NOTE: ONE FRONT-END REFERENCE CIRCUIT DESIGN CAN BE USED WITH UP TO 1000 ADCs. 0.1µF N.C. 29 31 32 0.1µF 1 2 2.2µF 10V REFOUT REFIN REFP N = 1000 REFN MAX1196 COM 0.
PAGE 19
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs MAX1196 3.3V 0.1µF N.C. 29 31 1 2.0V 2 MAX6066 32 3.3V 21.5kΩ 3 4 1/4 MAX4252 1 1 2.0V AT 8mA 2 10µF 6V 1.47kΩ 11 21.5kΩ 1.5V REFIN REFP N=1 REFN 47kΩ 2 3 REFOUT MAX1196 COM 330µF 6V 0.1µF 0.1µF 0.1µF 3.3V 5 4 1.5V AT 0mA 1/4 MAX4252 7 47kΩ 6 1µF 10µF 6V 1.47kΩ 11 21.5kΩ 3.3V 1.0V 0.1µF 4 47kΩ 9 11 21.5kΩ 2.2µF 10V 1.0V AT -8mA 1/4 MAX4252 8 MAX4254 POWER-SUPPLY BYPASSING.
PAGE 20
MAX1196 Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs A/B MAX2451 INA+ INA0° 90° MAX1196 INB+ INB- DSP POSTPROCESSING CHA AND CHB DATA ALTERNATINGLY AVAILABLE ON 8-BIT MULTIPLEXED OUTPUT BUS. DOWNCONVERTER ÷8 Figure 10.
PAGE 21
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs CLK ANALOG INPUT  V2 2 + V3 2 + V4 2 + V5 2 THD = 20 × log  V1  tAD tAJ SAMPLED DATA (T/H) T/H     where V1 is the fundamental amplitude, and V2 through V5 are the amplitudes of the 2nd- through 5th-order harmonics. TRACK HOLD TRACK Figure 11.
PAGE 22
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs MAX1196 Functional Diagram VDD OGND OVDD GND INA+ 8 ADC T/H A/B MUX DEC INA- CLK INB+ ADC T/H 8 8 CONTROL OUTPUT DRIVERS DEC 8 INB- OE REFERENCE MAX1196 REFOUT REFN COM REFP 22 D7B–D0B OR D7A–D0A REFIN ______________________________________________________________________________________ T/B PD SLEEP
PAGE 23
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs 48L,TQFP.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.