Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TQFP 48 EP

General Description

The MAX1197 is a 3V, dual, 8-bit analog-to-digital con-

verter (ADC) featuring fully differential wideband track-

and-hold (T/H) inputs, driving two ADCs. The MAX1197

is optimized for low-power, small size, and high-dynam-

ic performance for applications in imaging, instrumenta-

tion and digital communications. This ADC operates

from a single 2.7V to 3.6V supply, consuming only

120mW while delivering a typical signal-to-noise and

distortion (SINAD) of 48.5dB at an input frequency of

30MHz and a sampling rate of 60Msps. The T/H-driven

input stages incorporate 400MHz (-3dB) input ampli-

fiers. The converters may also be operated with single-

ended inputs. In addition to low operating power, the

MAX1197 features a 3mA sleep mode as well as a

0.1µA power-down mode to conserve power during idle

periods.

An internal 2.048V precision bandgap reference sets

the full-scale range of the ADC. A flexible reference

structure allows the use of this internal or an externally

applied reference, if desired, for applications requiring

increased accuracy or a different input voltage range.

The MAX1197 features parallel, CMOS-compatible three-

state outputs. The digital output format can be set to two’s

complement or straight offset binary through a single con-

trol pin. The device provides for a separate output power

supply of 1.7V to 3.6V for flexible interfacing with various

logic families. The MAX1197 is available in a 7mm x 7mm,

48-pin TQFP package, and is specified for the extended

industrial (-40°C to +85°C) temperature range.

Pin-compatible lower and higher speed versions of the

MAX1197 are also available. Refer to the MAX1195 data

sheet for 40Msps and the MAX1198 data sheet for

100Msps. In addition to these speed grades, this family

will include a multiplexed output version (MAX1196,

40Msps), for which digital data is presented time inter-

leaved and on a single, parallel 8-bit output port.

For a 10-bit, pin-compatible upgrade, refer to the

MAX1182 data sheet. With the N.C. pins of the

MAX1197 internally pulled down to ground, this ADC

becomes a drop-in replacement for the MAX1182.

Applications

Features

♦ Single 2.7V to 3.6V Operation

♦ Excellent Dynamic Performance

48.5dB/45.3dB SINAD at f

= 30MHz/200MHz

69dBc/53.5dBc SFDR at f

= 30MHz/200MHz

♦ -72dB Interchannel Crosstalk at f

= 20MHz

♦ Low Power

120mW (Normal Operation)

9mW (Sleep Mode)

0.3µW (Shutdown Mode)

♦ 0.05dB Gain and ±0.05° Phase Matching

♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz -3dB Input Bandwidth

♦ On-Chip 2.048V Precision Bandgap Reference

♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ Pin-Compatible 8-Bit and 10-Bit Upgrades

Available

MAX1197

Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with

Internal Reference and Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

N.C.

OGND

N.C.

D0B

D1B

D2B

D3B

COM

GND

INA+

INA-

GND

INB-

INB+

GND

CLK

TQFP-EP

GND

T/B

SLEEP

D7B

D6B

D5B

D4B

REFN

REFP

REFIN

REFOUT

D7A

D6A

D5A

D4A

D3A

D2A

D1A

D0A

MAX1197

Pin Configuration

Ordering Information

19-2411; Rev 0; 4/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Functional Diagram and Pin Compatible Upgrades table

appear at end of data sheet.

*EP = Exposed paddle

Baseband I/Q Sampling

Multichannel IF Sampling

Ultrasound and Medical

Imaging

Battery-Powered

Instrumentation

WLAN, WWAN, WLL,

MMDS Modems

Set-Top Boxes

VSAT Terminals

PART TEMP RANGE PIN-PACKAGE

MAX1197ECM -40°C to +85°C 48 TQFP-EP*

Summary of content (22 pages)

PAGE 1
9-2411; Rev 0; 4/02 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs ♦ Low Power 120mW (Normal Operation) 9mW (Sleep Mode) 0.3µW (Shutdown Mode) ♦ 0.05dB Gain and ±0.05° Phase Matching ♦ Wide ±1VP-P Differential Analog Input Voltage Range ♦ 400MHz -3dB Input Bandwidth ♦ On-Chip 2.
PAGE 2
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs ABSOLUTE MAXIMUM RATINGS VDD, OVDD to GND ...............................................-0.3V to +3.6V OGND to GND.......................................................-0.3V to +0.3V INA+, INA-, INB+, INB- to GND ...............................-0.3V to VDD REFIN, REFOUT, REFP, REFN, COM, CLK to GND .................................-0.3V to (VDD + 0.3V) OE, PD, SLEEP, T/B, D7A–D0A, D7B–D0B to OGND .................
PAGE 3
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 60MHz, TA = TMIN to TMAX, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are at TA = +25°C.
PAGE 4
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 60MHz, TA = TMIN to TMAX, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization.
PAGE 5
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 60MHz, TA = TMIN to TMAX, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are at TA = +25°C.
PAGE 6
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 60MHz, TA = TMIN to TMAX, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization.
PAGE 7
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs -30 fINA -40 -50 HD3 -30 -50 HD2 -20 HD3 fINB -30 -40 -60 -70 -80 -80 -90 -90 10 15 20 25 30 fINA -50 -70 5 fCLK = 60.056789MHz fINA = 114.974441MHz fINB = 99.
PAGE 8
Typical Operating Characteristics (continued) (VDD = 3V, OVDD = 3V, VREFIN = 2.048V, differential input at -1dB FS, fCLK = 40MHz, CL ≈ 10pF TA = +25°C, unless otherwise noted.) 0 VIN = 100mVP-P 1 SFDR 0 GAIN (dB) 60 THD SNR 50 40 SINAD GAIN (dB) -1 70 30 -2 -15 10 35 60 -1 -3 -2 -4 -3 -4 -5 -40 85 1 10 1 1000 100 10 1000 100 TEMPERATURE (°C) ANALOG INPUT FREQUENCY (MHz) ANALOG INPUT FREQUENCY (MHz) SIGNAL-TO-NOISE RATIO vs. INPUT POWER (fIN = 19.
PAGE 9
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs OFFSET ERROR (%FS) 0.2 CHA 0.1 CHA -0.7 -0.8 CHB 0 -0.9 -0.1 -15 10 35 60 85 60 40 SNR 20 SINAD 0 -20 -40 THD -60 -80 -40 -15 10 35 0 85 60 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) SAMPLING SPEED (Msps) ANALOG SUPPLY CURRENT vs. TEMPERATURE DIGITAL SUPPLY CURRENT vs. ANALOG INPUT FREQUENCY SNR/SINAD, THD/SFDR vs.
PAGE 10
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs Pin Description PIN NAME 1 COM Common-Mode Voltage I/O. Bypass to GND with a ≥ 0.1µF capacitor. FUNCTION 2, 6, 11, 14, 15 VDD Analog Supply Voltage. Bypass to GND with a capacitor combination of 2.2µF in parallel with 0.1µF. 3, 7, 10, 13, 16 GND Analog Ground 4 INA+ Channel A Positive Analog Input. For single-ended operation connect signal source to INA+. 5 INA- Channel A Negative Analog Input.
PAGE 11
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs PIN NAME FUNCTION 42 D5A Three-State Digital Output, Bit 5, Channel A 43 D6A Three-State Digital Output, Bit 6, Channel A 44 D7A Three-State Digital Output, Bit 7 (MSB), Channel A 45 REFOUT 46 REFIN Reference Input. VREFIN = 2 x (VREFP – VREFN). Bypass to GND with a > 0.1µF capacitor. 47 REFP Positive Reference I/O. Conversion range is ±(VREFP – VREFN). Bypass to GND with a > 0.1µF capacitor.
PAGE 12
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs INTERNAL BIAS COM S5a S2a C1a S3a S4a INA+ OUT C2a S4c S1 OUT INAS4b C2b C1b S3b S5b S2b INTERNAL BIAS COM HOLD INTERNAL BIAS TRACK COM CLK HOLD TRACK INTERNAL NONOVERLAPPING CLOCK SIGNALS S5a S2a C1a S3a S4a INB+ OUT C2a S4c S1 OUT INBS4b MAX1197 C2b C1b S3b S2b INTERNAL BIAS S5b COM Figure 2. MAX1197 T/H Amplifiers are closed.
PAGE 13
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs MAX1197 5-CLOCK-CYCLE LATENCY N N+1 N+2 N+3 N+4 N+5 N+6 ANALOG INPUT tAD CLOCK INPUT tCH tDO tCL DATA OUTPUT D7A–D0A N-6 N-5 N-4 N-3 N-2 N-1 N N+1 DATA OUTPUT D7B–D0B N-6 N-5 N-4 N-3 N-2 N-1 N N+1 Figure 3. System Timing Diagram Match the impedance of INA+ and INA-, as well as INB+ and INB-, and set the common-mode voltage to mid-supply (VDD/2) for optimum performance.
PAGE 14
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs Table 1. MAX1197 Output Codes For Differential Inputs OE tDISABLE tENABLE OUTPUT D7A–D0A HIGH-Z OUTPUT D7B–D0B HIGH-Z VALID DATA VALID DATA HIGH-Z HIGH-Z VREF x 255/256 +Full Scale -1LSB 1111 1111 0111 1111 VREF x 1/256 +1LSB 1000 0001 0000 0001 Figure 4.
PAGE 15
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs MAX1197 +5V 0.1µF LOWPASS FILTER 300Ω 0.1µF INA- MAX4108 RIS0 50Ω CIN 22pF 0.1µF -5V 600Ω 600Ω 300Ω +5V COM 0.1µF +5V 0.1µF 600Ω INPUT 0.1µF LOWPASS FILTER MAX4108 300Ω -5V 0.1µF INA+ MAX4108 RIS0 50Ω 300Ω CIN 22pF 0.1µF -5V 300Ω 300Ω +5V 600Ω MAX1197 0.1µF LOWPASS FILTER 300Ω 0.1µF INB- MAX4108 RIS0 50Ω 0.1µF -5V +5V CIN 22pF 600Ω 600Ω 300Ω 0.1µF +5V 0.1µF INPUT 600Ω 0.
PAGE 16
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs 25Ω REFP INA+ 22pF VIN 0.1µF 1 VIN T1 0.1µF 6 1kΩ RISO 50Ω INA+ MAX4108 N.C. 2 5 3 4 100Ω COM 2.2µF 1kΩ CIN 22pF 0.1µF COM REFN MINICIRCUITS TT1–6-KK81 0.1µF RISO 50Ω 25Ω INA- INA- 100Ω CIN 22pF 22pF MAX1197 REFP 25Ω MAX1197 INB+ 22pF VIN 0.1µF 1kΩ RISO 50Ω 0.1µF 1 VIN T1 6 INB+ MAX4108 100Ω N.C. 2 5 3 4 2.2µF 0.
PAGE 17
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs MAX1197 3.3V 3.3V 0.1µF 2.048V 0.1µF N.C. 31 1 2 16.2kΩ 3 REFIN REFP 1 REFN 2 COM 5 MAX4250 1µF 162Ω 1 4 3 REFOUT 32 0.1µF MAX6062 29 10Hz LOWPASS FILTER N=1 MAX1197 100µF 2 0.1µF 0.1µF 0.1µF 10Hz LOWPASS FILTER NOTE: ONE FRONT-END REFERENCE CIRCUIT DESIGN MAY BE USED WITH UP TO 1000 ADCs. 0.1µF N.C. 29 31 32 0.1µF 1 2 2.2µF 10V REFOUT REFIN REFP N = 1000 REFN MAX1197 COM 0.1µF 0.1µF 0.
PAGE 18
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs 3.3V 0.1µF N.C. 29 31 1 2.0V 2 MAX6066 3 4 REFP 1 REFN 2.0V AT 8mA 1/4 MAX4252 1 47kΩ 2 2 3 10µF 6V 1.47kΩ 11 21.5kΩ 1.5V REFIN 32 3.3V 21.5kΩ REFOUT N=1 MAX1197 COM 330µF 6V 0.1µF 0.1µF 0.1µF 3.3V 5 4 1.5V AT 0mA 1/4 MAX4252 7 47kΩ 6 1µF 10µF 6V 1.47kΩ 11 21.5kΩ 3.3V 1.0V 0.1µF 4 47kΩ 9 11 21.5kΩ 2.2µF 10V 1.0V AT -8mA 1/4 MAX4252 8 MAX4254 POWER SUPPLY BYPASSING.
PAGE 19
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs MAX1197 MAX2451 INA+ INA0° 90° MAX1197 DSP POSTPROCESSING INB+ INBDOWNCONVERTER ÷8 Figure 10. Typical QAM Application Using the MAX1197 from any noisy, digital systems ground plane (e.g., downstream output buffer or DSP ground plane). Route high-speed digital signal traces away from the sensitive analog traces of either channel.
PAGE 20
MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs Signal-to-Noise Ratio Total Harmonic Distortion For a waveform perfectly reconstructed from digital samples, the theoretical maximum SNR is the ratio of the full-scale analog input (RMS value) to the RMS quantization error (residual error).
PAGE 21
Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs VDD OGND OVDD GND INA+ 8 ADC T/H DEC OUTPUT DRIVERS 8 D7A–D0A INA- CONTROL CLK OE INB+ 8 T/H ADC DEC OUTPUT DRIVERS 8 D7B–D0B INB- REFERENCE MAX1197 T/B PD SLEEP REFOUT REFN COM REFP REFIN Pin-Compatible Upgrades (Sampling Speed and Resolution) 8-BIT PART 10-BIT PART MAX1195 MAX1183 SAMPLING SPEED (Msps) 40 MAX1197 MAX1182 60 MAX1198 MAX1180 100 MAX1196* MAX1186 40, multiplexed *Future pro
PAGE 22
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 48L,TQFP.EPS MAX1197 Dual, 8-Bit, 60Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.