Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal QSOP 24

General Description

The MAX1226/MAX1228/MAX1230 are serial 12-bit ana-

log-to-digital converters (ADCs) with an internal reference

and an internal temperature sensor. These devices fea-

ture on-chip FIFO, scan mode, internal clock mode, inter-

nal averaging, and AutoShutdown™. The maximum

sampling rate is 300ksps using an external clock. The

MAX1230 has 16 input channels, the MAX1228 has 12

input channels, and the MAX1226 has 8 input channels.

All input channels are configurable for single-ended or

differential inputs in unipolar or bipolar mode. All three

devices operate from a +5V supply and contain a 10MHz

SPI™/QSPI™/MICROWIRE™-compatible serial port.

The MAX1230 is available in 28-pin 5mm x 5mm thin

QFN with exposed pad and 24-pin QSOP packages.

The MAX1226/MAX1228 are only available in QSOP

packages. All three devices are specified over the

extended -40°C to +85°C temperature range.

________________________Applications

System Supervision

Data-Acquisition Systems

Industrial Control Systems

Patient Monitoring

Data Logging

Instrumentation

Features

o Internal Temperature Sensor (±0.7°C Accuracy)

o 16-Entry First-In/First-Out (FIFO)

o Analog Multiplexer with True Differential

Track/Hold

16-, 12-, 8-Channel Single Ended

8-, 6-, 4-Channel True Differential

(Unipolar or Bipolar)

o Accuracy: ±1 LSB INL, ±1 LSB DNL, No Missing

Codes Over Temperature

o Scan Mode, Internal Averaging, and Internal Clock

o Low-Power Single +5V Operation

2.3mA at 300ksps

o Internal 4.096V Reference or External Differential

Reference

o 10MHz 3-Wire SPI/QSPI/MICROWIRE-Compatible

Interface

o Space-Saving 28-Pin 5mm x 5mm Thin QFN

Package

MAX1226/MAX1228/MAX1230

12-Bit 300ksps ADCs with FIFO,

Temp Sensor, Internal Reference

________________________________________________________________

Maxim Integrated Products

Pin Configurations

19-2852; Rev 5; 12/10

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Ordering Information

AIN0

EOC

DOUT

DIN

SCLK

GND

REF+

MAX1226

QSOP

TOP VIEW

AIN1

AIN2

AIN5

AIN3

AIN4

REF-/AIN6

CNVST/AIN7

EOC

DOUT

DIN

CSAIN3

AIN2

AIN1

AIN0

SCLK

GND

REF+AIN7

AIN6

AIN5

AIN4

CNVST/AIN11

REF-/AIN10AIN9

AIN8

MAX1228

QSOP

PART TEMP RANGE PIN-PACKAGE

MAX1226BCEE+ 0°C to +70°C 16 QSOP

MAX1226BEEE+ -40°C to +85°C 16 QSOP

MAX1228BCEP+ 0°C to +70°C 20 QSOP

MAX1228BEEP+ -40°C to +85°C 20 QSOP

Pin Configurations continued at end of data sheet.

AutoShutdown is a trademark of Maxim Integrated Products, Inc.

SPI/QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

Denotes a lead(Pb)-free/RoHS-compliant package.

EP = Exposed pad (TQFN only). Connect to GND.

Ordering Information continued at end of data sheet.

Summary of content (23 pages)

PAGE 1
9-2852; Rev 5; 12/10 KIT ATION EVALU E L B A IL AVA 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference The MAX1226/MAX1228/MAX1230 are serial 12-bit analog-to-digital converters (ADCs) with an internal reference and an internal temperature sensor. These devices feature on-chip FIFO, scan mode, internal clock mode, internal averaging, and AutoShutdown™. The maximum sampling rate is 300ksps using an external clock.
PAGE 2
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V CS, SCLK, DIN, EOC, DOUT to GND.........-0.3V to (VDD + 0.3V) AIN0–AIN13, REF-/AIN_, CNVST/AIN_, REF+ to GND.........................................-0.3V to (VDD + 0.3V) Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.
PAGE 3
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference (VDD = +5V ±5%, fSAMPLE = 300kHz, fSCLK = 4.8MHz (50% duty cycle), VREF = 4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CONVERSION RATE Power-Up Time tPU Acquisition Time tACQ Conversion Time tCONV External Clock Frequency fSCLK External reference 0.8 Internal reference (Note 3) 65 Internally clocked 3.5 µs 0.
PAGE 4
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference ELECTRICAL CHARACTERISTICS (continued) (VDD = +5V ±5%, fSAMPLE = 300kHz, fSCLK = 4.8MHz (50% duty cycle), VREF = 4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (SCLK, DIN, CS, CNVST) Input Voltage Low Input Voltage High Input Hysteresis VIL (Note 8) 0.8 VIH 2.
PAGE 5
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference PARAMETER SYMBOL SCLK Clock Period tCP CONDITIONS MIN Externally clocked conversion 208 Data I/O 100 TYP MAX UNITS ns SCLK Duty Cycle tCH 60 % SCLK Fall to DOUT Transition tDOT CLOAD = 30pF 40 ns CS Rise to DOUT Disable tDOD CLOAD = 30pF 40 ns CS Fall to DOUT Enable tDOE CLOAD = 30pF 40 ns DIN to SCLK Rise Setup tDS 40 ns SCLK Rise to DIN Hold 40 tDH 0 ns CS Fall to SCLK Rise Setup Time tCSS0 40 ns CS
PAGE 6
Typical Operating Characteristics (continued) (VDD = +5V, VREF = +4.096V, fSCLK = 4.8MHz, CLOAD = 30pF, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SAMPLING RATE 80 60 40 800 600 0 200 10 1000 100 1000 1 10 FREQUENCY (kHz) 1000 100 5.05 SUPPLY CURRENT vs. TEMPERATURE fS = 300ksps 1250 SUPPLY CURRENT (µA) 0.5 4.95 1300 MAX1226/28/30 toc07 0.6 SHUTDOWN SUPPLY CURRENT (µA) 4.85 SUPPLY VOLTAGE (V) SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE 0.4 0.3 0.2 1200 1150 1100 1050 0.
PAGE 7
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE 0.1 0 -0.1 MAX1226/28/30 toc13 MAX1226/28/30 toc12 0.2 0.3 0.2 OFFSET ERROR (LSB) 4.049 0.3 OFFSET ERROR (LSB) MAX1226/28/30 toc11 4.050 0.1 0 -0.1 4.048 -0.2 4.047 -0.2 -0.3 -0.3 -15 10 35 60 85 4.75 4.85 TEMPERATURE (°C) 4.95 5.05 5.15 -40 5.25 -15 10 60 85 GAIN ERROR vs. TEMPERATURE GAIN ERROR vs. SUPPLY VOLTAGE 0 GAIN ERROR (LSB) -0.5 MAX1226/28/30 toc15 0.
PAGE 8
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference MAX1226/MAX1228/MAX1230 Pin Description 8 MAX1230 TQFN MAX1230 QSOP MAX1228 MAX1226 NAME 1, 17, 19, 25 — — — N.C. 2–12, 26, 27, 28 1–14 — — AIN0–13 Analog Inputs — — 1–10 — AIN0–9 Analog Inputs — — — 1–6 AIN0–5 FUNCTION No Connection. Not internally connected. Analog Inputs 13 15 — — REF-/AIN14 Negative Input for External Differential Reference/Analog Input 14.
PAGE 9
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference MAX1226/MAX1228/MAX1230 CS tCP tCH tCSS0 tCSH1 tCSH0 tCSS1 SCLK tDH tDS DIN tDOT tDOD tDOE DOUT Figure 1. Detailed Serial-Interface Timing Diagram CS DIN SCLK SERIAL INTERFACE OSCILLATOR CONTROL DOUT EOC CNVST AIN1 AIN2 MUX AIN15 12-BIT SAR ADC FIFO AND ACCUMULATOR TEMP SENSE REFINTERNAL REFERENCE REF+ MAX1226 MAX1228 MAX1230 Figure 2.
PAGE 10
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Converter Operation The MAX1226/MAX1228/MAX1230 ADCs use a fully differential, successive-approximation register (SAR) conversion technique and an on-chip T/H block to convert temperature and voltage signals into a 12-bit digital result. Both single-ended and differential configurations are supported, with a unipolar signal range for singleended mode and bipolar or unipolar ranges for differential mode.
PAGE 11
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference CIN+ DAC COMPARATOR + HOLD GND (SINGLE ENDED); AIN1, AIN3, AIN5…AIN15 (DIFFERENTIAL) CIN- Internal FIFO HOLD HOLD VDD/2 Figure 3. Equivalent Input Circuit appropriate bit of the bipolar or unipolar register. Unipolar mode sets the differential input range from 0 to VREF. A negative differential analog input in unipolar mode causes the digital output code to be zero. Selecting bipolar mode sets the differential input range to ±VREF / 2.
PAGE 12
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Conversion Time Calculations The conversion time for each scan is based on a number of different factors: conversion time per sample, samples per result, results per scan, if a temperature measurement is requested, and if the external reference is in use.
PAGE 13
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference BIT NAME — BIT FUNCTION 7 (MSB) Set to 1 to select conversion register. CHSEL3 6 Analog input channel select. CHSEL2 5 Analog input channel select. CHSEL1 4 Analog input channel select. CHSEL0 3 Analog input channel select. SCAN1 2 Scan mode select. SCAN0 1 Scan mode select. TEMP Set to 1 to take a single temperature 0 (LSB) measurement. The first conversion result of a scan contains temperature information.
PAGE 14
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Table 3. Setup Register* BIT NAME BIT — 7 (MSB) FUNCTION Set to zero to select setup register. — 6 Set to 1 to select setup register. CKSEL1 5 Clock mode and CNVST configuration. Resets to 1 at power-up. CKSEL0 4 Clock mode and CNVST configuration. REFSEL1 3 Reference mode configuration. REFSEL0 2 Reference mode configuration.
PAGE 15
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Power-Up Default State The MAX1226/MAX1228/MAX1230 power up with all blocks in shutdown, including the reference. All registers power up in state 00000000, except for the setup register, which powers up in clock mode 10 (CKSEL1 = 1). Temperature Measurements The MAX1226/MAX1228/MAX1230 perform temperature measurements with an internal diode-connected transistor.
PAGE 16
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Table 6. Averaging Register* BIT NAME BIT FUNCTION — 7 (MSB) Set to zero to select averaging register. — 6 Set to zero to select averaging register. — 5 Set to 1 to select averaging register. AVGON 4 Set to 1 to turn averaging on. Set to zero to turn averaging off. NAVG1 3 Configures the number of conversions for single-channel scans.
PAGE 17
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Performing Conversions in Clock Mode 00 In clock mode 00, the wake up, acquisition, conversion, and shutdown sequences are initiated through CNVST and performed automatically using the internal oscillator. Results are added to the internal FIFO to be read out later. See Figure 4 for clock mode 00 timing. Initiate a scan by setting CNVST low for at least 40ns before pulling it high again.
PAGE 18
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference CNVST (CONVERSION2) (ACQUISITION1) (ACQUISITION2) CS (CONVERSION1) SCLK DOUT MSB1 LSB1 MSB2 EOC REQUEST MULTIPLE CONVERSIONS BY SETTING CNVST LOW FOR EACH CONVERSION. Figure 5. Clock Mode 01 (CONVERSION BYTE) DIN (UP TO 514 INTERNALLY CLOCKED ACQUISITIONS AND CONVERSIONS) CS SCLK DOUT MSB1 LSB1 MSB2 EOC THE CONVERSION BYTE BEGINS THE ACQUISITION. CNVST IS NOT REQUIRED. Figure 6.
PAGE 19
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference (ACQUISITION1) (CONVERSION1) (ACQUISITION2) CS SCLK DOUT MSB1 LSB1 MSB2 EOC EXTERNALLY TIMED ACQUISITION, SAMPLING AND CONVERSION WITHOUT CNVST. Figure 7. Clock Mode 11 Initiate a conversion by writing a byte to the conversion register followed by 16 SCLK cycles. If CS is pulsed high between the eighth and ninth cycles, the pulse width must be less than 100µs.
PAGE 20
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference OUTPUT CODE OUTPUT CODE FULL-SCALE TRANSITION 11 . . . 111 011 . . . 111 V FS = REF + VCOM 2 011 . . . 110 ZS = COM 11 . . . 110 11 . . . 101 -VREF + VCOM 2 V 1 LSB = REF 4096 -FS = 000 . . . 010 000 . . . 001 FS = VREF + VCOM ZS = VCOM V 1 LSB = REF 4096 00 . . . 011 00 . . . 010 000 . . . 000 111 . . . 111 111 . . . 110 111 . . . 101 100 . . . 001 00 . . . 001 100 . . . 000 00 . . .
PAGE 21
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference ⎛ THD = 20 x log ⎜ ⎝ (V 2 2 ⎞ + V32 + V42 + V52 / V1⎟ ⎠ ) where V1 is the fundamental amplitude, and V2–V5 are the amplitudes of the first five harmonics. Spurious-Free Dynamic Range Spurious-free dynamic range (SFDR) is the ratio of the RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion component. Pin Configurations (continued) N.C. EOC DOUT DIN 25 24 23 22 N.C.
PAGE 22
MAX1226/MAX1228/MAX1230 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX1230BCEG+ 0°C to +70°C 24 QSOP MAX1230BEEG+ -40°C to +85°C 24 QSOP MAX1230BCTI+ 0°C to +70°C 28 TQFN MAX1230BETI+ -40°C to +85°C 28 TQFN +Denotes a lead(Pb)-free/RoHS-compliant package. Chip Information Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages.
PAGE 23
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference REVISION NUMBER REVISION DATE 3 2/10 Removed the A grade products from the Ordering Information table and Electrical Characteristics table 1, 3, 21 4 8/10 Added lead-free information to Ordering Information and Package Information sections; corrected soldering temperature 1, 2, 21 5 12/10 Data sheet specifications changed DESCRIPTION PAGES CHANGED 1–5, 7, 9, 22 Maxim cannot assume responsibility for use of any circuitry other tha