Datasheet

MAX1270/MAX1271
Multirange, +5V, 8-Channel,
Serial 12-Bit ADCs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +5.0V ±5%; unipolar/bipolar range; external reference mode, V
REF
= +4.096V; 4.7µF at REF; external clock; f
CLK
= 2.0MHz,
50% duty cycle (MAX127_B); f
CLK
= 1.8MHz, 50% duty cycle (MAX127_A); 18 clock/conversion cycle, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
INTERNAL REFERENCE
REF Output Voltage V
REF
T
A
= +25°C
4.076 4.096 4.116
V
MAX1270_C/MAX1271_C
±15
REF Output Tempco
TC V
REF
MAX1270_E/MAX1271_E
±30
ppm/°C
Output Short-Circuit Current 30 mA
Load Regulation 0 to 0.5mA output current (Note 5) 10 mV
Capacitive Bypass at REF 4.7 µF
Capacitive Bypass at REFADJ
0.01
µF
REFADJ Output Voltage
2.465 2.500 2.535
V
REFADJ Adjustment Range Figure 1
±1.5
%
Buffer Voltage Gain
1.638
V/V
REFERENCE INPUT (Reference buffer disabled, reference input applied to REF)
Input Voltage Range
2.40 4.18
V
Normal or STBYPD 400
Input Current V
REF
= 4.18V
FULLPD 1
µA
Normal or STBYPD 10 kΩ
Input Resistance V
REF
= 4.18V
FULLPD
4.18
MΩ
REFADJ Threshold for Buffer
Disable
V
DD
-
0.5
V
POWER REQUIREMENT
Supply Voltage V
DD
4.75 5.25
V
Bipolar range 18
Normal
Unipolar range 6 10
mA
STBYPD power-down mode (Note 6)
700
850
Supply Current I
DD
FULLPD power-down mode
120
220
µA
External reference = 4.096V
±0.1 ±0.5
Power-Supply Rejection
Ratio (Note 7)
PSRR
Internal reference
±0.5
LSB
TIMING
MAX127_A 0.1 1.8
External Clock Frequency Range
f
SCLK
MAX127_B 0.1 2.0
MHz
MAX127_A 3.3
External clock mode
(Note 8)
MAX127_B 3.0
Acquisition Phase
Internal clock mode, Figure 9 3 5
µs