Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) Internal TQFN 12

General Description

The MAX1276/MAX1278 are low-power, high-speed, seri-

al-output, 12-bit, analog-to-digital converters (ADCs) that

operate at up to 1.8Msps and have an internal reference.

These devices feature true-differential inputs, offering bet-

ter noise immunity, distortion improvements, and a wider

dynamic range over single-ended inputs. A standard

SPI™/QSPI™/MICROWIRE™ interface provides the clock

necessary for conversion. These devices easily interface

with standard digital signal processor (DSP) synchronous

serial interfaces.

The MAX1276/MAX1278 operate from a single +4.75V to

+5.25V supply voltage. The MAX1276/MAX1278 include

a 4.096V internal reference. The MAX1276 has a unipolar

analog input, while the MAX1278 has a bipolar analog

input. These devices feature a partial power-down mode

and a full power-down mode for use between conver-

sions, which lower the supply current to 2mA (typ) and

1µA (max), respectively. Also featured is a separate

power-supply input (V

), which allows direct interfacing to

+1.8V to V

digital logic. The fast conversion speed,

low-power dissipation, excellent AC performance, and DC

accuracy (±1.25 LSB INL) make the MAX1276/MAX1278

ideal for industrial process control, motor control, and

base-station applications.

The MAX1276/MAX1278 come in a 12-pin TQFN pack-

age, and are available in the extended (-40°C to +85°C)

temperature range.

Applications

Data Acquisition Communications

Bill Validation Portable Instruments

Motor Control

Features

o 1.8Msps Sampling Rate

o Only 55mW (typ) Power Dissipation

o Only 1µA (max) Shutdown Current

o High-Speed, SPI-Compatible, 3-Wire Serial Interface

o 70dB S/(N + D) at 525kHz Input Frequency

o Internal True-Differential Track/Hold (T/H)

o Internal 4.096V Reference

o No Pipeline Delays

o Small 12-Pin TQFN Package

MAX1276/MAX1278

1.8Msps, Single-Supply, Low-Power, True-

Differential, 12-Bit ADCs with Internal Reference

________________________________________________________________

Maxim Integrated Products

AIN+

N.C.

SCLK

N.C.

GND

2REF

7RGND

CNVST

DOUT

MAX1276

MAX1278

AIN-

TQFN

TOP VIEW

PART

TEMP RANGE

PIN-

PACKAGE

INPUT

MAX1276ETC+T

-40°C to +85°C

12 TQFN

Unipolar

MAX1278ETC+T

-40°C to +85°C

12 TQFN

Bipolar

Pin Configuration

Ordering Information

MAX1276

MAX1278

DOUT

AIN+

4.7μF

10μF10μF

4.75V TO +5.25V

0.01μF

+1.8V TO V

AIN-

REF

DIFFERENTIAL

INPUT

VOLTAGE

RGND

GND

CNVST

SCLK

μC/DSP

Typical Operating Circuit

19-3364; Rev 1; 4/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

SPI/QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

EVALUATION KIT

AVAILABLE

Denotes a lead(Pb)-free/RoHS-compliant package.

T = Tape and reel.

Summary of content (18 pages)

PAGE 1
9-3364; Rev 1; 4/09 KIT ATION EVALU LE B A IL A AV 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference The MAX1276/MAX1278 are low-power, high-speed, serial-output, 12-bit, analog-to-digital converters (ADCs) that operate at up to 1.8Msps and have an internal reference. These devices feature true-differential inputs, offering better noise immunity, distortion improvements, and a wider dynamic range over single-ended inputs.
PAGE 2
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V VL to GND ................-0.3V to the lower of (VDD + 0.3V) and +6V Digital Inputs to GND .................-0.3V to the lower of (VDD + 0.3V) and +6V Digital Output to GND ....................-0.3V to the lower of (VL + 0.3V) and +6V Analog Inputs and REF to GND..........-0.
PAGE 3
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference (VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP DC Leakage Current MAX ±1 UNITS µA Input Capacitance Per input pin 16 pF Input Current (Average) Time averaged at maximum throughput rate 75 µA REFERENCE OUTPUT (REF) REF Output Voltage Range Static, TA = +25°C 4.
PAGE 4
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference TIMING CHARACTERISTICS (VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCLK Pulse-Width High tCH VL = 1.8V to VDD 15.6 ns SCLK Pulse-Width Low tCL VL = 1.8V to VDD 15.6 ns SCLK Rise to DOUT Transition tDOUT CL = 30pF, VL = 4.
PAGE 5
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE (MAX1278) 0.50 1.00 MAX1276/78 toc02 0.75 0.8 0.6 0.75 0.50 0.4 0 -0.25 0.2 DNL (LSB) 0.25 INL (LSB) INL (LSB) 1.0 MAX1276/78 toc01 1.00 DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE (MAX1276) 0 -0.2 MAX1276/78 toc03 INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE (MAX1276) 0.25 0 -0.25 -0.4 -0.50 -0.75 -0.75 -0.8 -1.0 -2048 -1.
PAGE 6
Typical Operating Characteristics (continued) (VDD = +5V, VL = VDD, fSCLK = 28.8MHz, fSAMPLE = 1.8Msps, TA = -40°C to +85°C unless otherwise noted. Typical values are meas- ured at TA = +25°C.) DYNAMIC PERFORMANCE vs. INPUT FREQUENCY (MAX1278) THD vs. INPUT FREQUENCY 71.75 MAX1276/78 toc11 -86 MAX1276/78 toc10 -88 MAX1276 SNR THD (dB) DYNAMIC PERFORMANCE (dB) 72.00 71.50 MAX1278 -90 -92 71.25 -94 SINAD -96 71.00 200 300 100 500 400 200 SFDR vs.
PAGE 7
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference fIN1 fIN2 -60 -80 fIN2 -80 -120 -120 -140 0 200 400 600 800 1000 0 200 400 600 800 1000 ANALOG INPUT FREQUENCY (kHz) ANALOG INPUT FREQUENCY (kHz) VDD/VL FULL POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE VL PARTIAL/FULL POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE VDD, NO SCLK VDD, fSCLK = 28.8MHz 0.4 VL, NO SCLK 0.2 0 MAX1276/78 toc19 0.8 200 VL SUPPLY CURRENT (μA) MAX1276/78 toc18 1.
PAGE 8
Typical Operating Characteristics (continued) (VDD = +5V, VL = VDD, fSCLK = 28.8MHz, fSAMPLE = 1.8Msps, TA = -40°C to +85°C unless otherwise noted. Typical values are meas- ured at TA = +25°C.) VL SUPPLY CURRENT vs. TEMPERATURE VL SUPPLY CURRENT vs. CONVERSION RATE VL SUPPLY CURRENT (mA) 0.8 CONVERSION, fSCLK = 28.8MHz 0.6 0.4 FULL/PARTIAL POWER-DOWN, fCLK = 28.8MHz 0.2 MAX1276/78 toc23 1.0 MAX1276/78 toc22 0.8 VL = 5V 0.6 VL = 3V 0.4 VL = 1.8V 0.
PAGE 9
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference PIN NAME 1 AIN- Negative Analog Input FUNCTION 2 REF Reference Voltage Output. Internal 4.096V reference output. Bypass REF with a 0.01µF capacitor and a 4.7µF capacitor to RGND. 3 RGND 4 VDD Positive Analog Supply Voltage (+4.75V to +5.25V). Bypass VDD with a 0.01µF capacitor and a 10µF capacitor to GND. 5, 11 N.C. No Connection 6 GND Ground. GND is internally connected to EP.
PAGE 10
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference True-Differential Analog Input T/H signal bandwidth, making it possible to digitize highspeed transient events and measure periodic signals with bandwidths exceeding the ADC’s sampling rate by using undersampling techniques. To avoid high-frequency signals being aliased into the frequency band of interest, anti-alias filtering is recommended.
PAGE 11
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference Full power-down mode is ideal for infrequent data sampling and very low supply current applications. The MAX1276/MAX1278 have to be in partial power-down mode in order to enter full power-down mode. Perform the SCLK/CNVST sequence described above to enter partial power-down mode. Then repeat the same sequence to enter full power-down mode (see Figure 7).
PAGE 12
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference MAX1276/MAX1278 How to Start a Conversion OUTPUT CODE FULL-SCALE TRANSITION 111...111 111...110 111...101 FS = VREF ZS = 0 V 1 LSB = REF 4096 000...011 000...010 An analog-to-digital conversion is initiated by CNVST, clocked by SCLK, and the resulting data is clocked out on DOUT by SCLK. With SCLK idling high or low, a falling edge on CNVST begins a conversion.
PAGE 13
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference MAX1276/MAX1278 CNVST SCLK 1 14 16 1 DOUT 0 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 Figure 10. Continuous Conversion with Burst/Continuous Clock I/O SCK MISO +3V TO +5V CNVST SCLK DOUT MAX1276 MAX1278 SS A) SPI CS SCK MISO +3V TO +5V CNVST SCLK DOUT MAX1276 MAX1278 SS B) QSPI I/O SK SI CNVST SCLK DOUT MAX1276 MAX1278 C) MICROWIRE Figure 11.
PAGE 14
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference CNVST 8 1 9 16 SCLK DOUT HIGH-Z D11 D10 D7 D8 D9 D6 D5 D4 D3 D1 D2 HIGH-Z D0 Figure 12. SPI/MICROWIRE Serial-Interface Timing—Single Conversion (CPOL = CPHA = 0), (CPOL = CPHA = 1) CNVST SCLK 14 1 0 DOUT 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 16 D1 D0 1 0 0 Figure 13.
PAGE 15
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference VL Figure 16, where serial clock (CLOCK) drives the CLKR, and SCLK and the convert signal (CONVERT) drive the FSR and CNVST. The serial port must be set up to accept an external receive-clock and external receive-frame sync.
PAGE 16
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference CNVST SCLK 1 DOUT 1 0 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 Figure 18. DSP Interface—Single-Conversion, Continuous/Burst Clock VL ters should be configured for late framing (LAFR = 1) and for an active-low frame (LTFS = 1, LRFS = 1) signal. This is also the best way to enter the power-down modes by setting the word length to 8 bits (SLEN = 1001).
PAGE 17
1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself. This is expressed as: Aperture Jitter Aperture jitter (tAJ) is the sample-to-sample variation in the time between the samples.
PAGE 18
MAX1276/MAX1278 1.8Msps, Single-Supply, Low-Power, TrueDifferential, 12-Bit ADCs with Internal Reference Revision History REVISION NUMBER REVISION DATE 0 8/04 Initial release 1 4/09 Removed commercial temperature grade parts from data sheet DESCRIPTION PAGES CHANGED — 1–8 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.