Datasheet

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General Description

The MAX1280/MAX1281 12-bit ADCs combine an 8-chan-

nel analog-input multiplexer, high-bandwidth track/hold,

and serial interface with high conversion speed and low

power consumption. The MAX1280 operates from a single

+4.5V to +5.5V supply; the MAX1281 operates from a sin-

gle +2.7V to +3.6V supply. Both devices’ analog inputs

are software configurable for unipolar/bipolar and single-

ended/pseudo-differential operation.

The 4-wire serial interface connects directly to

SPI™/QSPI™/MICROWIRE™ devices without external

logic. A serial strobe output allows direct connection to

TMS320-family digital signal processors. The MAX1280/

MAX1281 use an external serial-interface clock to per-

form successive-approximation analog-to-digital con-

versions. Both parts feature an internal +2.5V reference

and a reference-buffer amplifier with a ±1.5% voltage-

adjustment range. An external reference with a 1V to

DD1

range may also be used.

The MAX1280/MAX1281 provide a hard-wired SHDN

pin and four software-selectable power modes (normal

operation, reduced power, fast power-down, and full

power-down). These devices can be programmed to

automatically shut down at the end of a conversion or to

operate with reduced power. When using the power-

down modes, accessing the serial interface automatical-

ly powers up the devices, and the quick turn-on time

allows them to be powered down between all conver-

sions. This technique can cut supply current to under

100µA at reduced sampling rates.

The MAX1280/MAX1281 are available in 20-pin TSSOP

packages. These devices are higher-speed versions of

the MAX146/MAX147 (for more information, see the

respective data sheet).

Applications

Portable Data Logging

Data Acquisition

Medical Instruments

Battery-Powered Instruments

Pen Digitizers

Process Control

Features

♦ 8-Channel Single-Ended or 4-Channel

Pseudo-Differential Inputs

♦ Internal Multiplexer and Track/Hold

♦ Single-Supply Operation

+4.5V to +5.5V (MAX1280)

+2.7V to +3.6V (MAX1281)

♦ Internal +2.5V Reference

♦ 400ksps Sampling Rate (MAX1280)

♦ Low Power 2.5mA (400ksps)

1.3mA (Reduced-Power Mode)

0.9mA (Fast Power-Down Mode)

2µA (Full Power-Down)

♦ SPI/QSPI/MICROWIRE/TMS320-Compatible

4-Wire Serial Interface

♦ Software-Configurable Unipolar or Bipolar Inputs

♦ 20-Pin TSSOP Package

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

MAX1280/MAX1281

400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,

Serial 12-Bit ADCs with Internal Reference

________________________________________________________________ Maxim Integrated Products 1

19-1684; Rev 2; 10/10

Pin Configuration

Ordering Information

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

TOP VIEW

TSSOP

DD1

DD2

DIN

SSTRB

DOUT

GND

REFADJ

REF

COM

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

MAX1280

MAX1281

SHDN

SCLK

EVALUATION KIT

AVAILABLE

PART

TEMP

RANGE

PIN-

PACKAGE

INL

(LSB)

MAX1280BCUP+ 0°C to +70°C 20 TSSOP ±1

MAX1280BEUP+ -40°C to +85°C 20 TSSOP ±1

MAX1281BCUP+ 0°C to +70°C 20 TSSOP ±1

MAX1281BEUP+ -40°C to +85°C 20 TSSOP ±1

+Denotes a lead(Pb)-free/RoHS-compliant package.

Summary of content (24 pages)

PAGE 1
9-1684; Rev 2; 10/10 KIT ATION EVALU E L B AVAILA 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Features The MAX1280/MAX1281 12-bit ADCs combine an 8-channel analog-input multiplexer, high-bandwidth track/hold, and serial interface with high conversion speed and low power consumption. The MAX1280 operates from a single +4.5V to +5.5V supply; the MAX1281 operates from a single +2.7V to +3.6V supply.
PAGE 2
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference ABSOLUTE MAXIMUM RATINGS VDD_ to GND ............................................................ -0.3V to +6V VDD1 to VDD2 ........................................................ -0.3V to +0.3V CH0–CH7, COM to GND.......................... -0.3V to (VDD1 + 0.3V) REF, REFADJ to GND .............................. -0.3V to (VDD1 + 0.3V) Digital Inputs to GND ......................................
PAGE 3
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference (VDD1 = VDD2 = +4.5V to +5.5V, COM = GND, fSCLK = 6.4MHz, 50% duty cycle, 16 clocks/conversion cycle (400ksps), external +2.5V at REF, REFADJ = VDD1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference ELECTRICAL CHARACTERISTICS—MAX1280 (continued) (VDD1 = VDD2 = +4.5V to +5.5V, COM = GND, fSCLK = 6.4MHz, 50% duty cycle, 16 clocks/conversion cycle (400ksps), external +2.5V at REF, REFADJ = VDD1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.
PAGE 5
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference (VDD1 = VDD2 = +2.7V to +3.6V, COM = GND, fSCLK = 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle (300ksps), external +2.5V at REF, REFADJ = VDD1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CONVERSION RATE Conversion Time (Note 5) tCONV Normal operating mode Track/Hold Acquisition Time tACQ Normal operating mode 3.
PAGE 6
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference ELECTRICAL CHARACTERISTICS—MAX1281 (continued) (VDD1 = VDD2 = +2.7V to +3.6V, COM = GND, fSCLK = 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle (300ksps), external +2.5V at REF, REFADJ = VDD1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.
PAGE 7
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference (Figures 1, 2, 6, 7; VDD1 = VDD2 = +2.7V to +3.6V; TA = TMIN to TMAX; unless otherwise noted.
PAGE 8
Typical Operating Characteristics (MAX1280: VDD1 = VDD2 = 5.0V, fSCLK = 6.4MHz; MAX1281: VDD1 = VDD2 = 3.0V, fSCLK = 4.8MHz; CLOAD = 20pF, 4.7µF capacitor at REF, 0.01µF capacitor at REFADJ, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE (CONVERTING) DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE 0.4 0.4 SUPPLY CURRENT (mA) 0.2 DNL (LSB) 0.1 0 0 -0.2 -0.1 2.5 2.0 -0.4 -0.2 -0.3 -0.6 0 500 1000 1500 2000 2500 3000 3500 4000 4500 1.5 0 2.
PAGE 9
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference MAX1281 2.4994 2.4992 -1.0 -1.5 -2.0 0 20 40 60 80 2.7 100 3.0 MAX1280/1-12 -1.5 3.3 3.6 -40 -15 GAIN ERROR vs. SUPPLY VOLTAGE 35 60 85 GAIN ERROR vs. TEMPERATURE 0.5 MAX1280/1-13 1 10 TEMPERATURE (°C) VDD (V) TEMPERATURE (°C) MAX1281 0 GAIN ERROR (LSB) 0 GAIN ERROR (LSB) -20 -1.0 -2.5 -2.5 -40 -0.5 -2.0 2.4990 2.4988 0 OFFSET ERROR (LSB) -0.5 OFFSET ERROR (LSB) 2.
PAGE 10
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference MAX1280/MAX1281 Pin Description PIN NAME FUNCTION 1–8 CH0–CH7 9 COM Ground Reference for Analog Inputs. COM sets zero-code voltage in single-ended mode. Must be stable to ±0.5LSB. 10 SHDN Active-Low Shutdown Input. Pulling SHDN low shuts down the device, reducing supply current to 2µA (typ). 11 REF Reference-Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion.
PAGE 11
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference The MAX1280/MAX1281 analog-to-digital converters (ADCs) use a successive-approximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to a 12-bit digital output. A flexible serial interface provides easy interface to microprocessors (µPs). Figure 3 shows a functional diagram of the MAX1280/MAX1281.
PAGE 12
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Track/Hold Input Bandwidth The T/H enters its tracking mode on the falling clock edge after the fifth bit of the 8-bit control word has been shifted in. It enters its hold mode on the falling clock edge after the eighth bit of the control word has been shifted in. If the converter is set up for single-ended inputs, IN- is connected to COM and the converter converts the “+” input.
PAGE 13
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference MAX1280/MAX1281 CS tACQ SCLK 1 4 8 9 12 16 20 24 SEL SEL SEL UNI/ SGL/ PD1 PD0 2 1 0 BIP DIF DIN START SSTRB HIGH-Z HIGH-Z RB2 RB1 RB3 HIGH-Z HIGH-Z DOUT B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 ACQUISITION IDLE CONVERSION IDLE Figure 6. Single-Conversion Timing high for one clock period before the MSB of the 12-bit conversion result is shifted out of DOUT.
PAGE 14
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Table 1. Control-Byte Format BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB) START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 BIT NAME DESCRIPTION 7 (MSB) START The first logic “1” bit after CS goes low defines the beginning of the control byte. 6 5 4 SEL2 SEL1 SEL0 These three bits select which of the eight channels are used for the conversion (Tables 2 and 3).
PAGE 15
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference MAX1280/MAX1281 CS tCSW tCSS tCH tCP tCL tCSO tCSH tCS1 SCLK tDS tDH tDOH DIN tDOV tDOD tDOE DOUT tSTE tSTH tSTV tSTD SSTRB Figure 7. Detailed Serial-Interface Timing Serial Clock The external serial clock not only shifts data in and out, but also drives the analog-to-digital conversion steps. SSTRB pulses high for one clock period after the last bit of the control byte.
PAGE 16
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference CS DIN S S CONTROL BYTE 0 1 8 12 CONTROL BYTE 1 16 1 5 S 8 12 CONTROL BYTE 2 16 1 5 S 8 12 16 1 B11 B6 ETC 5 SCLK DOUT HIGH-Z B11 B6 B0 B11 CONVERSION RESULT 0 SSTRB B6 B0 CONVERSION RESULT 1 HIGH-Z Figure 8. Continuous 16-Clock/Conversion Timing Table 4.
PAGE 17
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Hardware Power-Down Pulling SHDN low places the converter in hardware power-down. Unlike software power-down mode, the conversion is terminated immediately. When returning to normal operation from SHDN with an external reference, the MAX1280/MAX1281 can be considered fully powered-up within 2µs of actively pulling SHDN high.
PAGE 18
power consumption using the specified power-down mode, with the internal reference and the maximum clock speed. The clock speed in FASTPD or REDP should be limited to 4.8MHz for the MAX1280/ MAX1281. FULLPD mode may provide increased power savings in applications where the MAX1280/ MAX1281 are inactive for long periods of time, but where intermittent bursts of high-speed conversions are required. Internal and External References The MAX1280/MAX1281 can be used with an internal or external reference.
PAGE 19
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference MAX1280/MAX1281 +3.3V OUTPUT CODE 24kΩ MAX1281 510kΩ 100kΩ 12 011 . . . 111 FS = VREF + VCOM 2 011 . . . 110 ZS = COM REFADJ -VREF + VCOM 2 V 1 LSB = REF 4096 -FS = 000 . . . 010 0.01µF 000 . . . 001 000 . . . 000 111 . . . 111 111 . . . 110 Figure 13. MAX1281 Reference-Adjust Circuit 111 . . . 101 100 . . . 001 OUTPUT CODE 100 . . . 000 FULL-SCALE TRANSITION 11 . . . 111 - FS 11 . . .
PAGE 20
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Table 5. Full Scale and Zero Scale UNIPOLAR MODE BIPOLAR MODE Full Scale Zero Scale Positive Full Scale VREF + VCOM COM VREF / 2 + VCOM 2) SUPPLIES VDD1 3) VDD2 GND R* = 10Ω 4) VDD1 GND COM VDD2 VDD DGND DIGITAL CIRCUITRY MAX1280 MAX1281 5) *OPTIONAL Figure 16.
PAGE 21
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference ANALOG INPUTS VDD1 +3V OR +5V 1 CH0 VDD1 20 2 CH1 VDD2 19 (POWER SUPPLIES) 3 CH2 SCLK 18 SCK 4 CH3 MAX1280 MAX1281 0.1µF 10µF CS 17 PCS0 DIN 16 MOSI 5 CH4 6 CH5 SSTRB 15 7 CH6 DOUT 14 8 CH7 GND 13 9 COM REFADJ 12 10 SHDN REF 11 MAX1280/MAX1281 +3V OR +5V MC683XX MISO 4.7µF 0.01µF (GND) Figure 17.
PAGE 22
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference CS SCLK DIN SSTRB START SEL2 SEL1 SEL0 UNI/BIP SGI/DIF PD1 PD0 HIGH IMPEDANCE DOUT MSB B10 B1 B0 HIGH IMPEDANCE Figure 19. MAX1280/MAX1281-to-TMS320 Serial Interface Effective Number of Bits Spurious-Free Dynamic Range Effective number of bits (ENOB) indicates the global accuracy of an ADC at a specific input frequency and sampling rate.
PAGE 23
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference PROCESS: BiCMOS For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
PAGE 24
MAX1280/MAX1281 400ksps/300ksps, Single-Supply, Low-Power, 8-Channel, Serial 12-Bit ADCs with Internal Reference Revision History REVISION NUMBER REVISION DATE 0 5/00 Initial release 1 4/10 Changed specifications due to single pass flow qualifications and added leadfree information 1–5 2 10/10 Changed multiplexer leakage current condition, added note to supply current condition, changed Note 11, changed Figures 4 and 12b 5, 6, 7, 11, 18 DESCRIPTION PAGES CHANGED — Maxim cannot assume respons