Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - ADC 12 Bit PDIP 24

General Description

The MAX127/MAX128 are multirange, 12-bit data acquisi-

tion systems (DAS) that require only a single +5V supply

for operation, yet accept signals at their analog inputs

that may span above the power-supply rail and below

ground. These systems provide eight analog input chan-

nels that are independently software programmable for

a variety of ranges: ±10V, ±5V, 0 to +10V, 0 to +5V for

the MAX127; and ±V

REF

, ±V

REF

/2, 0 to +V

REF

, 0 to

REF

/2 for the MAX128. This range switching increases

the effective dynamic range to 14 bits and provides the

flexibility to interface 4–20mA, ±12V, and ±15V-powered

sensors directly to a single +5V system. In addition, these

converters are fault protected to ±16.5V; a fault condition

on any channel will not affect the conversion result of the

selected channel. Other features include a 5MHz band-

width track/hold, an 8ksps throughput rate, and the option

of an internal 4.096V or external reference.

The MAX127/MAX128 feature a 2-wire, I

C-compatible

serial interface that allows communication among multiple

devices using SDA and SCL lines.

A hardware shutdown input (SHDN) and two softwarepro-

grammable power-down modes (standby and full power-

down) are provided for low-current shutdown between

conversions. In standby mode, the reference buffer

remains active, eliminating startup delays.

The MAX127/MAX128 are available in 24-pin narrow

PDIP or space-saving 28-pin SSOP packages.

Applications

● Industrial Control Systems

● Data-Acquisition Systems

● Robotics

● Automatic Testing

● Battery-Powered Instruments

● Medical Instruments

Features

● 12-Bit Resolution, 1/2 LSB Linearity

● +5V Single-Supply Operation

● I

C-Compatible, 2-Wire Serial Interface

● Four Software-Selectable Input Ranges

• MAX127: 0 to +10V, 0 to +5V, ±10V, ±5V

• MAX128: 0 to +V

REF

, 0 to +V

REF

/2, ±V

REF

±V

REF

● 8 Analog Input Channels

● 8ksps Sampling Rate

● ±16.5V Overvoltage-Tolerant Input Multiplexer

● Internal 4.096V or External Reference

● Two Power-Down Modes

● 24-Pin Narrow PDIP or 28-Pin SSOP Packages

Pin Configurations appear at end of data sheet.

Ordering Information continued at end of data sheet.

19-4773; Rev 1; 12/12

+Denotes a lead(Pb)-free/RoHS-compliant package.

PART TEMP RANGE PIN-PACKAGE

INL

(LSB)

MAX127ACNG+ 0°C to +70°C 24 Narrow PDIP ±1/2

MAX127ACNG+ 0°C to +70°C 24 Narrow PDIP ±1

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

DGND

µC

4.7µF

0.1µF

1kΩ

SHDN

+5V

SCL

SDA

REF

REFADJ

AGND

SCL SDA

MAX127

MAX128

ANALOG

INPUTS

0.01µF

MAX127/MAX128 Multirange, +5V, 12-Bit DAS with

2-Wire Serial Interface

Typical Operating Circuit

Ordering Information

EVALUATION KIT AVAILABLE

Summary of content (16 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface General Description The MAX127/MAX128 are multirange, 12-bit data acquisition systems (DAS) that require only a single +5V supply for operation, yet accept signals at their analog inputs that may span above the power-supply rail and below ground.
PAGE 2
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Absolute Maximum Ratings VDD to AGND...........................................................-0.3V to +6V AGND to DGND....................................................-0.3V to +0.3V CH0–CH7 to AGND...........................................................±16.5V REF to AGND............................................ -0.3V to (VDD + 0.3V) REFADJ to AGND..................................... -0.3V to (VDD + 0.3V) A0, A1, A2 to DGND.
PAGE 3
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Electrical Characteristics (continued) (VDD = +5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7μF at REF; external clock, fCLK = 400kHz; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Electrical Characteristics (continued) (VDD = +5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7μF at REF; external clock, fCLK = 400kHz; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4.18 V REFERENCE INPUT (buffer disabled, reference input applied to REF) Input Voltage Range 2.4 Input Current VREF = 4.
PAGE 5
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Electrical Characteristics (continued) (VDD = +5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7μF at REF; external clock, fCLK = 400kHz; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (SDA, SCL) Input High Threshold Voltage VIH Input Low Threshold Voltage VIL Input Hysteresis 0.7 x VDD 0.
PAGE 6
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Timing Characteristics (continued) (VDD = +4.75V to +5.25V; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7μF at REF pin; TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 100 kHz 2-WIRE STANDARD MODE SCL Clock Frequency fSCL Bus Free Time Between a STOP and START Condition tBUF 4.
PAGE 7
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Typical Operating Characteristics (VDD = +5V, external reference mode, VREF = 4.096V; 4.7μF at REF; external clock, fCLK = 400kHz; TA = +25°C, unless otherwise noted.) 5.7 5 0 1 2 3 4 5 6 5.5 7 -40 -15 SUPPLY VOLTAGE (V) 110 90 50 INTERNAL REFERENCE -40 -15 10 35 60 0.999 0.998 0.997 0.996 85 -40 -15 0.5 0.4 BIPOLAR MODE 0.2 10 35 TEMPERATURE (°C) www.maximintegrated.
PAGE 8
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Pin Description PIN NARROW PDIP SSOP NAME FUNCTION 1, 2 1, 2 VDD +5V Supply. Bypass with a 0.1μF capacitor to AGND. 3, 9, 22, 24 4, 7, 8, 11, 22, 24, 25, 28 N.C. No Connection. No internal connection. 4 3 DGND Digital Ground 5 5 SCL 6, 8, 10 6, 10, 12 A0, A2, A1 7 9 SDA Open-Drain Serial Data I/O. Input data is clocked in on the rising edge of SCL, and output data is clocked out on the falling edge of SCL.
PAGE 9
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface SDA A1 A0 SCL SERIAL INTERFACE LOGIC SHDN CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 REF A2 ANALOG INPUT MUX AND SIGNAL CONDITIONING INT CLOCK DGND IN T/H OUT REF 2.5V REFERENCE VDD AGND 10kΩ CLOCK 12-BIT SAR ADC MAX127 MAX128 AV = 1.638 REFADJ Figure 1.
PAGE 10
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Table 1. Control-Byte Format BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 START SEL2 SEL1 SEL0 RNG BIP PD1 PD0 BIT NAME 7 (MSB) START 6, 5, 4 SEL2, SEL1, SEL0 3 RNG DESCRIPTION The logic “1” received after acknowledge of a write bit (R/W = 0) defines the beginning of the control byte. These three bits select the desired “ON” channel (Table 2). Selects the full-scale input voltage range (Table 3).
PAGE 11
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Slave Address The MAX127/MAX128 have a 7-bit-long slave address. The first four bits (MSBs) of the slave address have been factory programmed and are always 0101. The logic state of the address input pins (A2–A0) determine the three LSBs of the device address (Figure 3). A maximum of eight MAX127/MAX128 devices can therefore be connected on the same bus at one time.
PAGE 12
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Start a Conversion (Write Cycle) A conversion cycle begins with the master issuing a START condition followed by seven address bits (Figure 3) and a write bit (R/W = 0). Once the eighth bit has been received and the address matches, the MAX127/MAX128 (the slave) issues an acknowledge by pulling SDA low for one clock cycle (A = 0). The master then writes the input control byte to the slave (Figure 8).
PAGE 13
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface SLAVE ADDRESS BYTE 0 MSB 1 MSB DATA BYTE LSB DATA BYTE 1 2 R LSB A 8 9 7 D11 MSB 10 11 D4 LSB A 17 18 D3 MSB 19 D0 FILLED WITH 4 ZEROS A LSB 22 23 26 27 STOP CONDITION START CONDITION Figure 10. Complete 2-Wire Serial Read Transmission The MAX127/MAX128 ignore acknowledge and notacknowledge conditions issued by the master during the read cycle.
PAGE 14
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface REF CREF 4.7µF MAX127 MAX128 AV = 1.638 +5V 100kΩ 510kΩ REFADJ 0.01µF 10kΩ 24kΩ REFADJ 0.01µF MAX127 MAX128 2.5V Figure 11a. Internal Reference Figure 12. Reference-Adjust Circuit REF MAX127 MAX128 4.096V CREF 4.7µF For hardware-controlled power-down (FULLPD), pull SHDN low. When hardware shutdown is asserted, it becomes effective immediately and any conversion in progress is aborted. VDD AV = 1.
PAGE 15
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Transfer Function Output data coding for the MAX127/MAX128 is binary in unipolar mode with 1 LSB = (FS/4096) and two’s complement binary in bipolar mode with 1 LSB = [(2 x |FS|)/4096]. Code transitions occur halfway between successive-integer LSB values. Figures 13a and 13b show the input/output (I/O) transfer functions for unipolar and bipolar operations, respectively. For full-scale (FS) values, refer to Table 3.
PAGE 16
MAX127/MAX128 Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface Chip Information Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE INL (LSB) MAX127ACAI+ 0°C to +70°C 28 SSOP ±1/2 MAX127BCAI+ 0°C to +70°C 28 SSOP ±1 MAX127AENG+ -40°C to +85°C 24 Narrow PDIP ±1/2 MAX127BENG+ -40°C to +85°C 24 Narrow PDIP ±1 MAX127AEAI+ -40°C to +85°C 28 SSOP ±1/2 MAX127BEAI+ -40°C to +85°C 28 SSOP ±1 0°C to +70°C 24 Narrow PDIP ±1 MAX128BCAI+ 0°C to +70°C 28 SSOP ±1 MAX12