Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TSSOP 20

General Description

The MAX1303 multirange, low-power, 16-bit, succes-

sive-approximation, analog-to-digital converter (ADC)

operates from a single +5V supply and achieves

throughput rates up to 115ksps. A separate digital sup-

ply allows digital interfacing with 2.7V to 5.25V systems

using the SPI-/QSPI™-/MICROWIRE

-compatible serial

interface. Partial power-down mode reduces the supply

current to 1.3mA (typ). Full power-down mode reduces

the power-supply current to 1µA (typ).

The MAX1303 provides four (single-ended) or two (true

differential) analog input channels. Each analog input

channel is independently software programmable for

seven single-ended input ranges (0V to +V

REF

/2,

-V

REF

/2 to 0V, 0V to +V

REF

, -V

REF

to 0V, ±V

REF

/4,

±V

REF

/2, and ±V

REF

), and three differential input

ranges (±V

REF

/2, ±V

REF

, ±2 x V

REF

An on-chip +4.096V reference offers a small convenient

ADC solution. The MAX1303 also accepts an external

reference voltage between 3.800V and 4.136V.

The MAX1303 is available in a 20-pin TSSOP package,

and is specified for operation from -40°C to +85°C.

Applications

Industrial Control Systems

Data-Acquisition Systems

Avionics

Robotics

Features

o Software-Programmable Input Range for Each

Channel

o Single-Ended Input Ranges

0V to +V

REF

/2, -V

REF

/2 to 0V, 0V to +V

REF

, -V

REF

to 0V, ±V

REF

/4, ±V

REF

/2, and ±V

REF

o Differential Input Ranges

±V

REF

/2, ±V

REF

, and ±2 x V

REF

o Four Single-Ended or Two Differential Analog

Inputs

o ±6V Overvoltage Tolerant Inputs

o Internal or External Reference

o 115ksps Maximum Sample Rate

o Single +5V Power Supply

o 20-Pin TSSOP Package

MAX1303

4-Channel, ±V

REF

Multirange Inputs,

Serial 16-Bit ADC

________________________________________________________________

Maxim Integrated Products

Pin Configuration

Ordering Information

AGND2

AVDD2

AGND3

REFCH1

CH0

AVDD1

AGND1

REFCAP

DVDD

DVDDO

DGNDDIN

CH3

CH2

DGNDO

DOUTSCLK

SSTRB

MAX1303

TSSOP

TOP VIEW

19-3576; Rev 2; 3/12

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

PART PIN-PACKAGE C H A N N EL S

MAX1303AEUG+ 20 TSSOP 4

MAX1303BEUG+ 20 TSSOP 4

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corp.

Note: All devices are specified over the -40°C to +85°C oper-

ating temperature range.

Denotes a lead(Pb)-free/RoHS-compliant package.

Summary of content (29 pages)

PAGE 1
9-3576; Rev 2; 3/12 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC The MAX1303 multirange, low-power, 16-bit, successive-approximation, analog-to-digital converter (ADC) operates from a single +5V supply and achieves throughput rates up to 115ksps. A separate digital supply allows digital interfacing with 2.7V to 5.25V systems using the SPI-/QSPI™-/MICROWIRE®-compatible serial interface. Partial power-down mode reduces the supply current to 1.3mA (typ).
PAGE 2
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC ABSOLUTE MAXIMUM RATINGS AVDD1 to AGND1 ....................................................-0.3V to +6V AVDD2 to AGND2 ....................................................-0.3V to +6V DVDD to DGND ........................................................-0.3V to +6V DVDDO to DGNDO ..................................................-0.3V to +6V DVDD to DVDDO......................................................-0.3V to +6V DVDD, DVDDO to AVDD1 ...
PAGE 3
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VVDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VVDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VVDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Preamplifier Supply Voltage AVDD2 4.
PAGE 6
ELECTRICAL CHARACTERISTICS (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VVDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 7
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC ANALOG SUPPLY CURRENT vs. ANALOG SUPPLY VOLTAGE DIGITAL I/O SUPPLY CURRENT vs. DIGITAL I/O SUPPLY VOLTAGE 0.26 0.53 TA = +85°C TA = +85°C 0.20 PARTIAL POWER-DOWN MODE IAVDD1 (mA) IDVDDO (mA) 0.24 MAX1303 toc05 EXTERNAL CLOCK MODE 0.22 0.55 MAX1303 toc04 0.28 TA = +25°C 0.18 0.16 0.51 TA = +25°C 0.49 TA = -40°C TA = -40°C 0.14 0.47 0.12 0.10 0.45 4.75 4.85 4.95 5.05 5.15 4.75 4.85 4.95 5.05 5.
PAGE 8
Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) PREAMPLIFIER SUPPLY CURRENT vs. CONVERSION RATE ANALOG SUPPLY CURRENT vs. CONVERSION RATE MAX1303 toc09 EXTERNAL CLOCK MODE 2.5 25 MAX1303 toc08 3.
PAGE 9
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC EXTERNAL REFERENCE INPUT CURRENT vs. EXTERNAL REFERENCE INPUT VOLTAGE +VREF/2 BIPOLAR 0.02 0 -0.02 -0.04 0.13 0.6 ±VREF/4 BIPOLAR 3.85 3.90 3.95 4.00 4.05 4.10 -0.4 -0.08 -0.8 ±VREF BIPOLAR -1.0 -40 4.15 -15 10 35 60 -40 85 -15 10 35 60 TEMPERATURE (°C) TEMPERATURE (°C) CHANNEL-TO-CHANNEL ISOLATION vs. INPUT FREQUENCY COMMON-MODE REJECTION RATIO vs. FREQUENCY INTEGRAL NONLINEARITY vs.
PAGE 10
Typical Operating Characteristics (continued) (VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range (±VREF), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.) SNR, SINAD, ENOB vs. SAMPLE RATE -SFDR, THD vs.
PAGE 11
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC -10 -20 -30 -40 65,534 SAMPLES 30,000 NUMBER OF HITS ATTENUATION (dB) 35,000 MAX1303 toc26 0 MAX1303 toc27 NOISE HISTOGRAM (CODE EDGE) FULL-POWER BANDWIDTH 25,000 20,000 15,000 10,000 -50 5000 -60 0 10 1 1000 10,000 32,769 32,770 32,771 32,772 32,773 32,774 FREQUENCY (kHz) CODE NOISE HISTOGRAM (CODE CENTER) REFERENCE VOLTAGE vs.
PAGE 12
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC MAX1303 Pin Description 12 PIN NAME FUNCTION 1 AGND1 Analog Ground 1. DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together. 2 AVDD1 Analog Supply Voltage 1. Connect AVDD1 to a +4.75V to +5.25V power-supply voltage. Bypass AVDD1 to AGND1 with a 0.1µF capacitor. 3 CH0 Analog Input Channel 0 4 CH1 Analog Input Channel 1 5 CH2 Analog Input Channel 2 6 CH3 Analog Input Channel 3 7 CS Active-Low Chip-Select Input.
PAGE 13
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Power Supplies To maintain a low-noise environment, the MAX1303 provides separate power supplies for each section of circuitry. Table 1 shows the four separate power supplies. Achieve optimal performance using separate AVDD1, AVDD2, DVDD, and DVDDO supplies. Alternatively, connect AVDD1, AVDD2, and DVDD together as close to the device as possible for a convenient power connection.
PAGE 14
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Track-and-Hold Circuitry VSJ, is a function of the channel’s input common-mode voltage: The MAX1303 features a switched-capacitor T/H architecture that allows the analog input signal to be stored as charge on sampling capacitors. See Figures 1, 2, and 3 for T/H timing and the sampling instants for each operating mode.
PAGE 15
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC MAX1303 CS SSTRB 32 31 30 BYTE 3 29 28 27 26 25 24 23 0 22 BYTE 2 21 20 19 0 18 0 17 C0 16 C1 15 C2 14 S 13 DIN 12 BYTE 1 11 9 10 8 7 6 5 4 3 2 1 SCLK BYTE 4 0 DOUT HIGH IMPEDANCE B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 fSAMPLE ≈ fSCLK/32 + fINTCLK/17 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* HOLD TRACK HOLD 100ns to 400ns 17 16 15 14 3 2 1 INTCLK** fI
PAGE 16
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC CS SSTRB B15 HIGH IMPEDANCE B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 fSAMPLE ≈ fSCLK/24 + fINTCLK/28 SAMPLING INSTANT tACQ ANALOG INPUT TRACK AND HOLD* TRACK HOLD HOLD 100ns to 400ns 28 27 26 25 14 13 12 11 10 3 2 1 INTCLK** fINTCLK ≈ 4.5MHz *TRACK AND HOLD TIMING IS CONTROLLED BY INTCLK, AND IS NOT ACCESSIBLE TO THE USER. **INTCLK IS AN INTERNAL SIGNAL AND IS NOT ACCESSIBLE TO THE USER. Figure 3.
PAGE 17
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC MAX1303 Table 3. Input Data Word Formats DATA BIT OPERATION D7 (START) D6 D5 D4 D3 D2 D1 D0 Conversion-Start Byte (Tables 4 and 5) 1 C2 C1 C0 0 0 0 0 Analog-Input Configuration Byte (Table 2) 1 C2 C1 C0 DIF/SGL R2 R1 R0 Mode-Control Byte (Table 7) 1 M2 M1 M0 1 0 0 0 CH6 CH7 Table 4.
PAGE 18
Analog Input Bandwidth The MAX1303 input-tracking circuitry has a 1.5MHz small-signal bandwidth. The 1.5MHz input bandwidth makes it possible to digitize high-speed transient events. Harmonic distortion increases when digitizing signal frequencies above 15kHz as shown in the -SFDR, THD vs. Analog Input Frequency plot in the Typical Operating Characteristics.
PAGE 19
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Digital Interface The MAX1303 features a serial interface that is compatible with SPI/QSPI and MICROWIRE devices. DIN, DOUT, SCLK, CS, and SSTRB facilitate bidirectional communication between the MAX1303 and the master at SCLK rates up to 10MHz (internal clock mode, mode 2), 3.67MHz (external clock mode, mode 0), or 4.39MHz (external acquisition mode, mode 1).
PAGE 20
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Table 6.
PAGE 21
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC • The device is configured for operation in external acquisition mode (mode 1) and previous conversionresult bits B15–B7 have clocked out of DOUT. • The device is configured for operation in internal clock mode, (mode 2) and previous conversionresult bits B15–B4 have clocked out of DOUT. Output Data Format Output data is clocked out of DOUT in offset binary format on the falling edge of SCLK, MSB first (B15).
PAGE 22
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC FSR FFFF FFFE • 8001 FSR BINARY OUTPUT CODE (LSB [hex]) FFFD 8000 7FFF 0003 0002 1 LSB = 0001 FSR x VREF 65,536 x 4.096V • 0000 0 1 2 3 32,768 65,533 65,535 INPUT VOLTAGE (LSB [DECIMAL]) (AGND1) Figure 13. Ideal Unipolar Transfer Function, Single-Ended Input, 0 to +FSR Mode Control The MAX1303 contains one byte-wide mode-control register.
PAGE 23
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC MAX1303 tCSPW tCSS CS tCL tCH tCSH 1 SCLK 8 tCP tDS DIN START SEL2 SEL1 SEL0 1 DIF/SGL R2 R1 R0 START ANALOG INPUT CONFIGURATION BYTE tDV DOUT 8 tDH M2 M1 M0 1 0 0 0 MODE CONTROL BYTE tTR HIGH IMPEDANCE HIGH IMPEDANCE HIGH IMPEDANCE Figure 14. Analog Input Configuration Byte and Mode-Control Byte Timing SSTRB tSSCS CS tCSS SCLK tDO DOUT HIGH IMPEDANCE MSB NOTE: SSTRB AND CS REMAIN LOW IN EXTERNAL CLOCK MODE (MODE 0).
PAGE 24
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Table 8. Mode-Control Bits M[2:0] M2 0 0 0 0 1 1 1 1 M1 0 0 1 1 0 0 1 1 M0 0 1 0 1 0 1 0 1 MODE External Clock (DEFAULT) External Acquisition Internal Clock Reserved Reset Reserved Partial Power-Down Full Power-Down Full Power-Down Mode (Mode 7) When M[2:0] = 111, the device enters full power-down mode and the total supply current falls to 1µA (typ). In full power-down, all analog portions of the device are powered down.
PAGE 25
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC MAX1303 V+ 4.096V SAR ADC REF IN REF 1.0µF OUT 1.0µF MAX6341 AVDD1 1x GND REFCAP MAX1303 5kΩ VRCTH 4.096V BANDGAP REFERENCE AGND1 Figure 17. External Reference Operation LOW-OFFSET DIFFERENTIAL AMPLIFIER CH0 µP CH1 MAX1303 REF BRIDGE Figure 18. Bridge Application Applications Information Noise Reduction Additional samples can be taken and averaged (oversampling) to remove the effect of transition noise on conversion results.
PAGE 26
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Bridge Application The MAX1303 converts 1kHz signals more accurately than a similar sigma-delta converter that might be considered in bridge applications. Connect the bridge to a lowoffset differential amplifier and then the true differential inputs of the MAX1303. Larger excitation voltages take advantage of more of the ±VREF/2 differential input voltage range. Select an input voltage range that matches the amplifier output.
PAGE 27
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Unipolar Endpoint Overlap Unipolar endpoint overlap is the change in offset when switching between complementary input voltage ranges. For example, the difference between the voltage that results in a 0xFFFF output in the -VREF/2 to 0V input voltage range and the voltage that results in a 0x0000 output in the 0V to +VREF/2 input voltage range is the unipolar endpoint overlap.
PAGE 28
MAX1303 4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC Chip Information Total Harmonic Distortion (THD) For the MAX1303, THD is the ratio of the RMS sum of the input signal’s first four harmonic components to the fundamental itself. This is expressed as: ⎛ V2 2 + V3 2 + V4 2 + V5 2 THD = 20 × log⎜ ⎜ V1 ⎝ ⎞ ⎟ ⎟ ⎠ where V1 is the fundamental amplitude, and V2 through V5 are the amplitudes of the 2nd- through 5th-order harmonic components.
PAGE 29
4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADC REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 5/05 Initial release 1 11/06 Revised Electrical Characteristics 3, 6 — 2 3/12 Removed MAX1302 from data sheet 1–29 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.