9-5159; Rev 1; 12/10 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Features The MAX1358B smart data-acquisition system (DAS) is based on a 16-bit, sigma-delta analog-to-digital converter (ADC) and system-support functionality for a microprocessor (µP)-based system.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ABSOLUTE MAXIMUM RATINGS Continuous Current Into Any Pin.........................................50mA Continuous Power Dissipation (TA = +70°C) 40-Pin TQFN (derate 25.6mW/°C above +70°C) ....2051.3mW Operating Temperature Range MAX1358BCTL+ .................................................0°C to +70°C MAX1358BETL+ ..............................................-40°C to +85°C Junction Temperature ..........
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Long-Term Stability CONDITIONS MIN (Note 9) TYP MAX UNITS ppm/ 1000hrs 150 f = 0.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Power-Supply Rejection Ratio PSRR AVDD = +1.8V to +3.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN SNO_, SNC_, or SCM_ = AVDD or AGND; switch connected to enabled mux input Input Capacitance TYP MAX 2.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS DVDD supply voltage UPIO_ Input High Voltage CPOUT supply voltage MIN TYP V 0.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B Table 1. Output Noise (Notes 13 and 14) OUTPUT NOISE (µVRMS) RATE (sps) 10 GAIN = 1 1.75 GAIN = 2 1.75 GAIN = 4 1.75 GAIN = 8 1.75 40 2.92 2.92 2.92 2.92 50 3.23 3.23 3.23 3.23 60 3.60 3.60 3.60 3.60 200 56.06 56.06 56.06 56.06 240 102.36 102.36 102.36 102.36 400 587.06 587.06 587.06 587.06 477 951.07 951.07 951.07 951.07 Note 13: VREF = +1.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor TIMING CHARACTERISTICS (Figures 1 and 19) (AVDD = DVDD = +1.8V to +3.6V, external VREF = +1.25V, fCLK32K = 32.768kHz (external clock), CREG = 10µF, CCPOUT = 10µF, 10µF between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B CS tCSH tCH tCYC tCSH tCSS tCL SCLK tDS tDH DIN tDV tDO tTR DOUT Figure 1. Detailed Serial-Interface Timing DVDD 6kΩ DOUT DOUT 6kΩ CLOAD = 50pF a) FOR ENABLE, HIGH IMPEDANCE TO VOH AND VOL TO VOH FOR DISABLE, VOH TO HIGH IMPEDANCE CLOAD = 50pF b) FOR ENABLE, HIGH IMPEDANCE TO VOL AND VOH TO VOL FOR DISABLE, VOL TO HIGH IMPEDANCE Figure 2.
Typical Operating Characteristics (continued) (DVDD = AVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) SLEEP MODE SHUTDOWN MODE 0.8 0.4 0.6 0 0.5 DVDD = 1.8V 2.0 DVDD = 3.0V 1.5 1.0 2.4 2.7 3.0 3.3 3.6 -15 10 35 85 60 -40 -15 10 35 60 TEMPERATURE (°C) TEMPERATURE (°C) DVDD SUPPLY CURRENT vs. TEMPERATURE AVDD SUPPLY CURRENT vs. TEMPERATURE AVDD SUPPLY CURRENT vs. TEMPERATURE 0.55 0.51 DVDD = 3.0V 0.49 0.45 -15 10 35 DVDD = 1.8V 0.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor 2.40 2.35 FLL DISABLED 2.1 2.4 2.7 3.0 3.3 3.6 1.2492 1.8 3.0 3.3 3.6 MAX1358B toc13 -50 50 150 250 350 450 REFERENCE OUTPUT VOLTAGE vs. TEMPERATURE 2.0488 2.4968 2.4966 2.4964 2.4962 50 1.250 1.249 1.248 1.247 1.246 VREF = 2.5V 150 250 350 450 550 2.4960 -50 50 VREF = 1.25V 150 250 350 450 OUTPUT CURRENT (µA) OUTPUT CURRENT (µA) REFERENCE OUTPUT VOLTAGE vs.
Typical Operating Characteristics (continued) (DVDD = AVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) REFERENCE NOISE DENSITY vs. FREQUENCY 1000 VREF = 1.25V 0 -0.002 100 INL (LSB) 50µV/div AC-COUPLED ADC INL vs. OUTPUT CODE 0.002 MAX1358B toc20 MAX1358B toc19 MAX1358B toc21 REFERENCE VOLTAGE OUTPUT NOISE (0.1Hz TO 10Hz) NOISE (nV/√Hz) MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor -0.004 VREF = 2.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor -0.0015 -0.0020 -0.0025 -0.0030 -0.0035 MAX1358B toc28 AVDD = DVDD = 1.8V VREF = 1.25V BIPOLAR MODE GAIN = 1 0.025 -0.0040 ADC MAXIMUM INL vs. PGA GAIN 0.010 0.020 0.015 0.010 AVDD = DVDD = 1.8V VREF = 1.25V BIPOLAR MODE 60sps 0.008 ADC MAXIMUM INL (%) ADC MAXIMUM INL (%) -0.0010 VREF = 1.25V BIPOLAR MODE GAIN = 1 60sps ADC MAXIMUM INL (%) -0.0005 0.030 MAX1358B toc27 0 ADC MAXIMUM vs.
Typical Operating Characteristics (continued) (DVDD = AVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) SW_ LEAKAGE CURRENT vs. INPUT VOLTAGE 1.5 TA = +55°C TA = +25°C 0.1 0 -0.1 0.5 TA = +25°C -0.2 0 0.5 1.0 1.5 2.0 2.5 0 -0.1 0 0.5 1.0 1.5 2.0 -0.3 3.0 2.5 0 0.5 1.0 1.5 2.0 2.5 SNO_ LEAKAGE CURRENT vs. INPUT VOLTAGE SNC_ LEAKAGE CURRENT vs. INPUT VOLTAGE SCM_ LEAKAGE CURRENT vs. INPUT VOLTAGE 0.10 0.20 MAX1358B toc38 TA = +85°C 0.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor DAC DNL vs. OUTPUT CODE 0.1 0 OUTPUT CODE DAC OUTPUT VOLTAGE vs. ANALOG SUPPLY VOLTAGE DAC OUTPUT VOLTAGE vs. TEMPERATURE DAC FB_ INPUT BIAS CURRENT vs. TEMPERATURE 0.62400 0.62395 VREF = 1.25V CODE = 0x200 RLOAD = 10kI 0.62390 0.62385 2.1 2.4 2.7 3.0 0.6242 0.6238 0.6230 AVDD (V) DAC GAIN ERROR vs.TEMPERATURE -15 10 MAX1358B toc49 VREF = 1.25V EXTERNAL AVDD = DVDD = 1.
Typical Operating Characteristics (continued) (DVDD = AVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) DAC OUTPUT-NOISE DENSITY vs. FREQUENCY NOISE (nV/√Hz) VREF = 1.25V AVDD = DVDD = 1.8V CODE = 3FF DAC LARGE-SIGNAL STEP RESPONSE (0x052 TO 0x3FF) MAX1358B toc52 MAX1358B toc51 1000 OUT_ = FB_ SCLK 2V/div 100 10 OUTA 500mV/div 0V 1 0.01 0.10 1.00 10.00 100.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor OP-AMP OUTPUT VOLTAGE vs. TEMPERATURE OP-AMP OUTPUT VOLTAGE vs. SUPPLY VOLTAGE 0.8984 0.8983 0.8982 MAX1358B toc59 0.49985 20µV/div AC-COUPLED 0.49980 0.49975 0.49970 0.49965 10 35 0.49960 85 60 SUPPLY VOLTAGE (V) OP-AMP OUTPUT-NOISE DENSITY vs. FREQUENCY OP-AMP UNITY-GAIN INPUT RANGE CLOSED-LOOP OP-AMP GAIN AND PHASE vs. FREQUENCY 10 MAX1358B toc61 VIN+ = 0.5V AVDD = DVDD = 1.
Typical Operating Characteristics (continued) (DVDD = AVDD = 1.8V, VREF = +1.25V, CCPOUT = 10µF, TA = +25°C, unless otherwise noted.) SPDT ON-RESISTANCE vs. TEMPERATURE VSCM_ = AVDD ISCM_ = 1mA 60 RON (I) AVDD = DVDD = 3.0V 30 50 AVDD = DVDD = 3.0V 40 20 AVDD = DVDD = 1.8V 30 -15 10 35 60 85 AVDD = DVDD = 1.8V -40 -15 10 35 60 85 -15 10 35 60 TEMPERATURE (°C) SPDT SWITCHING TIME vs. SUPPLY VOLTAGE SPST SWITCHING TIME vs. SUPPLY VOLTAGE SPDT/SPST SWITCHING TIME vs.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor CHARGE-PUMP OUTPUT VOLTAGE vs. OUTPUT CURRENT 2.1 1.8 3.4 3.2 3.1 -15 10 35 3.0 85 60 MAX1358B toc77 AVDD = DVDD = 1.8V IOUT = 10mA 60 40 20 0 0 5 10 0 2 4 6 3.10 10 8 -40 -15 15 CAPACITANCE (µF) 20 10 35 60 85 TEMPERATURE (°C) CHARGE-PUMP OUTPUT-VOLTAGE RIPPLE vs. OUTPUT CURRENT CHARGE-PUMP OUTPUT RESISTANCE vs. CAPACITANCE 80 3.18 OUTPUT CURRENT (mA) TEMPERATURE (°C) 100 3.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Pin Description PIN 24 NAME FUNCTION 1 CLK 2 UPIO2 User-Programmable Input/Output 2. See the UPIO2_CTRL Register section for functionality. Clock Output. Default is 2.457MHz output clock for the μC. 3 UPIO3 User-Programmable Input/Output 3. See the UPIO3_CTRL Register section for functionality. 4 UPIO4 User-Programmable Input/Output 4. See the UPIO4_CTRL Register section for functionality.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor PIN NAME FUNCTION 23 SWA DACA SPST Shunt Switch Input. Connects to OUTA through an SPST switch. 24 FBA DACA Force-Sense Feedback Input. Analog input to mux. 25 OUTA 26 AGND Analog Ground 27 AVDD Analog Supply Voltage. Also ADC reference voltage during AVDD measurement. Bypass to AGND with 10μF and 0.1μF capacitors in parallel as close to the pin as possible. 28 SWB DACB SPST Shunt Switch Input.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Detailed Description The MAX1358B DAS features a multiplexed differential 16-bit ADC, 10-bit force-sense DACs, an RTC with an alarm, a selectable bandgap voltage reference, a signaldetect comparator, 1.8V and 2.7V voltage monitors, and wake-up control circuitry, all controlled by a 4-wire serial interface (see Figure 3 for the functional diagram). CS SCLK DIN 32.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ADC Modulator The MAX1358B performs analog-to-digital conversions using a single-bit, 3rd-order, switched-capacitor sigmadelta modulator. The sigma-delta modulation converts the input signal into a digital pulse train whose average duty cycle represents the digitized signal information. The pulse train is then processed by a digital decimation filter.
Digital Filtering Force-Sense DAC The MAX1358B contains an on-chip digital lowpass filter that processes the data stream from the modulator using a sinc4 (sinx/x)4 response. The sinc4 filter has a settling time of four output data periods (4 x 200ms). The MAX1358B incorporates two 10-bit force-sensing DACs. The DACs’ reference voltage sets the full-scale range. Program the DACA_OP register using the serial interface to set the output voltages of the DAC at OUTA.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B DVDD LDOE CPE CPOUT 1.22V OP M32K 1.65V NONOVERLAP CLOCK GENERATOR REG CF+ REG CF- LDOE CHARGE-PUMP DOUBLER LINEAR 1.65V VOLTAGE REGULATOR Figure 5. Linear-Regulator Block Diagram Voltage Supervisors The MAX1358B provides voltage supervisors to monitor DVDD and CPOUT. The first supervisor monitors the DVDD supply voltage.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor WDTO DVDD HYSE POR LSDE 1.8VTH ANALOG 2:1 MUX CMP 2.0VTH RSTE RESET CONTROL LOGIC 1.25V LDVD LSDE DVDD (1.8V) VOLTAGE MONITOR Figure 7. DVDD Voltage-Supervisor Block Diagram as the C-002RX32-E from Epson Crystal.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor High-Frequency Clock An internal oscillator and an FLL are used to generate a 4.9152MHz ±1% high-frequency clock. This clock and derivatives are used internally by the ADC, analog switches, and PWM. This clock signal outputs to CLK. When the FLL is enabled, the high- frequency clock is locked to the 32.768kHz reference. If the FLL is disabled, the high-frequency clock is free-running.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor 32.768kHz CKSEL2 CKSEL<1:0> HFCE FLLE M32K FREQUENCY COMPARE FREQ ERROR FREQUENCY INTEGRATOR TUNE<8:0> DIGITALLY CONTROLLED OSCILLATOR CLKE 0 2:1 MUX 1, 2, 4, 8 DIVIDER CLK 1 4.9152MHz HFCLK CRDY 4.9152MHz HF OSCILLATOR AND FLL Figure 12.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Two-current method: T = q(VBE2 - VBE1)/(n k ln(VR2/VR1)) Four-current method: T = q(VBE2 + VBE3 - VBE1 - VBE4)/(n k ln((VR2 x VR3)/(VR1 x VR4)) where T is the temperature in degrees Kelvin, VBEX is the base to emitter voltage at current X, VRX is the voltage across the current-sensing resistor at current X, q is the charge on an electron, k is Boltzmann’s constant, and n is the ideality factor for the diode.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Single-Pole/Double-Throw (SPDT) Switches Serial Interface The MAX1358B provides two uncommitted SPDT switches. Each switch has a typical 35Ω on-resistance. Control the switches through the SW_CTRL register, the PWM output, and/or a UPIO port configured to control the switches (UPIO1–UPIO4_CTRL register).
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B CS SCLK X DIN 1 0 A5 A4 A3 A2 A1 A0 DN DN -1 DN-2 DN-3 D2 D1 D0 X X DOUT X = DON’T CARE. Figure 14. Serial-Interface Register Write with 8-Bit Control Word, Followed by a Variable Length Data Write CS SCLK DIN X 1 1 A5 A4 A3 A2 A1 A0 DOUT X X X X X X X DN DN-1 DN-2 DN-3 D2 D1 D0 X = DON’T CARE. Figure 15.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Register Definitions Table 4.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor ADC Register (Power-On State: 0000 0000 0000 00XX) MSB ADCE LSB STRT BIP RATE<2:0> The ADC register configures the ADC and starts a conversion. ADCE: ADC power-enable bit. ADCE = 1 powers up the ADC, and ADCE = 0 powers down the ADC. STRT: ADC start bit. STRT = 1 resets the registers inside the ADC filter and initiates a conversion or calibration.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Table 6a. Setting the ADC Conversion Rate* CONTINUOUS CONVERSION RATE (sps) SINGLE CONVERSION RATE (sps) RATE2 RATE1 RATE0 10 2.5 0 0 0 40 10 0 0 1 50 12.5 0 1 0 60 15 0 1 1 200 50 1 0 0 240 60 1 0 1 400 100 1 1 0 477 128 1 1 1 Table 6b.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB S (ADR0) MUXP3 LSB MUXP2 MUXP1 MUXP0 The MUX register configures the positive and negative mux inputs and can start an ADC conversion. S (ADR0): Conversion start bit. The S bit is the LSB of the MUX register address byte. S = 1 resets the registers inside the ADC filter and initiates a conversion or calibration.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor DATA Register (Power-On State: 0000 0000 0000 0000) MSB ADC15 ADC14 ADC13 ADC12 ADC11 ADC10 ADC9 ADC8 LSB ADC7 ADC6 ADC5 ADC4 ADC<15:0> Analog-to-digital conversion data bits. These 16 bits are the results from the most recently completed conversion. The data format is unsigned, ADC3 ADC2 ADC1 ADC0 binary for unipolar mode, and two’s complement for bipolar mode.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB DAE DBE OP1E X X X DACA9 DACA8 LSB DACA7 DACA6 DACA5 DACA4 Writing to the DACA_OP output register updates DACA on the rising SCLK edge of the LSB data bit. The output voltage can be calculated as follows: VOUTA = VREF x N/210 where VREF is the reference voltage for the DAC, and N is the integer value of the DACA<9:0> output register. The output buffer is in unity gain.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor REF_SDC Register (Power-On State: 0000 0000) MSB REFV1 LSB REFV0 AOFF AON The REF_SDC register contains bits to control the reference voltage and signal-detect comparator. REFV<1:0>: Reference buffer voltage gain and enable bits. Enables the output buffer, and sets the gain and the voltage at the REF pin as shown in Table 10.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB ASEC19 ASEC18 ASEC17 ASEC16 ASEC15 ASEC14 ASEC13 ASEC12 ASEC11 ASEC10 ASEC9 ASEC8 ASEC7 ASEC6 ASEC5 ASEC4 LSB ASEC3 ASEC2 ASEC1 ASEC0 The AL_DAY register stores the second information of the time-of-day alarm. ASEC<19:0>: Alarm-second bits. These 20 bits store the time-of-day alarm, which corresponds to the lower 20 bits of the RTC second counter or SEC<19:0>.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor CLK_CTRL Register (Power-On State: 00X0 1111 0010 1110) MSB AWE ADE X RWE RTCE OSCE FLLE HFCE LSB CKSEL2 CKSEL1 CKSEL0 IO32E The CLK_CTR register contains the control bits for the RTC alarms and clocks. AWE: Alarm write-enable bit. Set AWE = 1 to write data to the AL_DAY register as well as the ADE bit in this register.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor External clock frequencies applied to CLK32K are clock sources to the FLL, charge pump, and the signaldetect comparator. The default power-on state is 0. power in cases where the high-frequency clock is used internally but is not needed externally. If HFCE = 0, or if CLKE = 0, CLK remains low. The power-on default state is 1. INTP: Interrupt pin polarity bit.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor RTC Register (Power-On State: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000) MSB SEC31 SEC30 SEC29 SEC28 SEC27 SEC26 SEC25 SEC24 SEC23 SEC22 SEC21 SEC20 SEC19 SEC18 SEC17 SEC16 SEC15 SEC14 SEC13 SEC12 SEC11 SEC10 SEC9 SEC8 SEC7 SEC6 SEC5 SEC4 SEC3 SEC2 SEC1 SEC0 LSB SUB7 SUB6 SUB5 SUB4 The RTC register stores the 40-bit second and subsecond count of the respective t
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB PWME FSEL2 FSEL1 FSEL0 SWAH SWAL SWBH SPD1 SPD2 X X X X X SWBL LSB The PWM_CTRL register contains control bits for the 8-bit PWM. PWME: PWM-enable bit. Set PWME = 1 to enable the internal PWM, and set PWME = 0 to disable the internal PWM. Enable the high-frequency clock before enabling the PWM when using input clock frequencies above 32.768kHz. The power-on default state is 0.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor PWM_THTP Register (Power-On State: 0000 0000 0000 0000) MSB PWMTH7 PWMTH6 PWMTH5 PWMTH4 PWMTH3 PWMTH2 PWMTH1 PWMTH0 LSB PWMTP7 PWMTP6 PWMTP5 PWMTP4 The PWM_THTP register contains the bits that set the PWM on-time and period. PWMTH<7:0>: PWM time high bits. These bits define the PWM on (or high)-time and when combined with the PWMTP<7:0> bits, they determine the duty cycle and period.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor REGISTER NAME ADC DACA_OP, DACB_OP REF_SDC CLK_CTRL PWM_CTRL PS_VMONS TEMP_CTRL UPIO_CTRL CIRCUIT BLOCK DESCRIPTION POR DEFAULT NORMAL MODE SLEEP ADC ADCE = 0 ADCE OFF DACA DAE = 0 DAE OFF DACB DBE = 0 DBE OFF OP1 OP1E = 0 OP1E OFF Reference Buffer Gain and Enable REFV<1:0> = 00 REFV<1:0> OFF Signal-Detect Comparator SDCE = 0 SDCE OFF Time-of-Day Alarm Enable ADE = 0 ADE ADE R
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor SLEEP_CFG Register (Power-On State: 1100 XXXX) MSB SLP (ADR0) LSB SOSCE SCK32E SPWME SHDN The SLEEP_CFG register allows users to program specific behavior for the 32kHz oscillator, buffer, and PWM in sleep mode. It also contains a sleep-control bit (SLP) to enable sleep mode. SLP (ADR0): Sleep bit. The SLP bit is the LSB in the SLEEP_CFG address control byte.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB UP4MD3 LSB UP4MD2 UP4MD1 UP4MD0 The UPIO4_CTRL register configures the UPIO4 pin functionality. UP4MD<3:0>: UPIO4-mode selection bits. These bits configure the mode for the UPIO4 pin. See Table 16 for a detailed description. The power-on default is 0 hex. PUP4: Pullup UPIO4 control bit. Set PUP4 = 1 to enable a weak pullup resistor on the UPIO4 pin, and set PUP4 = 0 to disable it.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor UPIO2_CTRL Register (Power-On State: 0000 1000) MSB UP2MD3 LSB UP2MD2 UP2MD1 UP2MD0 The UPIO2_CTRL register configures the UPIO2 pin functionality. UP2MD<3:0>: UPIO2-mode selection bits. These bits configure the mode for the UPIO2 pin. See Table 16 for a detailed description. The power-on default is 0 hex. PUP2: Pullup UPIO2 control bit.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor UP4MD<3:0>, UP3MD<3:0>, UP2MD<3:0>, UP1MD<3:0> MODE MAX1358B Table 16. UPIO Mode Configuration DESCRIPTION 0 0 0 0 GPI General-purpose digital input. Active edges detected by UPR_ or UPF_ status register bits. ALH_ has no effect with this setting. 0 0 0 1 GPO General-purpose digital output. Logic level set by LL_ bit. ALH_ has no effect with this setting. 0 0 1 0 SWA or SWA Digital input.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor UPIO_SPI Register (Power-On State: 0000 XXXX) MSB LSB UP4S UP3S UP2S UP1S X The UPIO_SPI pass-through control register bits map the serial interface signals to the UPIO pins, allowing the DAS to drive other devices at CPOUT or DVDD voltage levels, depending on the SV_ bit setting found in the UPIO_CTRL register.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB SWA LSB SWB SPDT11 SPDT10 The switch-control register controls the two SPDT switches (SPDT1 and SPDT2) and the DACA output buffer SPST switch (SWA). Control this switch by the serial bits in this register, by any of the UPIO pins that are enabled for that function, or by the PWM. SWA: DACA output buffer SPST-switch A control bit.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor SPDT2<1:0>: Single-pole double-throw switch 2 control bits. The SPDT2<1:0> bits, the UPIO pins (if configured), and the PWM (if configured) control the state of the switch as shown in Table 19. The UPIO_ states of 0 and 1 in the table correspond to respective deasserted and asserted logic states as defined by the ALH_ bit in the UPIO_CTRL register.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MSB MLDVD MLCPD MADO MSDC MCRDY MADD MALD X LSB MUPR4 MUPR3 MUPR2 MUPR1 The IMSK register determines which bits of the STATUS register generate an interrupt on INT. The bits in this register do not mask output signals routed to UPIO since the output signals are masked by disabling that UPIO function. MLDVD: LDVD status bit mask.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor hysteresis helps eliminate chatter when running directly off unregulated batteries. If DVDD falls below +1.3V (typ), the power-on reset circuitry is enabled and the HYSE bit is deasserted setting the hysteresis back to +20mV. The power-on default is 0. RSTE: RESET output enable bit. Set RSTE = 1 to enable RESET to be controlled by the +1.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Applications Information Analog Filtering The internal digital filter does not provide rejection close to the harmonics of the modulator sample frequency. However, due to high oversampling ratios in the MAX1358B, these bands typically occupy a small fraction of the spectrum and most broadband noise is filtered.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor 2 AVDD INITIAL POWER, WAKE-UP, AND SLEEP XTAL BETWEEN 32KIN AND 32KOUT PIN 1.8V 1 0V 2 DVDD 1.8V 1 0V POR HI LO OSCE = 1 SOSCE = 1 OSCE = 1 XIN, XOUT HI (32kHz) LO CK32E = 1 RESET HI (OPEN DRAIN) LO INTERNAL EXTERNAL OUTPUT DISABLED, BUT PULLED LOW HI INTERNAL LOW DVDD DETECTOR LO CK32E = 1 SCK32E = 0 BUFFER DISABLED HI CK32K (32kHz) LO OUTPUT ENABLED UPIO (WU) HI (INT.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor VREF/GAIN VREF/GAIN BINARY OUTPUT CODE VREF (GAIN x 65,536) 1 LSB = VREF/GAIN 0111 1111 1111 1101 BINARY OUTPUT CODE 0111 1111 1111 1110 1111 1111 1111 1101 VREF x2 (GAIN x 65,536) 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 VREF/GAIN FULL-SCALE TRANSITION 1 LSB = VREF/GAIN 0111 1111 1111 1111 1111 1111 1111 1110 1111 1111 1111 1100 0000 0000 0000 0011 0000 0000 0000 0010 1000 000
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor VREF FBA MAX1358B R1 R2 10kΩ +3.3V FB_ 10kΩ VOUT OUTA DAC A DAC_ OUT_ REF FBB -3.3V 10kΩ MAX1358B 10kΩ DAC B R2 = R1 VREF = 1.25V OUTB VREF = 1.25V Figure 23. DAC Unipolar Rail-to-Rail Output Circuit Figure 24. DAC Bipolar Output Circuit In unipolar mode, the output code ranges from 0 to 65,535 for inputs from zero to full-scale.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor Input Multiplexer The mux inputs can range between AGND and AVDD. However, when the internal temperature sensor is enabled, AIN1 and AIN2 cannot exceed 0.7V. This necessitates additional circuitry to divide down the input signal. See Figure 26 for an example circuit that divides down backlight VDD to work properly with the AIN1 pin.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor VCP SERIAL-PORT INTERFACE TXD RXD VSS VSS μC VBAT EEPROM VSS MOSI SI MISO SO SCK SCK CS1 CS VCC GND VSS MAX1358B VCP BDOUT UPIO2 DIN LCD MODULE BDIN UPIO1 BSCLK UPIO3 DOUT BCS2 UPIO4 SCLK CS2 MEM UP DOWN INPUT RESET INPUT INPUT INPUT X2IN 32KIN CS2 VSS CS RESET INT HIGH-FREQUENCY MICRO CLOCK 32kHz MICRO CLOCK CLK IN1- CLK32K VSS IN1+ AVDD VBAT OUT1 DVDD VDD 2
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B μC VCP LCD GLASS COM<3:0> SEG<23:0> LCDBIAS RX_WAKEUP SERIAL-PORT INTERFACE RXD VSS LCD DRIVERS VSS BUZ_HI PIEZO ALARM BUZ_LO VBAT EEPROM VSS MOSI SI MISO SO SCK SCK CS1 CS VCC GND VSS MAX1358B CPOUT UPIO2 DIN TXD DOUT SCLK CS2 MEM UP DOWN CS2 CPOUT PWM CS UPIO4 INPUT RESET RESET OUTA INPUT INPUT INT SWA CLK FBA INPUT X2IN 32KIN HIGH-FREQUENCY MICRO CLOCK 32kHz M
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor For self-calibration, the offset value is the RAW result when the inputs are shorted internally and the gain value is 1/(RAW - OFFSET) with the reference connected to the input. This is done automatically when these modes are selected. The self-offset and gain calibration corrects for errors internal to the ADC and the results are stored and used automatically in the OFFSET CAL and GAIN CAL registers.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B AIN1 MUX PGA 16-BIT ADC REF AGND 2N3904 AV = 1, 2, 4, 8 AIN2 MAX1358B MUX AGND AV = 1, 1.638, 2 2N3904 TEMP SENSOR 1.25V REF CREF REF Figure 29. Temperature Measurement with Two Remote Sensors Parameter Definitions INL Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B DVDD CPOUT SV_ CPOUT MUX 100kΩ 200kΩ UPIO_ PWM 0.01μF μC (1.8V TO 2.6V) 100kΩ EN_ SEG ALH_ LCD DRIVERS 100kΩ n LCD COM m 100kΩ Figure 30. LCD Contrast-Adjustment Application ~1.25V REF ~19kHz VOLTAGE RIPPLE < 1mV 350kΩ MAX1358B SNO1 SCM1 PWM 240kΩ ~0.3V SNC1 SPDT1 0.1μF 60kΩ AGND IN1+ OUT1 IN1IT TRANSDUCER 0.300V (±1mV) Figure 31.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor MAX1358B VDD AVDD DVDD MAX1358B DVDD < 10μA CPOUT MUX VBATT 10MΩ VDD VOUT VIN SV_ 100μF POWER SUPPLY μC UPIO_ PWM SHDN PSCTL ON-TIME <100ms TYP 10s PERIOD TYP PSCTL EN_ +3.3V VDD +2.3V ALH_ Figure 32. Power-Supply Sleep-Mode Duty-Cycle Control DVDD MAX1358B SV_ CPOUT MUX CPOUT(+3.2V) 0V UPIO_ 1kHz TO 8kHz TYP 1kΩ PWM ~10,000pF ALH_ Figure 33.
MAX1358B 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor DVDD CPOUT MAX1358B CPOUT(+3.2V) MUX SV_ 0V UPIO_ PWM 1kHz TO 8kHz TYP 1kΩ ~10,000pF ALH_ DVDD CPOUT SV_ CPOUT + 6.4V DIFF -CPOUT MUX UPIO_ 1kΩ CPOUT(~+3.2V) 0V 1kHz TO 8kHz TYP ALH_ Figure 34. Differential Piezoelectric Buzzer Drive Chip Information PROCESS: BiCMOS 70 Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 8/10 Initial release of data sheet. The MAX1358B previously appeared on a different data sheet. 1–70 1 12/10 Changed test conditions 2–10, 12 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
