Datasheet

General Description
The MAX1470 is a fully integrated low-power CMOS
superheterodyne receiver for use with amplitude-shift-
keyed (ASK) data in the 315MHz band. With few required
external components, and a low-current power-down
mode, it is ideal for cost- and power-sensitive applica-
tions in the consumer markets. The chip consists of a
315MHz low-noise amplifier (LNA), an image rejection
mixer, a fully integrated 315MHz phase-lock-loop (PLL), a
10.7MHz IF limiting amplifier stage with received-signal-
strength indicator (RSSI) and an ASK demodulator, and
analog baseband data-recovery circuitry.
The MAX1470 is available in a 28-pin TSSOP package.
Applications
Remote Keyless Entry
Garage Door Openers
Remote Controls
Wireless Sensors
Wireless Computer Peripherals
Security Systems
Toys
Video Game Controllers
Medical Systems
Features
Operates from a Single +3.0V to +3.6V Supply
Built-In 53dB RF Image Rejection
-115dBm Receive Sensitivity*
250μs Startup Time
Low 5.5mA Operating Supply Current
1.25μA Low-Current Power-Down Mode for Efficient
Power Cycling
250MHz to 500MHz Operating Band
(Image Rejection Optimized at 315MHz)
Integrated PLL with On-Board Voltage-Controlled
Oscillator (VCO) and Loop Filter
Selectable IF Bandwidth Through External Filter
Complete Receive System from RF to Digital Data Out
Typical Application Circuit and Pin Configuration appear at
end of data sheet.
19-2135; Rev 1; 9/14
*See Note 2, AC Electrical Characteristics.
PART TEMP RANGE PIN-PACKAGE
MAX1470EUI -40°C to +85°C 28 TSSOP
LNA
LNAOUT
6
MIXIN1 MIXIN2
90°
IFIN1MIXOUT IFIN2
181712
RSSI
R
DF1
100k
R
DF2
100k
DIVIDE
BY 64
VCO
LOOP
FILTER
PHASE
DETECTOR
CRYSTAL
DRIVER
SHUTDOWN
8 9
4
IF
LIMITING
AMPS
22212619202527281
DFOPPPDOUTDSPDSNDATAOUTPWRDNXTAL1 XTAL2
5,10
13
2,7
14
AGND
DGND
DV
DD
AV
DD
LNASRC
LNAIN
DATA
SLICER
DATA
FILTER
3
Q
I
MAX1470
PEAK
DETECTOR
MAX1470 315MHz Low-Power, +3V Superheterodyne
Receiver
Functional Diagram
Ordering Information

Summary of content (12 pages)