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General Description

The MAX146/MAX147 12-bit data-acquisition systems

combine an 8-channel multiplexer, high-bandwidth

track/hold, and serial interface with high conversion

speed and low power consumption. The MAX146 oper-

ates from a single +2.7V to +3.6V supply; the MAX147

operates from a single +2.7V to +5.25V supply. Both

devices’ analog inputs are software configurable for

unipolar/bipolar and single-ended/differential operation.

The 4-wire serial interface connects directly to SPI™/

QSPI™ and MICROWIRE™ devices without external

logic. A serial strobe output allows direct connection to

TMS320-family digital signal processors. The

MAX146/MAX147 use either the internal clock or an exter-

nal serial-interface clock to perform successive-approxi-

mation analog-to-digital conversions.

The MAX146 has an internal 2.5V reference, while the

MAX147 requires an external reference. Both parts have

a reference-buffer amplifier with a ±1.5% voltage-

adjustment range.

These devices provide a hard-wired SHDN pin and a

software-selectable power-down, and can be pro-

grammed to automatically shut down at the end of a con-

version. Accessing the serial interface automatically

powers up the MAX146/MAX147, and the quick turn-on

time allows them to be shut down between all conver-

sions. This technique can cut supply current to under

60µA at reduced sampling rates.

The MAX146/MAX147 are available in 20-pin DIP and

SSOP packages.

For 4-channel versions of these devices, see the

MAX1246/MAX1247 data sheet.

________________________Applications

Portable Data Logging Data Acquisition

Medical Instruments Battery-Powered Instruments

Pen Digitizers Process Control

____________________________Features

♦ 8-Channel Single-Ended or 4-Channel

Differential Inputs

♦ Single-Supply Operation

+2.7V to +3.6V (MAX146)

+2.7V to +5.25V (MAX147)

♦ Internal 2.5V Reference (MAX146)

♦ Low Power

1.2mA (133ksps, 3V supply)

54µA (1ksps, 3V supply)

1µA (power-down mode)

♦ SPI/QSPI/MICROWIRE/TMS320-Compatible

4-Wire Serial Interface

♦ Software-Configurable Unipolar or Bipolar Inputs

♦ 20-Pin DIP/SSOP Packages

MAX146/MAX147

+2.7V, Low-Power, 8-Channel,

Serial 12-Bit ADCs

________________________________________________________________ Maxim Integrated Products 1

I/O

SCK (SK)

MOSI (SO)

MISO (SI)

SHDN

SSTRB

DOUT

DIN

SCLK

COM

AGND

DGND

CH7

4.7µF

0.1µF

CH0

0V TO

+2.5V

ANALOG

INPUTS

MAX146

CPU

+3V

VREF

0.047µF

REFADJ

Typical Operating Circuit

19-0465; Rev 2; 10/01

PART

MAX146ACPP

MAX146BCPP

MAX146ACAP 0°C to +70°C

0°C to +70°C

TEMP RANGE PIN-PACKAGE

20 Plastic DIP

20 SSOP

EVALUATION KIT

AVAILABLE

Ordering Information

Ordering Information continued at end of data sheet.

*Dice are specified at T

= +25°C, DC parameters only.

MAX146BCAP 0°C to +70°C 20 SSOP

INL

(LSB)

±1/2

±1

±1/2

±1

SPI and QSPI are registered trademarks of Motorola, Inc.

MICROWIRE is a registered trademark of National Semiconductor

Corp.

Pin Configuration appears at end of data sheet.

MAX146BC/D 0°C to +70°C Dice* ±1

Summary of content (24 pages)

PAGE 1
9-0465; Rev 2; 10/01 KIT ATION EVALU E L B A AVAIL +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs These devices provide a hard-wired SHDN pin and a software-selectable power-down, and can be programmed to automatically shut down at the end of a conversion. Accessing the serial interface automatically powers up the MAX146/MAX147, and the quick turn-on time allows them to be shut down between all conversions. This technique can cut supply current to under 60µA at reduced sampling rates.
PAGE 2
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs ABSOLUTE MAXIMUM RATINGS VDD to AGND, DGND................................................. -0.3V to 6V AGND to DGND ...................................................... -0.3V to 0.3V CH0–CH7, COM to AGND, DGND ............ -0.3V to (VDD + 0.3V) VREF, REFADJ to AGND ........................... -0.3V to (VDD + 0.3V) Digital Inputs to DGND .............................................. -0.3V to 6V Digital Outputs to DGND ........................
PAGE 3
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs (VDD = +2.7V to +3.6V (MAX146); VDD = +2.7V to +5.25V (MAX147); COM = 0; fSCLK = 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX146—4.7µF capacitor at VREF pin; MAX147—external reference, VREF = 2.500 V applied to VREF pin; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER Track/Hold Acquisition Time SYMBOL CONDITIONS MIN TYP tACQ MAX UNITS 1.
PAGE 4
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +3.6V (MAX146); VDD = +2.7V to +5.25V (MAX147); COM = 0; fSCLK = 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX146—4.7µF capacitor at VREF pin; MAX147—external reference, VREF = 2.500 V applied to VREF pin; TA = TMIN to TMAX; unless otherwise noted.
PAGE 5
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs (VDD = +2.7V to +3.6V (MAX146); VDD = +2.7V to +5.25V (MAX147); TA = TMIN to TMAX; unless otherwise noted.) PARAMETER SYMBOL Acquisition Time CONDITIONS MIN TYP MAX UNITS tACQ 1.
PAGE 6
Typical Operating Characteristics (continued) (VDD = 3.0V, VREF = 2.5V, fSCLK = 2.0MHz, CLOAD = 20pF, TA = +25°C, unless otherwise noted.) MAX146 1.25 1.00 CLOAD = 20pF 0.75 2.75 3.25 3.75 4.25 4.75 2.5015 2.5 2.5010 2.0 1.5 2.5005 2.5000 1.0 2.4995 0.5 0 2.25 5.25 2.75 3.25 3.75 4.25 4.75 2.4990 2.25 5.25 2.75 3.25 3.75 4.25 VDD (V) VDD (V) SUPPLY CURRENT vs. TEMPERATURE SHUTDOWN CURRENT vs. TEMPERATURE INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE MAX147 VDD = 3.6V 2.
PAGE 7
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs 0.45 0.35 0.25 0.20 0.40 0.30 0.25 0.20 0.35 0.30 0.25 0.20 0.15 0.15 0.10 0.10 0.10 0.05 0.05 0.05 0 2.25 2.75 3.75 4.25 VDD (V) 3.25 4.75 0 2.25 5.25 2.75 0.45 0.35 GAIN ERROR (LSB) 0.35 0.20 4.75 0.15 0 2.25 5.25 0.45 0.30 0.25 0.20 0.35 0.30 0.25 0.20 0.10 0.05 0.05 0.15 0 95 0 -55 120 145 TEMPERATURE (˚C) -30 -5 20 45 70 95 TEMPERATURE (˚C) CHANNEL-TO-CHANNEL OFFSET MATCHING vs. SUPPLY VOLTAGE 0.40 0.35 0.
PAGE 8
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs ______________________________________________________________Pin Description PIN NAME FUNCTION 1–8 CH0–CH7 9 COM Ground reference for analog inputs. COM sets zero-code voltage in single-ended mode. Must be stable to ±0.5LSB. 10 SHDN Three-Level Shutdown Input. Pulling SHDN low shuts the MAX146/MAX147 down; otherwise, they are fully operational. Pulling SHDN high puts the reference-buffer amplifier in internal compensation mode.
PAGE 9
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs The MAX146/MAX147 analog-to-digital converters (ADCs) use a successive-approximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to a 12-bit digital output. A flexible serial interface provides easy interface to microprocessors (µPs). Figure 3 is a block diagram of the MAX146/ MAX147.
PAGE 10
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs Analog Input Protection The time required for the T/H to acquire an input signal is a function of how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisition time lengthens, and more time must be allowed between conversions. The acquisition time, tACQ, is the maximum time the device takes to acquire the signal, and is also the minimum time needed for the signal to be acquired.
PAGE 11
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB) START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 BIT NAME DESCRIPTION 7(MSB) START The first logic “1” bit after CS goes low defines the beginning of the control byte. 6 5 4 SEL2 SEL1 SEL0 These three bits select which of the eight channels are used for the conversion (Tables 2 and 3). 3 UNI/BIP 1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode.
PAGE 12
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs How to Start a Conversion 4) Transmit a byte of all zeros ($00 hex) and, simultaneously, receive byte RB2. Start a conversion by clocking a control byte into DIN. With CS low, each rising edge on SCLK clocks a bit from DIN into the MAX146/MAX147’s internal shift register. After CS falls, the first arriving logic “1” bit defines the control byte’s MSB.
PAGE 13
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs MAX146/MAX147 ••• CS tCSH tCSS tCH tCL SCLK tCSH ••• tDS tDH ••• DIN tDV tDO tTR ••• DOUT Figure 7. Detailed Serial-Interface Timing ••• CS ••• tSTR tSDV SSTRB ••• ••• tSSTRB SCLK •••• tSSTRB •••• PD0 CLOCKED IN Figure 8. External Clock Mode SSTRB Detailed Timing External Clock In external clock mode, the external clock not only shifts data in and out, but it also drives the analog-to-digital conversion steps.
PAGE 14
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs processor’s convenience, at any clock rate from 0MHz to 2MHz. SSTRB goes low at the start of the conversion and then goes high when the conversion is complete. SSTRB is low for a maximum of 7.5µs (SHDN = FLOAT), during which time SCLK should remain low for best noise performance. not need to be held low once a conversion is started.
PAGE 15
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs The first high bit clocked into DIN with CS low any time the converter is idle; e.g., after VDD is applied. Applications Information OR Power-On Reset The first high bit clocked into DIN after bit 5 of a conversion in progress is clocked onto the DOUT pin. When power is first applied, and if SHDN is not pulled low, internal power-on reset circuitry activates the MAX146/MAX147 in internal clock mode, ready to convert with SSTRB = high.
PAGE 16
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs Reference-Buffer Compensation In addition to its shutdown function, SHDN selects internal or external compensation. The compensation affects both power-up time and maximum conversion speed. The100kHz minimum clock rate is limited by droop on the sample-and-hold and is independent of the compensation used. Float SHDN to select external compensation. The Typical Operating Circuit uses a 4.7µF capacitor at VREF. A 4.
PAGE 17
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs MAX146/MAX147 CLOCK MODE EXTERNAL EXTERNAL SHDN SETS SOFTWARE POWER-DOWN SETS EXTERNAL CLOCK MODE DIN S X X X X X 1 1 DOUT S X X X X X 0 0 SETS EXTERNAL CLOCK MODE S X X X X X 1 1 VALID DATA 12 DATA BITS 12 DATA BITS POWERED UP POWERED UP MODE SOFTWARE POWER-DOWN INVALID DATA HARDWARE POWERDOWN POWERED UP Figure 12a.
PAGE 18
Power-Down Sequencing The MAX146/MAX147 auto power-down modes can save considerable power when operating at less than maximum sample rates. Figures 13, 14a, and 14b show the average supply current as a function of the sampling rate. The following discussion illustrates the various power-down sequences. Lowest Power at up to 500 Conversions/Channel/Second The following examples show two different power-down sequences.
PAGE 19
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs MAX146/MAX147 COMPLETE CONVERSION SEQUENCE 9ms WAIT DIN CH1 (ZEROS) 1 00 FULLPD 1 01 1 11 FASTPD (ZEROS) CH7 1 00 NOPD 1 FULLPD 01 FASTPD 1.21V REFADJ 0V 2.50V τ = RC = 20kΩ x CREFADJ VREF 0V tBUFFER ≈ 200µs Figure 15. MAX146 FULLPD/FASTPD Power-Up Sequence Lowest Power at Higher Throughputs Figure 14b shows the power consumption with external-reference compensation in fast power-down, with one and eight channels converted. The external 4.
PAGE 20
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs VREF, the DC input resistance is a minimum of 18kΩ. During conversion, an external reference at VREF must deliver up to 350µA DC load current and have 10Ω or less output impedance. If the reference has a higher output impedance or is noisy, bypass it close to the VREF pin with a 4.7µF capacitor. Using the REFADJ input makes buffering the external reference unnecessary.
PAGE 21
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs MAX146/MAX147 OUTPUT CODE 011 . . . 111 FS = VREF + COM 2 011 . . . 110 ZS = COM 000 . . . 010 000 . . . 001 -FS = +3V -VREF + COM 2 1LSB = 000 . . . 000 SUPPLIES +3V GND +3V DGND VREF 4096 R* = 10Ω 111 . . . 111 111 . . . 110 111 . . . 101 VDD AGND 100 . . . 001 100 . . . 000 MAX146 MAX147 - FS COM* COM DGND DIGITAL CIRCUITRY +FS - 1LSB *OPTIONAL INPUT VOLTAGE (LSB) *COM ≤ VREF / 2 Figure 18.
PAGE 22
MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs +3V 0.1µF ANALOG INPUTS +3V 1µF (POWER SUPPLIES) 1 CH0 VDD 20 2 CH1 SCLK 19 3 CH2 CS 18 PCS0 4 CH3 DIN 17 MOSI 5 CH4 6 CH5 DOUT 15 7 CH6 DGND 14 8 CH7 AGND 13 9 COM REFADJ 12 10 SHDN VREF 11 MAX146 MAX147 SCK MC683XX SSTRB 16 MISO (GND) 0.1µF +2.5V Figure 20. MAX146/MAX147 QSPI Connections, External Reference XF CLKX CS SCLK TMS320LC3x MAX146 MAX147 CLKR DX DIN DR DOUT FSR SSTRB Figure 21.
PAGE 23
+2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs MAX146/MAX147 CS SCLK DIN START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 HIGH IMPEDANCE SSTRB DOUT MSB B10 B1 HIGH IMPEDANCE LSB Figure 22.
PAGE 24
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 2 SSOP.EPS MAX146/MAX147 +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs 1 INCHES E MILLIMETERS DIM MIN MAX MIN MAX A 0.068 0.078 1.73 1.99 A1 0.002 0.008 0.05 0.21 B 0.010 0.015 0.25 0.38 C D 0.20 0.09 0.004 0.008 SEE VARIATIONS E 0.205 H e 0.212 0.0256 BSC 5.