Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) Internal SSOP 20

+2.7V to +5.25V, Low-Power, 8-Channel,

Serial 10-Bit ADCs

MAX148/MAX149

For pricing, delivery, and ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

General Description

The MAX148/MAX149 10-bit data-acquisition systems

combine an 8-channel multiplexer, high-bandwidth

track/hold, and serial interface with high conversion

speed and low power consumption. They operate from a

single +2.7V to +5.25V supply, and sample to 133ksps.

Both devices’ analog inputs are software configurable for

unipolar/bipolar and single-ended/differential operation.

The 4-wire serial interface connects directly to SPI/

QSPIK and MICROWIREK devices without external

logic. A serial-strobe output allows direct connection to

TMS320-family digital signal processors. The MAX148/

MAX149 use either the internal clock or an external seri-

al-interface clock to perform successive-approximation

analog-to-digital conversions.

The MAX149 has an internal 2.5V reference, while the

MAX148 requires an external reference. Both parts

have a reference-buffer amplifier with a Q1.5% voltage-

adjustment range.

These devices provide a hard-wired SHDN pin and

a software-selectable power-down, and can be pro-

grammed to automatically shut down at the end of a

conversion. Accessing the serial interface automatically

powers up the MAX148/MAX149, and the quick turn-on

time allows them to be shut down between all conver-

sions. This technique can cut supply current to under

60FA at reduced sampling rates.

The MAX148/MAX149 are available in 20-pin PDIP and

20-pin SSOP packages.

For 4-channel versions of these devices, see the

MAX1248/MAX1249 data sheet.

Applications

Portable Data Logging

Data Acquisition

Medical Instruments

Battery-Powered Instruments

Pen Digitizers

Process Control

Features

S 8-Channel Single-Ended or 4-Channel Differential

Inputs

S Single-Supply Operation: +2.7V to +5.25V

S Internal 2.5V Reference (MAX149)

S Low Power: 1.2mA (133ksps, 3V Supply)

54µA (1ksps, 3V Supply)

1µA (Power-Down Mode)

S SPI/QSPI/MICROWIRE/TMS320-Compatible 4-Wire

Serial Interface

S Software-Configurable Unipolar or Bipolar Inputs

S 20-Pin DIP/SSOP Packages

19-0464; Rev 5; 1/12

Typical Operating Circuit

Ordering Information

Ordering Information continued at end of data sheet.

†

Contact factory for availability of alternate surface-mount

package.

+Denotes a lead(Pb)-free/RoHS-compliant package.

Pin Configuration appears at end of data sheet.

QSPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.

PART† TEMP RANGE

PIN-

PACKAGE

INL

(LSB)

MAX148ACPP+ 0°C to +70°C 20 PDIP ±1/2

MAX148BCPP+ 0°C to +70°C 20 PDIP ±1

MAX148ACAP+ 0°C to +70°C 20 SSOP ±1/2

MAX148BCAP+ 0°C to +70°C 20 SSOP ±1

CPU

DGND

AGND

COM

SCLK

DIN

DOUT

SSTRB

READJ

REF

CH7

CH0

+3V

0.1FF

4.7FF

O TO

+2.5V

ANALOG

INPUTS

0.01FF

I/O

SCK (SK)

MOSI (SO)

MISO (SI)

MAX149

SHDN

Summary of content (23 pages)

PAGE 1
9-0464; Rev 5; 1/12 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs Features The MAX148/MAX149 10-bit data-acquisition systems combine an 8-channel multiplexer, high-bandwidth track/hold, and serial interface with high conversion speed and low power consumption. They operate from a single +2.7V to +5.25V supply, and sample to 133ksps. Both devices’ analog inputs are software configurable for unipolar/bipolar and single-ended/differential operation.
PAGE 2
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs ABSOLUTE MAXIMUM RATINGS VDD to AGND, DGND...............................................-0.3V to +6V AGND to DGND....................................................-0.3V to +0.3V CH0–CH7, COM to AGND, DGND............ -0.3V to (VDD + 0.3V) VREF, REFADJ to AGND............................-0.3V to (VDD + 0.3V) Digital Inputs to DGND............................................-0.3V to +6V Digital Outputs to DGND.........................
PAGE 3
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs (VDD = +2.7V to +5.25V; COM = 0; fSCLK = 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX149—4.7FF capacitor at VREF pin; MAX148—external reference, VREF = 2.500V applied to VREF pin; TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CONVERSION RATE (continued) Internal Clock Frequency External Clock Frequency SHDN = unconnected 1.
PAGE 4
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.25V; COM = 0; fSCLK = 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX149—4.7FF capacitor at VREF pin; MAX148—external reference, VREF = 2.500V applied to VREF pin; TA = TMIN to TMAX, unless otherwise noted.
PAGE 5
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs (VDD = +2.7V to +5.25V, TA = TMIN to TMAX, unless otherwise noted.
PAGE 6
Typical Operating Characteristics (VDD = 3.0V, VREF = 2.500V, fSCLK = 2.0MHz, CLOAD = 20pF, TA = +25NC, unless otherwise noted.) MAX149 0.075 0.050 MAX148 -0.05 VDD = 2.7V 0.100 INL (LSB) 0 0.125 MAX148-MAX149 toc02 0.100 INL (LSB) 0.05 INL (LSB) 0.125 MAX148-MAX149 toc01 0.10 INTEGRAL NONLINEARITY vs. TEMPERATURE MAX148-MAX149 toc03 INTEGRAL NONLINEARITY vs. SUPPLY VOLTAGE INTEGRAL NONLINEARITY vs. CODE MAX149 0.075 0.050 MAX148 0.025 0.025 -0.10 0 1024 0 2.
PAGE 7
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs PIN NAME 1–8 CH0–CH7 9 COM Ground Reference for Analog Inputs. COM sets zero-code voltage in single-ended mode. Must be stable to ±0.5 LSB. SHDN Three-Level Shutdown Input. Pulling SHDN low shuts the MAX148/MAX149 down; otherwise, they are fully operational. Pulling SHDN high puts the reference-buffer amplifier in internal compensation mode. Leaving SHDN unconnected puts the reference-buffer amplifier in external compensation mode.
PAGE 8
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs Detailed Description The MAX148/MAX149 analog-to-digital converters (ADCs) use a successive-approximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to a 10-bit digital output. A flexible serial interface provides easy interface to microprocessors (FPs). Figure 3 is a block diagram of the MAX148/ MAX149.
PAGE 9
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs +3V MAX148/MAX149 VDD OSCILLOSCOPE 0.1µF DGND SCLK AGND MAX148 MAX149 0 TO +2.500V ANALOG INPUT 0.01µF +3V CH7 1000pF MAX872 SSTRB CS DOUT* SCLK +3V 2.5V VOUT COM REFADJ VREF C1 0.1µF +3V DIN 2MHz OSCILLATOR CH1 CH2 CH3 CH4 DOUT SSTRB COMP SHDN N.C. OPTIONAL FOR MAX149, REQUIRED FOR MAX148 *FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FFF (HEX) Figure 5. Quick-Look Circuit allowed between conversions.
PAGE 10
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs Table 1. Control-Byte Format BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB) START SEL2 SEL1 SEL0 UNI/BIP SGL//DIF PD1 PD0 BIT NAME 7(MSB) START 6 5 4 SEL2 SEL1 SEL0 These three bits select which of the eight channels are used for the conversion (Tables 2 and 3) 3 UNI/BIP 1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode.
PAGE 11
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs SEL2 SEL1 SEL0 CH0 CH1 0 0 0 + - 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 - CH2 CH3 + - CH4 CH5 + - CH6 CH7 + - - + + - + - + CS tACQ SCLK 1 DIN SSTRB 4 SEL2 SEL1 SEL0 8 UNI/ SGL/ BIP DIF PD1 12 16 20 24 PD0 START RB2 RB1 B9 MSB DOUT B8 B7 B6 RB3 B5 B4 B3 B2 B1 B0 LSB S1 S0 FILLED WITH ZEROS ACQUISITION A/D STATE IDLE 1.5Fs CONVERSION IDLE (fSCLK = 2MHz) Figure 6.
PAGE 12
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs CS tCSH tCSS tCL tCSH tCH SCLK tDS tDH DIN tDV tDO tTR DOUT Figure 7. Detailed Serial-Interface Timing CS tSDV tSTR SSRTB tSSTRB tSSTRB SCLK PD0 CLOCKED IN Figure 8. External Clock Mode SSTRB Detailed Timing The T/H acquires the input signal as the last three bits of the control byte are clocked into DIN. Bits PD1 and PD0 of the control byte program the clock mode.
PAGE 13
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs MAX148/MAX149 CS SCLK 1 3 4 5 6 7 8 9 10 11 12 18 19 20 21 22 23 24 SGL/ SEL2 SEL1 SEL0 UNI/ BIP DIF PD1 PD0 DIN SSTRB 2 START tCONV B9 MSB B8 DOUT AD STATE IDLE ACQUISITION 1.5Fs CONVERSION 7.5Fs MAX B0 LSB S1 B7 FILLED WITH S0 ZEROS IDLE (fSCLK = 2MHz)(SHDN = UNCONNECTED) Figure 9.
PAGE 14
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs Table 4. Typical Power-Up Delay Times REFERENCE BUFFER REFERENCEBUFFER COMPENSATION MODE VREF CAPACITOR (µF) POWER-DOWN MODE Enabled Internal — Enabled Internal — Enabled External Enabled External POWER-UP DELAY (µs) MAXIMUM SAMPLING RATE (ksps) Fast 5 26 Full 300 26 4.7 Fast See Figure 14c 133 4.
PAGE 15
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs MAX148/MAX149 CS 1 8 15 1 8 15 1 SCLK DIN S CONTROL BYTE 0 DOUT S CONTROL BYTE 1 S CONTROL BYTE 2 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 S1 S0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 S1 S0 CONVERSION RESULT 0 CONVERSION RESULT 1 SSTRB Figure 11a.
PAGE 16
INTERNAL CLOCK MODE SETS INTERNAL CLOCK MODE SETS POWER-DOWN 5XXXXX00 SXXXXX10 DIN S DATA VALID DOUT DATA VALID SSTRB CONVERSION CONVERSION MODE POWER-DOWN POWERED OFF POWERED UP Figure 12b. Timing Diagram Power-Down Modes, Internal Clock PD1 PD0 DEVICE MODE 0 0 Full Power-Down 0 1 Fast Power-Down 1 0 Internal Clock 1 1 External Clock Table 6.
PAGE 17
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs MAX148/9-F14B AVERAGE SUPPLY CURRENT (µA) 10,000 RLOAD = ∞ CODE = 1010101000 1000 8 CHANNELS 1 CHANNEL 100 0 1 0.1 1 10 100 1k 10k 100k 1M CONVERSION RATE (Hz) Figure 14b. MAX149 Supply Current vs. Conversion Rate, FASTPD TYPICAL REFERENCE-BUFFER POWER-UP DELAY vs. TIME IN SHUTDOWN POWER-UP DELAY (ms) MAX148/9-F14C 2.0 1.5 1.0 0.5 0 0.001 0.01 0.1 1 10 TIME IN SHUTDOWN (s) Figure 14c.
PAGE 18
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs COMPLETE CONVERSION SEQUENCE 1.6ms WAIT DIN 1 (ZEROS) 00 FULLPD 1 0 1 FASTPD CH1 (ZEROS) CH7 1 1 1 1 0 0 1 FULLPD NOPD 0 1 FASTPD 1.21V 0 REFADJ H = RC = 20kI x CREFADJ 2.50V 0 VREF tBUFFEN = 75Fs Figure 15. MAX149 FULLPD/FASTPD Power-Up Sequence +3.3V OUTPUT CODE 24kI MAX149 510kI 100kI 12 REFADJ TRANSITION 11...111 FULL-SCALE TRANSITION 11...110 11...101 0.01µF VFS = VREF + VCOM ZS = COM Figure 16.
PAGE 19
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs UNIPOLAR MODE BIPOLAR MODE Full Scale Zero Scale Positive Full Scale Zero Scale Negative Full Scale VREF + VCOM VCOM VREF/2 + VCOM VCOM - VREF/2 + VCOM OUTPUT CODE 011 . . . 111 011 . . . 110 000 . . . 010 000 . . . 001 000 . . . 000 V VFS = REF + VCOM 2 SUPPLIES ZS = COM -VFS = +3V -VREF + VCOM 2 V 1 LSB = REF 1024 +3V GND +3V DGND R* = 10Ω 111 . . . 111 111 . . . 110 111 . . .
PAGE 20
MAX148/MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs +3V +3V 0.1µF + ANALOG INPUTS 1µF 1 CH0 VDD 20 (POWER SUPPLIES) 2 CH1 SCLK 19 SCK 3 CS 18 PCS0 4 CH2 MAX148 MAX149 CH3 DIN 17 MOSI 5 CH4 SSTRB 16 6 CH5 DOUT 15 7 CH6 DGND 14 8 CH7 AGND 13 9 COM REFADJ 12 10 SHDN VREF 11 MC683XX MISO (GND) 0.1µF +2.5V Figure 20. MAX148/MAX149 QSPI Connections, External Reference Layout, Grounding, and Bypassing XF CLKX For best performance, use PCBs.
PAGE 21
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs MAX148/MAX149 CS SCLK DIN START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 HIGH IMPEDANCE SSTRB DOUT MSB B8 S1 S0 HIGH IMPEDANCE Figure 22. TMS320 Serial-Interface Timing Diagram High-Speed Digital Interfacing with QSPI The MAX148/MAX149 can interface with QSPI using the circuit in Figure 20 (fSCLK = 2.0MHz, CPOL = 0, CPHA = 0). This QSPI circuit can be programmed to do a conversion on each of the eight channels.
PAGE 22
MAX148/MAX149 +2.7V to +5.
PAGE 23
+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs REVISION NUMBER REVISION DATE 3 5/09 Revised Ordering Information, Electrical Characteristics table, Pin Description, Figure 9, added ruggedized plastic information. 4 1/10 Revised Ordering Information. 5 1/12 Removed military options. PAGES CHANGED DESCRIPTION 1–4, 7, 13, 14, 16, 17, 22–23 22 1, 2, 22 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product.